From 22c8e5526b7bf33840c20b4e717e6560e5dfb294 Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Mon, 19 Sep 2016 09:36:31 -0700 Subject: [PATCH] perf vendor events intel: Add uncore events for Xeon Phi (Knights Landing) Add metrics for memory and MCDRAM. Minimal metrics only for now. Signed-off-by: Andi Kleen Cc: Jiri Olsa Link: http://lkml.kernel.org/n/tip-c0cix4eprbldfrx5zf60suvh@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo --- .../x86/knightslanding/uncore-memory.json | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json new file mode 100644 index 000000000000..e3bcd86c4f56 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json @@ -0,0 +1,42 @@ +[ + { + "BriefDescription": "ddr bandwidth read (CPU traffic only) (MB/sec). ", + "Counter": "0,1,2,3", + "EventCode": "0x03", + "EventName": "UNC_M_CAS_COUNT.RD", + "PerPkg": "1", + "ScaleUnit": "6.4e-05MiB", + "UMask": "0x01", + "Unit": "imc" + }, + { + "BriefDescription": "ddr bandwidth write (CPU traffic only) (MB/sec). ", + "Counter": "0,1,2,3", + "EventCode": "0x03", + "EventName": "UNC_M_CAS_COUNT.WR", + "PerPkg": "1", + "ScaleUnit": "6.4e-05MiB", + "UMask": "0x02", + "Unit": "imc" + }, + { + "BriefDescription": "mcdram bandwidth read (CPU traffic only) (MB/sec). ", + "Counter": "0,1,2,3", + "EventCode": "0x01", + "EventName": "UNC_E_RPQ_INSERTS", + "PerPkg": "1", + "ScaleUnit": "6.4e-05MiB", + "UMask": "0x01", + "Unit": "edc_eclk" + }, + { + "BriefDescription": "mcdram bandwidth write (CPU traffic only) (MB/sec). ", + "Counter": "0,1,2,3", + "EventCode": "0x02", + "EventName": "UNC_E_WPQ_INSERTS", + "PerPkg": "1", + "ScaleUnit": "6.4e-05MiB", + "UMask": "0x01", + "Unit": "edc_eclk" + } +]