powerpc/booke: Clean up the hardware watchpoint support
* CONFIG_BOOKE is selected by CONFIG_44x so we dont need both * Fixed a few comments * Go back to only using DBCR0_IDM to determine if we are using debug resources. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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d3b060231b
Коммит
2325f0a0c3
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@ -148,7 +148,7 @@ transfer_to_handler:
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/* Check to see if the dbcr0 register is set up to debug. Use the
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internal debug mode bit to do this. */
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lwz r12,THREAD_DBCR0(r12)
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andis. r12,r12,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
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andis. r12,r12,DBCR0_IDM@h
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beq+ 3f
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/* From user and task is ptraced - load up global dbcr0 */
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li r12,-1 /* clear all pending debug events */
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@ -292,7 +292,7 @@ syscall_exit_cont:
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/* If the process has its own DBCR0 value, load it up. The internal
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debug mode bit tells us that dbcr0 should be loaded. */
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lwz r0,THREAD+THREAD_DBCR0(r2)
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andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
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andis. r10,r0,DBCR0_IDM@h
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bnel- load_dbcr0
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#endif
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#ifdef CONFIG_44x
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@ -720,7 +720,7 @@ restore_user:
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/* Check whether this process has its own DBCR0 value. The internal
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debug mode bit tells us that dbcr0 should be loaded. */
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lwz r0,THREAD+THREAD_DBCR0(r2)
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andis. r10,r0,(DBCR0_IDM | DBSR_DAC1R | DBSR_DAC1W)@h
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andis. r10,r0,DBCR0_IDM@h
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bnel- load_dbcr0
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#endif
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@ -254,7 +254,7 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
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return;
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/* Clear the DAC and struct entries. One shot trigger */
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#if (defined(CONFIG_44x) || defined(CONFIG_BOOKE))
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#if defined(CONFIG_BOOKE)
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mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W
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| DBCR0_IDM));
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#endif
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@ -286,7 +286,7 @@ int set_dabr(unsigned long dabr)
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mtspr(SPRN_DABR, dabr);
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#endif
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#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
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#if defined(CONFIG_BOOKE)
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mtspr(SPRN_DAC1, dabr);
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#endif
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@ -373,7 +373,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
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if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
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set_dabr(new->thread.dabr);
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#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
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#if defined(CONFIG_BOOKE)
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/* If new thread DAC (HW breakpoint) is the same then leave it */
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if (new->thread.dabr)
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set_dabr(new->thread.dabr);
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@ -568,7 +568,7 @@ void flush_thread(void)
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current->thread.dabr = 0;
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set_dabr(0);
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#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
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#if defined(CONFIG_BOOKE)
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current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W);
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#endif
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}
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@ -717,7 +717,7 @@ void user_disable_single_step(struct task_struct *task)
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struct pt_regs *regs = task->thread.regs;
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#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
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#if defined(CONFIG_BOOKE)
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/* If DAC then do not single step, skip */
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if (task->thread.dabr)
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return;
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@ -744,10 +744,11 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
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if (addr > 0)
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return -EINVAL;
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/* The bottom 3 bits in dabr are flags */
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if ((data & ~0x7UL) >= TASK_SIZE)
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return -EIO;
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#ifdef CONFIG_PPC64
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#ifndef CONFIG_BOOKE
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/* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
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* It was assumed, on previous implementations, that 3 bits were
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@ -769,7 +770,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
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task->thread.dabr = data;
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#endif
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#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
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#if defined(CONFIG_BOOKE)
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/* As described above, it was assumed 3 bits were passed with the data
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* address, but we will assume only the mode bits will be passed
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@ -147,7 +147,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
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*/
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if (current->thread.dabr) {
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set_dabr(current->thread.dabr);
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#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
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#if defined(CONFIG_BOOKE)
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mtspr(SPRN_DBCR0, current->thread.dbcr0);
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#endif
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}
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