ath10k: clean up phyerr code
Make the phyerr structures more compact and easier to understand. Also add constness. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Michal Kazior
Kalle Valo
Родитель
5c01aa3de9
Коммит
2332d0ae92
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@ -56,14 +56,14 @@ static uint8_t get_max_exp(s8 max_index, u16 max_magnitude, size_t bin_len,
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}
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int ath10k_spectral_process_fft(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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struct phyerr_fft_report *fftr,
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const struct wmi_phyerr *phyerr,
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const struct phyerr_fft_report *fftr,
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size_t bin_len, u64 tsf)
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{
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struct fft_sample_ath10k *fft_sample;
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u8 buf[sizeof(*fft_sample) + SPECTRAL_ATH10K_MAX_NUM_BINS];
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u16 freq1, freq2, total_gain_db, base_pwr_db, length, peak_mag;
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u32 reg0, reg1, nf_list1, nf_list2;
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u32 reg0, reg1;
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u8 chain_idx, *bins;
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int dc_pos;
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@ -82,7 +82,7 @@ int ath10k_spectral_process_fft(struct ath10k *ar,
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/* TODO: there might be a reason why the hardware reports 20/40/80 MHz,
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* but the results/plots suggest that its actually 22/44/88 MHz.
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*/
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switch (event->hdr.chan_width_mhz) {
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switch (phyerr->chan_width_mhz) {
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case 20:
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fft_sample->chan_width_mhz = 22;
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break;
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@ -101,7 +101,7 @@ int ath10k_spectral_process_fft(struct ath10k *ar,
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fft_sample->chan_width_mhz = 88;
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break;
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default:
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fft_sample->chan_width_mhz = event->hdr.chan_width_mhz;
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fft_sample->chan_width_mhz = phyerr->chan_width_mhz;
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}
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fft_sample->relpwr_db = MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB);
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@ -110,36 +110,22 @@ int ath10k_spectral_process_fft(struct ath10k *ar,
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peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
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fft_sample->max_magnitude = __cpu_to_be16(peak_mag);
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fft_sample->max_index = MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX);
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fft_sample->rssi = event->hdr.rssi_combined;
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fft_sample->rssi = phyerr->rssi_combined;
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total_gain_db = MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB);
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base_pwr_db = MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB);
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fft_sample->total_gain_db = __cpu_to_be16(total_gain_db);
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fft_sample->base_pwr_db = __cpu_to_be16(base_pwr_db);
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freq1 = __le16_to_cpu(event->hdr.freq1);
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freq2 = __le16_to_cpu(event->hdr.freq2);
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freq1 = __le16_to_cpu(phyerr->freq1);
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freq2 = __le16_to_cpu(phyerr->freq2);
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fft_sample->freq1 = __cpu_to_be16(freq1);
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fft_sample->freq2 = __cpu_to_be16(freq2);
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nf_list1 = __le32_to_cpu(event->hdr.nf_list_1);
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nf_list2 = __le32_to_cpu(event->hdr.nf_list_2);
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chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX);
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switch (chain_idx) {
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case 0:
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fft_sample->noise = __cpu_to_be16(nf_list1 & 0xffffu);
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break;
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case 1:
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fft_sample->noise = __cpu_to_be16((nf_list1 >> 16) & 0xffffu);
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break;
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case 2:
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fft_sample->noise = __cpu_to_be16(nf_list2 & 0xffffu);
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break;
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case 3:
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fft_sample->noise = __cpu_to_be16((nf_list2 >> 16) & 0xffffu);
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break;
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}
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fft_sample->noise = __cpu_to_be16(
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__le16_to_cpu(phyerr->nf_chains[chain_idx]));
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bins = (u8 *)fftr;
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bins += sizeof(*fftr);
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@ -47,8 +47,8 @@ enum ath10k_spectral_mode {
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#ifdef CONFIG_ATH10K_DEBUGFS
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int ath10k_spectral_process_fft(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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struct phyerr_fft_report *fftr,
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const struct wmi_phyerr *phyerr,
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const struct phyerr_fft_report *fftr,
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size_t bin_len, u64 tsf);
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int ath10k_spectral_start(struct ath10k *ar);
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int ath10k_spectral_vif_stop(struct ath10k_vif *arvif);
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@ -59,8 +59,8 @@ void ath10k_spectral_destroy(struct ath10k *ar);
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static inline int
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ath10k_spectral_process_fft(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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struct phyerr_fft_report *fftr,
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const struct wmi_phyerr *phyerr,
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const struct phyerr_fft_report *fftr,
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size_t bin_len, u64 tsf)
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{
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return 0;
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@ -1723,8 +1723,8 @@ static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
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}
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static void ath10k_dfs_radar_report(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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struct phyerr_radar_report *rr,
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const struct wmi_phyerr *phyerr,
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const struct phyerr_radar_report *rr,
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u64 tsf)
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{
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u32 reg0, reg1, tsf32l;
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@ -1757,12 +1757,12 @@ static void ath10k_dfs_radar_report(struct ath10k *ar,
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return;
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/* report event to DFS pattern detector */
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tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
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tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
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tsf64 = tsf & (~0xFFFFFFFFULL);
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tsf64 |= tsf32l;
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width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
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rssi = event->hdr.rssi_combined;
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rssi = phyerr->rssi_combined;
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/* hardware store this as 8 bit signed value,
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* set to zero if negative number
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@ -1801,8 +1801,8 @@ static void ath10k_dfs_radar_report(struct ath10k *ar,
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}
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static int ath10k_dfs_fft_report(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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struct phyerr_fft_report *fftr,
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const struct wmi_phyerr *phyerr,
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const struct phyerr_fft_report *fftr,
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u64 tsf)
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{
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u32 reg0, reg1;
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@ -1810,7 +1810,7 @@ static int ath10k_dfs_fft_report(struct ath10k *ar,
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reg0 = __le32_to_cpu(fftr->reg0);
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reg1 = __le32_to_cpu(fftr->reg1);
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rssi = event->hdr.rssi_combined;
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rssi = phyerr->rssi_combined;
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ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
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"wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
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@ -1839,20 +1839,20 @@ static int ath10k_dfs_fft_report(struct ath10k *ar,
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}
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static void ath10k_wmi_event_dfs(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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const struct wmi_phyerr *phyerr,
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u64 tsf)
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{
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int buf_len, tlv_len, res, i = 0;
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struct phyerr_tlv *tlv;
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struct phyerr_radar_report *rr;
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struct phyerr_fft_report *fftr;
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u8 *tlv_buf;
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const struct phyerr_tlv *tlv;
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const struct phyerr_radar_report *rr;
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const struct phyerr_fft_report *fftr;
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const u8 *tlv_buf;
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buf_len = __le32_to_cpu(event->hdr.buf_len);
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buf_len = __le32_to_cpu(phyerr->buf_len);
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ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
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"wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
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event->hdr.phy_err_code, event->hdr.rssi_combined,
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__le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
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phyerr->phy_err_code, phyerr->rssi_combined,
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__le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
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/* Skip event if DFS disabled */
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if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
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@ -1867,9 +1867,9 @@ static void ath10k_wmi_event_dfs(struct ath10k *ar,
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return;
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}
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tlv = (struct phyerr_tlv *)&event->bufp[i];
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tlv = (struct phyerr_tlv *)&phyerr->buf[i];
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tlv_len = __le16_to_cpu(tlv->len);
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tlv_buf = &event->bufp[i + sizeof(*tlv)];
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tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
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ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
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"wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
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tlv_len, tlv->tag, tlv->sig);
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@ -1883,7 +1883,7 @@ static void ath10k_wmi_event_dfs(struct ath10k *ar,
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}
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rr = (struct phyerr_radar_report *)tlv_buf;
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ath10k_dfs_radar_report(ar, event, rr, tsf);
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ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
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break;
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case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
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if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
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@ -1893,7 +1893,7 @@ static void ath10k_wmi_event_dfs(struct ath10k *ar,
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}
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fftr = (struct phyerr_fft_report *)tlv_buf;
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res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
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res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
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if (res)
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return;
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break;
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@ -1905,16 +1905,16 @@ static void ath10k_wmi_event_dfs(struct ath10k *ar,
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static void
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ath10k_wmi_event_spectral_scan(struct ath10k *ar,
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struct wmi_single_phyerr_rx_event *event,
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const struct wmi_phyerr *phyerr,
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u64 tsf)
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{
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int buf_len, tlv_len, res, i = 0;
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struct phyerr_tlv *tlv;
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u8 *tlv_buf;
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struct phyerr_fft_report *fftr;
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const void *tlv_buf;
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const struct phyerr_fft_report *fftr;
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size_t fftr_len;
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buf_len = __le32_to_cpu(event->hdr.buf_len);
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buf_len = __le32_to_cpu(phyerr->buf_len);
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while (i < buf_len) {
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if (i + sizeof(*tlv) > buf_len) {
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@ -1923,9 +1923,9 @@ ath10k_wmi_event_spectral_scan(struct ath10k *ar,
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return;
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}
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tlv = (struct phyerr_tlv *)&event->bufp[i];
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tlv = (struct phyerr_tlv *)&phyerr->buf[i];
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tlv_len = __le16_to_cpu(tlv->len);
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tlv_buf = &event->bufp[i + sizeof(*tlv)];
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tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
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if (i + sizeof(*tlv) + tlv_len > buf_len) {
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ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
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@ -1942,8 +1942,8 @@ ath10k_wmi_event_spectral_scan(struct ath10k *ar,
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}
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fftr_len = tlv_len - sizeof(*fftr);
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fftr = (struct phyerr_fft_report *)tlv_buf;
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res = ath10k_spectral_process_fft(ar, event,
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fftr = tlv_buf;
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res = ath10k_spectral_process_fft(ar, phyerr,
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fftr, fftr_len,
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tsf);
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if (res < 0) {
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@ -1960,8 +1960,8 @@ ath10k_wmi_event_spectral_scan(struct ath10k *ar,
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static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
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{
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struct wmi_comb_phyerr_rx_event *comb_event;
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struct wmi_single_phyerr_rx_event *event;
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const struct wmi_phyerr_event *ev;
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const struct wmi_phyerr *phyerr;
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u32 count, i, buf_len, phy_err_code;
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u64 tsf;
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int left_len = skb->len;
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@ -1969,38 +1969,38 @@ static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
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ATH10K_DFS_STAT_INC(ar, phy_errors);
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/* Check if combined event available */
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if (left_len < sizeof(*comb_event)) {
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if (left_len < sizeof(*ev)) {
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ath10k_warn(ar, "wmi phyerr combined event wrong len\n");
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return;
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}
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left_len -= sizeof(*comb_event);
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left_len -= sizeof(*ev);
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/* Check number of included events */
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comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
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count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
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ev = (const struct wmi_phyerr_event *)skb->data;
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count = __le32_to_cpu(ev->num_phyerrs);
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tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
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tsf = __le32_to_cpu(ev->tsf_u32);
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tsf <<= 32;
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tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
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tsf |= __le32_to_cpu(ev->tsf_l32);
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ath10k_dbg(ar, ATH10K_DBG_WMI,
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"wmi event phyerr count %d tsf64 0x%llX\n",
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count, tsf);
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event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
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phyerr = ev->phyerrs;
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for (i = 0; i < count; i++) {
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/* Check if we can read event header */
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if (left_len < sizeof(*event)) {
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if (left_len < sizeof(*phyerr)) {
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ath10k_warn(ar, "single event (%d) wrong head len\n",
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i);
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return;
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}
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left_len -= sizeof(*event);
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left_len -= sizeof(*phyerr);
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buf_len = __le32_to_cpu(event->hdr.buf_len);
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phy_err_code = event->hdr.phy_err_code;
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buf_len = __le32_to_cpu(phyerr->buf_len);
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phy_err_code = phyerr->phy_err_code;
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if (left_len < buf_len) {
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ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
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@ -2011,20 +2011,20 @@ static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
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switch (phy_err_code) {
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case PHY_ERROR_RADAR:
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ath10k_wmi_event_dfs(ar, event, tsf);
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ath10k_wmi_event_dfs(ar, phyerr, tsf);
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break;
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case PHY_ERROR_SPECTRAL_SCAN:
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ath10k_wmi_event_spectral_scan(ar, event, tsf);
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ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
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break;
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case PHY_ERROR_FALSE_RADAR_EXT:
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ath10k_wmi_event_dfs(ar, event, tsf);
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ath10k_wmi_event_spectral_scan(ar, event, tsf);
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ath10k_wmi_event_dfs(ar, phyerr, tsf);
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ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
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break;
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default:
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break;
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}
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event += sizeof(*event) + buf_len;
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phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
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}
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}
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@ -2294,94 +2294,25 @@ struct wmi_mgmt_rx_event_v2 {
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#define PHY_ERROR_FALSE_RADAR_EXT 0x24
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#define PHY_ERROR_RADAR 0x05
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struct wmi_single_phyerr_rx_hdr {
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/* TSF timestamp */
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struct wmi_phyerr {
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__le32 tsf_timestamp;
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/*
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* Current freq1, freq2
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*
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* [7:0]: freq1[lo]
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* [15:8] : freq1[hi]
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* [23:16]: freq2[lo]
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* [31:24]: freq2[hi]
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*/
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__le16 freq1;
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__le16 freq2;
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/*
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* Combined RSSI over all chains and channel width for this PHY error
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*
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* [7:0]: RSSI combined
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* [15:8]: Channel width (MHz)
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* [23:16]: PHY error code
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* [24:16]: reserved (future use)
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*/
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u8 rssi_combined;
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u8 chan_width_mhz;
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u8 phy_err_code;
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u8 rsvd0;
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/*
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* RSSI on chain 0 through 3
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*
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* This is formatted the same as the PPDU_START RX descriptor
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* field:
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*
|
||||
* [7:0]: pri20
|
||||
* [15:8]: sec20
|
||||
* [23:16]: sec40
|
||||
* [31:24]: sec80
|
||||
*/
|
||||
|
||||
__le32 rssi_chain0;
|
||||
__le32 rssi_chain1;
|
||||
__le32 rssi_chain2;
|
||||
__le32 rssi_chain3;
|
||||
|
||||
/*
|
||||
* Last calibrated NF value for chain 0 through 3
|
||||
*
|
||||
* nf_list_1:
|
||||
*
|
||||
* + [15:0] - chain 0
|
||||
* + [31:16] - chain 1
|
||||
*
|
||||
* nf_list_2:
|
||||
*
|
||||
* + [15:0] - chain 2
|
||||
* + [31:16] - chain 3
|
||||
*/
|
||||
__le32 nf_list_1;
|
||||
__le32 nf_list_2;
|
||||
|
||||
/* Length of the frame */
|
||||
__le32 rssi_chains[4];
|
||||
__le16 nf_chains[4];
|
||||
__le32 buf_len;
|
||||
u8 buf[0];
|
||||
} __packed;
|
||||
|
||||
struct wmi_single_phyerr_rx_event {
|
||||
/* Phy error event header */
|
||||
struct wmi_single_phyerr_rx_hdr hdr;
|
||||
/* frame buffer */
|
||||
u8 bufp[0];
|
||||
} __packed;
|
||||
|
||||
struct wmi_comb_phyerr_rx_hdr {
|
||||
/* Phy error phy error count */
|
||||
__le32 num_phyerr_events;
|
||||
struct wmi_phyerr_event {
|
||||
__le32 num_phyerrs;
|
||||
__le32 tsf_l32;
|
||||
__le32 tsf_u32;
|
||||
} __packed;
|
||||
|
||||
struct wmi_comb_phyerr_rx_event {
|
||||
/* Phy error phy error count */
|
||||
struct wmi_comb_phyerr_rx_hdr hdr;
|
||||
/*
|
||||
* frame buffer - contains multiple payloads in the order:
|
||||
* header - payload, header - payload...
|
||||
* (The header is of type: wmi_single_phyerr_rx_hdr)
|
||||
*/
|
||||
u8 bufp[0];
|
||||
struct wmi_phyerr phyerrs[0];
|
||||
} __packed;
|
||||
|
||||
#define PHYERR_TLV_SIG 0xBB
|
||||
|
|
|
|||
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