mlxsw: pci: Implement reset done check
Firmware now tells us that the reset is done by passing a magic value via register. Use it to shorten the wait in case this is supported. With old firmware, we still wait until the timeout is reached. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Коммит
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@ -1681,11 +1681,18 @@ static const struct mlxsw_bus mlxsw_pci_bus = {
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static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci)
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{
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unsigned long end;
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mlxsw_pci_write32(mlxsw_pci, SW_RESET, MLXSW_PCI_SW_RESET_RST_BIT);
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/* Current firware does not let us know when the reset is done.
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* So we just wait here for constant time and hope for the best.
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*/
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msleep(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS);
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wmb(); /* reset needs to be written before we read control register */
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end = jiffies + msecs_to_jiffies(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS);
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do {
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u32 val = mlxsw_pci_read32(mlxsw_pci, FW_READY);
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if ((val & MLXSW_PCI_FW_READY_MASK) == MLXSW_PCI_FW_READY_MAGIC)
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break;
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cond_resched();
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} while (time_before(jiffies, end));
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return 0;
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}
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@ -61,6 +61,9 @@
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#define MLXSW_PCI_SW_RESET 0xF0010
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#define MLXSW_PCI_SW_RESET_RST_BIT BIT(0)
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#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000
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#define MLXSW_PCI_FW_READY 0xA1844
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#define MLXSW_PCI_FW_READY_MASK 0xFF
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#define MLXSW_PCI_FW_READY_MAGIC 0x5E
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#define MLXSW_PCI_DOORBELL_SDQ_OFFSET 0x000
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#define MLXSW_PCI_DOORBELL_RDQ_OFFSET 0x200
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