omap: Split OMAP2_IO_ADDRESS to L3 and L4
This patch splits OMAP2_IO_ADDRESS to OMAP2_L3_IO_ADDRESS and OMAP2_L4_IO_ADDRESS to reclaim more IO space. The omap_read*() and omap_write*() functions will work only over L4 address space. Current omap kernel stack uses these functions only to access registers over L4 io address space Note that these macros should only be used when ioremap does not work. Please use ioremap instead in all new code. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Родитель
b0002e0e37
Коммит
233fd64e7f
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@ -17,11 +17,11 @@
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#include "prcm-common.h"
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#define OMAP2420_CM_REGADDR(module, reg) \
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OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
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#define OMAP2430_CM_REGADDR(module, reg) \
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OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
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#define OMAP34XX_CM_REGADDR(module, reg) \
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OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
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/*
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* Architecture-specific global CM registers
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@ -51,7 +51,8 @@ int omap2_pm_debug;
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regs[reg_count++].val = __raw_readl(reg)
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#define DUMP_INTC_REG(reg, off) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
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regs[reg_count++].val = \
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__raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
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static int __init pm_dbg_init(void);
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@ -17,11 +17,11 @@
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#include "prcm-common.h"
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#define OMAP2420_PRM_REGADDR(module, reg) \
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OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
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#define OMAP2430_PRM_REGADDR(module, reg) \
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OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
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#define OMAP34XX_PRM_REGADDR(module, reg) \
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OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
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/*
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* Architecture-specific global PRM registers
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@ -48,9 +48,12 @@ static inline u32 sms_read_reg(u16 reg)
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return __raw_readl(OMAP_SMS_REGADDR(reg));
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}
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#else
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#define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
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#define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
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#define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
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#define OMAP242X_SDRC_REGADDR(reg) \
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OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
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#define OMAP243X_SDRC_REGADDR(reg) \
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OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
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#define OMAP34XX_SDRC_REGADDR(reg) \
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OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
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#endif /* __ASSEMBLER__ */
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#endif
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@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
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prcm_mask_val:
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.word 0xFFFF3FFC
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omap242x_sdi_timer_32ksynct_cr:
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.word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
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.word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
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ENTRY(omap242x_sram_ddr_init_sz)
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.word . - omap242x_sram_ddr_init
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@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
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ddr_prcm_mask_val:
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.word 0xFFFF3FFC
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omap242x_srs_timer_32ksynct:
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.word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
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.word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
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ENTRY(omap242x_sram_reprogram_sdrc_sz)
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.word . - omap242x_sram_reprogram_sdrc
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@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
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prcm_mask_val:
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.word 0xFFFF3FFC
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omap243x_sdi_timer_32ksynct_cr:
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.word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
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.word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
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ENTRY(omap243x_sram_ddr_init_sz)
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.word . - omap243x_sram_ddr_init
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@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
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ddr_prcm_mask_val:
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.word 0xFFFF3FFC
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omap243x_srs_timer_32ksynct:
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.word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
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.word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
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ENTRY(omap243x_sram_reprogram_sdrc_sz)
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.word . - omap243x_sram_reprogram_sdrc
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@ -227,12 +227,12 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
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static struct omap_globals omap242x_globals = {
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.class = OMAP242X_CLASS,
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.tap = OMAP2_IO_ADDRESS(0x48014000),
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.sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
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.sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
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.ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
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.prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
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.cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
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.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
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.sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
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.sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
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};
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void __init omap2_set_globals_242x(void)
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@ -245,12 +245,12 @@ void __init omap2_set_globals_242x(void)
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static struct omap_globals omap243x_globals = {
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.class = OMAP243X_CLASS,
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.tap = OMAP2_IO_ADDRESS(0x4900a000),
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.sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
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.sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
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.ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
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.prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
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.cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
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.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
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.sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
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.sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
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};
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void __init omap2_set_globals_243x(void)
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@ -263,12 +263,12 @@ void __init omap2_set_globals_243x(void)
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static struct omap_globals omap343x_globals = {
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.class = OMAP343X_CLASS,
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.tap = OMAP2_IO_ADDRESS(0x4830A000),
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.sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
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.sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
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.ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
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.prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
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.cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
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.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
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.sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
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.sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
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};
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void __init omap2_set_globals_343x(void)
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@ -280,10 +280,10 @@ void __init omap2_set_globals_343x(void)
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#if defined(CONFIG_ARCH_OMAP4)
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static struct omap_globals omap4_globals = {
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.class = OMAP443X_CLASS,
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.tap = OMAP2_IO_ADDRESS(0x4830a000),
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.ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
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.prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
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.cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
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.tap = OMAP2_L4_IO_ADDRESS(0x4830a000),
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.ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
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.prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
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.cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
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};
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void __init omap2_set_globals_443x(void)
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@ -20,15 +20,18 @@
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#ifndef __ASSEMBLY__
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#define OMAP242X_CTRL_REGADDR(reg) \
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OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
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#define OMAP243X_CTRL_REGADDR(reg) \
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OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
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#define OMAP343X_CTRL_REGADDR(reg) \
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OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
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OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
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#else
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#define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
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#define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
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#define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
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#define OMAP242X_CTRL_REGADDR(reg) \
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OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
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#define OMAP243X_CTRL_REGADDR(reg) \
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OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
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#define OMAP343X_CTRL_REGADDR(reg) \
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OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
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#endif /* __ASSEMBLY__ */
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/*
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@ -68,9 +68,9 @@
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/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
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#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
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#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
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#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
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#elif defined(CONFIG_ARCH_OMAP34XX)
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#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
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#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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#include <mach/omap44xx.h>
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@ -104,7 +104,7 @@
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.endm
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#else
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#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
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#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
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/*
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* The interrupt numbering scheme is defined in the
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@ -63,9 +63,11 @@
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#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
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#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
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#define OMAP2_IO_OFFSET 0x90000000
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#define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
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#define OMAP2_L3_IO_OFFSET 0x90000000
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#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
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#define OMAP2_L4_IO_OFFSET 0x90000000
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#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
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/*
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* ----------------------------------------------------------------------------
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* Omap1 specific IO mapping
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@ -80,11 +80,11 @@
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*/
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#define OMAP242X_SMS_REGADDR(reg) \
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(void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
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(void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
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#define OMAP243X_SMS_REGADDR(reg) \
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(void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
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(void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
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#define OMAP343X_SMS_REGADDR(reg) \
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(void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
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(void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
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/* SMS register offsets - read/write with sms_{read,write}_reg() */
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@ -142,7 +142,7 @@ u8 omap_readb(u32 pa)
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if (cpu_class_is_omap1())
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return __raw_readb(OMAP1_IO_ADDRESS(pa));
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else
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return __raw_readb(OMAP2_IO_ADDRESS(pa));
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return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
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}
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EXPORT_SYMBOL(omap_readb);
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@ -151,7 +151,7 @@ u16 omap_readw(u32 pa)
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if (cpu_class_is_omap1())
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return __raw_readw(OMAP1_IO_ADDRESS(pa));
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else
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return __raw_readw(OMAP2_IO_ADDRESS(pa));
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return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
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}
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EXPORT_SYMBOL(omap_readw);
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@ -160,7 +160,7 @@ u32 omap_readl(u32 pa)
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if (cpu_class_is_omap1())
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return __raw_readl(OMAP1_IO_ADDRESS(pa));
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else
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return __raw_readl(OMAP2_IO_ADDRESS(pa));
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return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
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}
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EXPORT_SYMBOL(omap_readl);
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@ -169,7 +169,7 @@ void omap_writeb(u8 v, u32 pa)
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if (cpu_class_is_omap1())
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__raw_writeb(v, OMAP1_IO_ADDRESS(pa));
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else
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__raw_writeb(v, OMAP2_IO_ADDRESS(pa));
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__raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
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}
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EXPORT_SYMBOL(omap_writeb);
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@ -178,7 +178,7 @@ void omap_writew(u16 v, u32 pa)
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if (cpu_class_is_omap1())
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__raw_writew(v, OMAP1_IO_ADDRESS(pa));
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else
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__raw_writew(v, OMAP2_IO_ADDRESS(pa));
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__raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
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}
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EXPORT_SYMBOL(omap_writew);
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@ -187,6 +187,6 @@ void omap_writel(u32 v, u32 pa)
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if (cpu_class_is_omap1())
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__raw_writel(v, OMAP1_IO_ADDRESS(pa));
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else
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__raw_writel(v, OMAP2_IO_ADDRESS(pa));
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__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
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}
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EXPORT_SYMBOL(omap_writel);
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@ -56,16 +56,16 @@
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#define SRAM_BOOTLOADER_SZ 0x80
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#endif
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#define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048)
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#define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050)
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#define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058)
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#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
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#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
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#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
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#define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848)
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#define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850)
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#define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858)
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#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880)
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#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048)
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#define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0)
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#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
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#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
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#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
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#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
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#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
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#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
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#define GP_DEVICE 0x300
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