ASoC: adau1701: allow configuration of PLL mode pins
The ADAU1701 has 2 hardware pins to configure the PLL mode in accordance to the MCLK-to-LRCLK ratio. These pins have to be stable before the chip is released from reset, and a full reset cycle, including a new firmware download is needed whenever they change. This patch adds GPIO properties to the DT bindings of the Codec, and implements makes the set_sysclk memorize the configured sysclk. Because the run-time parameters are unknown at probe time, the first firmware download is postponed to the first hw_params call, when the driver can determine the mclk/lrclk divider. Subsequent downloads are only issued when the divider configuration changes. Signed-off-by: Daniel Mack <zonque@gmail.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Daniel Mack
Mark Brown
Родитель
de9fc724da
Коммит
2352d4bf43
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@ -11,6 +11,11 @@ Optional properties:
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- reset-gpio: A GPIO spec to define which pin is connected to the
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chip's !RESET pin. If specified, the driver will
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assert a hardware reset at probe time.
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- adi,pll-mode-gpios: An array of two GPIO specs to describe the GPIOs
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the ADAU's PLL config pins are connected to.
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The state of the pins are set according to the
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configured clock divider on ASoC side before the
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firmware is loaded.
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Examples:
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@ -19,5 +24,6 @@ Examples:
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compatible = "adi,adau1701";
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reg = <0x34>;
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reset-gpio = <&gpio 23 0>;
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adi,pll-mode-gpios = <&gpio 24 0 &gpio 25 0>;
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};
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};
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@ -87,11 +87,16 @@
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#define ADAU1701_OSCIPOW_OPD 0x04
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#define ADAU1701_DACSET_DACINIT 1
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#define ADAU1707_CLKDIV_UNSET (-1UL)
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#define ADAU1701_FIRMWARE "adau1701.bin"
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struct adau1701 {
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int gpio_nreset;
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int gpio_pll_mode[2];
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unsigned int dai_fmt;
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unsigned int pll_clkdiv;
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unsigned int sysclk;
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};
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static const struct snd_kcontrol_new adau1701_controls[] = {
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@ -184,12 +189,38 @@ static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg)
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return value;
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}
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static int adau1701_reset(struct snd_soc_codec *codec)
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static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv)
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{
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struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
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struct i2c_client *client = to_i2c_client(codec->dev);
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int ret;
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if (clkdiv != ADAU1707_CLKDIV_UNSET &&
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gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
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gpio_is_valid(adau1701->gpio_pll_mode[1])) {
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switch (clkdiv) {
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case 64:
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gpio_set_value(adau1701->gpio_pll_mode[0], 0);
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gpio_set_value(adau1701->gpio_pll_mode[1], 0);
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break;
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case 256:
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gpio_set_value(adau1701->gpio_pll_mode[0], 0);
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gpio_set_value(adau1701->gpio_pll_mode[1], 1);
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break;
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case 384:
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gpio_set_value(adau1701->gpio_pll_mode[0], 1);
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gpio_set_value(adau1701->gpio_pll_mode[1], 0);
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break;
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case 0: /* fallback */
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case 512:
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gpio_set_value(adau1701->gpio_pll_mode[0], 1);
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gpio_set_value(adau1701->gpio_pll_mode[1], 1);
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break;
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}
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}
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adau1701->pll_clkdiv = clkdiv;
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if (gpio_is_valid(adau1701->gpio_nreset)) {
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gpio_set_value(adau1701->gpio_nreset, 0);
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/* minimum reset time is 20ns */
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@ -199,10 +230,16 @@ static int adau1701_reset(struct snd_soc_codec *codec)
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mdelay(85);
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}
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ret = process_sigma_firmware(client, ADAU1701_FIRMWARE);
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if (ret) {
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dev_warn(codec->dev, "Failed to load firmware\n");
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return ret;
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/*
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* Postpone the firmware download to a point in time when we
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* know the correct PLL setup
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*/
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if (clkdiv != ADAU1707_CLKDIV_UNSET) {
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ret = process_sigma_firmware(client, ADAU1701_FIRMWARE);
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if (ret) {
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dev_warn(codec->dev, "Failed to load firmware\n");
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return ret;
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}
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}
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snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
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@ -285,8 +322,22 @@ static int adau1701_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
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unsigned int clkdiv = adau1701->sysclk / params_rate(params);
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snd_pcm_format_t format;
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unsigned int val;
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int ret;
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/*
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* If the mclk/lrclk ratio changes, the chip needs updated PLL
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* mode GPIO settings, and a full reset cycle, including a new
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* firmware upload.
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*/
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if (clkdiv != adau1701->pll_clkdiv) {
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ret = adau1701_reset(codec, clkdiv);
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if (ret < 0)
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return ret;
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}
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switch (params_rate(params)) {
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case 192000:
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@ -429,6 +480,7 @@ static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
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int source, unsigned int freq, int dir)
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{
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unsigned int val;
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struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
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switch (clk_id) {
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case ADAU1701_CLK_SRC_OSC:
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@ -442,6 +494,7 @@ static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
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}
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snd_soc_update_bits(codec, ADAU1701_OSCIPOW, ADAU1701_OSCIPOW_OPD, val);
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adau1701->sysclk = freq;
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return 0;
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}
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@ -489,11 +542,21 @@ MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
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static int adau1701_probe(struct snd_soc_codec *codec)
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{
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int ret;
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struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
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codec->control_data = to_i2c_client(codec->dev);
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ret = adau1701_reset(codec);
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if (ret)
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/*
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* Let the pll_clkdiv variable default to something that won't happen
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* at runtime. That way, we can postpone the firmware download from
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* adau1701_reset() to a point in time when we know the correct PLL
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* mode parameters.
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*/
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adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
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/* initalize with pre-configured pll mode settings */
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ret = adau1701_reset(codec, adau1701->pll_clkdiv);
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if (ret < 0)
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return ret;
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return 0;
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@ -526,6 +589,7 @@ static int adau1701_i2c_probe(struct i2c_client *client,
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struct adau1701 *adau1701;
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struct device *dev = &client->dev;
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int gpio_nreset = -EINVAL;
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int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
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int ret;
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adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
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@ -536,6 +600,16 @@ static int adau1701_i2c_probe(struct i2c_client *client,
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gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
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if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
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return gpio_nreset;
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gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
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"adi,pll-mode-gpios", 0);
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if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT)
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return gpio_pll_mode[0];
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gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
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"adi,pll-mode-gpios", 1);
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if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT)
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return gpio_pll_mode[1];
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}
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if (gpio_is_valid(gpio_nreset)) {
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@ -545,7 +619,24 @@ static int adau1701_i2c_probe(struct i2c_client *client,
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return ret;
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}
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if (gpio_is_valid(gpio_pll_mode[0]) &&
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gpio_is_valid(gpio_pll_mode[1])) {
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ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
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GPIOF_OUT_INIT_LOW,
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"ADAU1701 PLL mode 0");
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if (ret < 0)
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return ret;
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ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
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GPIOF_OUT_INIT_LOW,
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"ADAU1701 PLL mode 1");
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if (ret < 0)
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return ret;
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}
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adau1701->gpio_nreset = gpio_nreset;
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adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
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adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
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i2c_set_clientdata(client, adau1701);
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ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
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