clk: tegra: Add missing reset deassertion
Commit4782c0a5dd
("clk: tegra: Don't deassert reset on enabling clocks") removed deassertion of reset lines when enabling peripheral clocks. This breaks the initialization of the DFLL driver which relied on this behaviour. Fix this problem by adding explicit deassert/assert requests to the driver. Tested on Google Pixel C. Cc: stable@vger.kernel.org Fixes:4782c0a5dd
("clk: tegra: Don't deassert reset on enabling clocks") Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
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3123109284
Коммит
23a43cc437
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@ -271,6 +271,7 @@ struct tegra_dfll {
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struct clk *ref_clk;
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struct clk *i2c_clk;
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struct clk *dfll_clk;
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struct reset_control *dfll_rst;
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struct reset_control *dvco_rst;
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unsigned long ref_rate;
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unsigned long i2c_clk_rate;
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@ -1464,6 +1465,7 @@ static int dfll_init(struct tegra_dfll *td)
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return -EINVAL;
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}
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reset_control_deassert(td->dfll_rst);
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reset_control_deassert(td->dvco_rst);
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ret = clk_prepare(td->ref_clk);
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@ -1509,6 +1511,7 @@ di_err1:
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clk_unprepare(td->ref_clk);
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reset_control_assert(td->dvco_rst);
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reset_control_assert(td->dfll_rst);
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return ret;
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}
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@ -1530,6 +1533,7 @@ int tegra_dfll_suspend(struct device *dev)
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}
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reset_control_assert(td->dvco_rst);
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reset_control_assert(td->dfll_rst);
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return 0;
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}
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@ -1548,6 +1552,7 @@ int tegra_dfll_resume(struct device *dev)
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{
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struct tegra_dfll *td = dev_get_drvdata(dev);
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reset_control_deassert(td->dfll_rst);
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reset_control_deassert(td->dvco_rst);
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pm_runtime_get_sync(td->dev);
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@ -1951,6 +1956,12 @@ int tegra_dfll_register(struct platform_device *pdev,
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td->soc = soc;
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td->dfll_rst = devm_reset_control_get_optional(td->dev, "dfll");
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if (IS_ERR(td->dfll_rst)) {
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dev_err(td->dev, "couldn't get dfll reset\n");
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return PTR_ERR(td->dfll_rst);
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}
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td->dvco_rst = devm_reset_control_get(td->dev, "dvco");
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if (IS_ERR(td->dvco_rst)) {
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dev_err(td->dev, "couldn't get dvco reset\n");
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@ -2087,6 +2098,7 @@ struct tegra_dfll_soc_data *tegra_dfll_unregister(struct platform_device *pdev)
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clk_unprepare(td->i2c_clk);
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reset_control_assert(td->dvco_rst);
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reset_control_assert(td->dfll_rst);
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return td->soc;
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}
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