[PATCH] i386: cleanup serialize msr
i386 arch cleanup. Introduce the serialize macro to serialize processor state. Why the microcode update needs it I am not quite sure, since wrmsr() is already a serializing instruction, but it is a microcode update, so I will keep the semantic the same, since this could be a timing workaround. As far as I can tell, this has always been there since the original microcode update source. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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245067d167
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@ -164,7 +164,8 @@ static void collect_cpu_info (void *unused)
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}
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wrmsr(MSR_IA32_UCODE_REV, 0, 0);
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__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
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/* see notes above for revision 1.07. Apparent chip bug */
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serialize_cpu();
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/* get the current revision from MSR 0x8B */
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rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
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pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
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@ -377,7 +378,9 @@ static void do_update_one (void * unused)
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(unsigned long) uci->mc->bits >> 16 >> 16);
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wrmsr(MSR_IA32_UCODE_REV, 0, 0);
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__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
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/* see notes above for revision 1.07. Apparent chip bug */
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serialize_cpu();
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/* get the current revision from MSR 0x8B */
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rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
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@ -277,6 +277,11 @@ static inline void clear_in_cr4 (unsigned long mask)
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outb((data), 0x23); \
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} while (0)
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static inline void serialize_cpu(void)
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{
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__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
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}
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static inline void __monitor(const void *eax, unsigned long ecx,
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unsigned long edx)
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{
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@ -437,6 +437,11 @@ static inline void prefetchw(void *x)
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outb((data), 0x23); \
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} while (0)
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static inline void serialize_cpu(void)
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{
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__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
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}
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static inline void __monitor(const void *eax, unsigned long ecx,
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unsigned long edx)
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{
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