drm/i915: Refactor execlists default context pinning
Refactor pinning and unpinning of contexts, such that the default context for an engine is pinned during initialisation and unpinned during teardown (pinning of the context handles the reference counting). Thus we can eliminate the special case handling of the default context that was required to mask that it was not being pinned normally. v2: Rebalance context_queue after rebasing. v3: Rebase to -nightly (not 40 patches in) v4: Rebase onto request_alloc unwinding Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1461833819-3991-19-git-send-email-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
Родитель
7069b14489
Коммит
24f1d3cc09
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@ -2095,9 +2095,8 @@ static int i915_dump_lrc(struct seq_file *m, void *unused)
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return ret;
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list_for_each_entry(ctx, &dev_priv->context_list, link)
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if (ctx != dev_priv->kernel_context)
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for_each_engine(engine, dev_priv)
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i915_dump_lrc_obj(m, ctx, engine);
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for_each_engine(engine, dev_priv)
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i915_dump_lrc_obj(m, ctx, engine);
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mutex_unlock(&dev->struct_mutex);
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@ -868,6 +868,7 @@ struct intel_context {
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struct i915_vma *lrc_vma;
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u64 lrc_desc;
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uint32_t *lrc_reg_state;
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bool initialised;
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} engine[I915_NUM_ENGINES];
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struct list_head link;
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@ -2722,7 +2722,7 @@ void i915_gem_request_free(struct kref *req_ref)
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i915_gem_request_remove_from_client(req);
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if (ctx) {
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if (i915.enable_execlists && ctx != req->i915->kernel_context)
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if (i915.enable_execlists)
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intel_lr_context_unpin(ctx, req->engine);
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i915_gem_context_unreference(ctx);
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@ -592,9 +592,7 @@ static void execlists_context_queue(struct drm_i915_gem_request *request)
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struct drm_i915_gem_request *cursor;
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int num_elements = 0;
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if (request->ctx != request->i915->kernel_context)
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intel_lr_context_pin(request->ctx, engine);
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intel_lr_context_pin(request->ctx, request->engine);
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i915_gem_request_reference(request);
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spin_lock_bh(&engine->execlist_lock);
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@ -678,6 +676,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
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int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
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{
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struct intel_engine_cs *engine = request->engine;
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int ret;
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/* Flush enough space to reduce the likelihood of waiting after
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@ -686,7 +685,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
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*/
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request->reserved_space += MIN_SPACE_FOR_ADD_REQUEST;
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request->ringbuf = request->ctx->engine[request->engine->id].ringbuf;
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request->ringbuf = request->ctx->engine[engine->id].ringbuf;
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if (i915.enable_guc_submission) {
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/*
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@ -701,22 +700,34 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
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return ret;
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}
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if (request->ctx != request->i915->kernel_context) {
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ret = intel_lr_context_pin(request->ctx, request->engine);
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if (ret)
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return ret;
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}
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ret = intel_lr_context_pin(request->ctx, engine);
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if (ret)
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return ret;
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ret = intel_ring_begin(request, 0);
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if (ret)
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goto err_unpin;
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if (!request->ctx->engine[engine->id].initialised) {
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ret = engine->init_context(request);
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if (ret)
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goto err_unpin;
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request->ctx->engine[engine->id].initialised = true;
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}
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/* Note that after this point, we have committed to using
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* this request as it is being used to both track the
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* state of engine initialisation and liveness of the
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* golden renderstate above. Think twice before you try
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* to cancel/unwind this request now.
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*/
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request->reserved_space -= MIN_SPACE_FOR_ADD_REQUEST;
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return 0;
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err_unpin:
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if (request->ctx != request->i915->kernel_context)
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intel_lr_context_unpin(request->ctx, request->engine);
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intel_lr_context_unpin(request->ctx, engine);
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return ret;
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}
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@ -755,12 +766,8 @@ intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request)
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if (engine->last_context != request->ctx) {
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if (engine->last_context)
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intel_lr_context_unpin(engine->last_context, engine);
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if (request->ctx != request->i915->kernel_context) {
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intel_lr_context_pin(request->ctx, engine);
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engine->last_context = request->ctx;
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} else {
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engine->last_context = NULL;
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}
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intel_lr_context_pin(request->ctx, engine);
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engine->last_context = request->ctx;
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}
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if (dev_priv->guc.execbuf_client)
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@ -880,12 +887,7 @@ void intel_execlists_retire_requests(struct intel_engine_cs *engine)
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spin_unlock_bh(&engine->execlist_lock);
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list_for_each_entry_safe(req, tmp, &retired_list, execlist_link) {
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struct intel_context *ctx = req->ctx;
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struct drm_i915_gem_object *ctx_obj =
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ctx->engine[engine->id].state;
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if (ctx_obj && (ctx != req->i915->kernel_context))
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intel_lr_context_unpin(ctx, engine);
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intel_lr_context_unpin(req->ctx, engine);
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list_del(&req->execlist_link);
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i915_gem_request_unreference(req);
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@ -930,23 +932,26 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
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return 0;
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}
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static int intel_lr_context_do_pin(struct intel_context *ctx,
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struct intel_engine_cs *engine)
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static int intel_lr_context_pin(struct intel_context *ctx,
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struct intel_engine_cs *engine)
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{
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struct drm_device *dev = engine->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *ctx_obj = ctx->engine[engine->id].state;
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struct intel_ringbuffer *ringbuf = ctx->engine[engine->id].ringbuf;
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struct drm_i915_private *dev_priv = ctx->i915;
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struct drm_i915_gem_object *ctx_obj;
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struct intel_ringbuffer *ringbuf;
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void *vaddr;
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u32 *lrc_reg_state;
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int ret;
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WARN_ON(!mutex_is_locked(&engine->dev->struct_mutex));
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lockdep_assert_held(&ctx->i915->dev->struct_mutex);
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if (ctx->engine[engine->id].pin_count++)
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return 0;
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ctx_obj = ctx->engine[engine->id].state;
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ret = i915_gem_obj_ggtt_pin(ctx_obj, GEN8_LR_CONTEXT_ALIGN,
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PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
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if (ret)
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return ret;
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goto err;
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vaddr = i915_gem_object_pin_map(ctx_obj);
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if (IS_ERR(vaddr)) {
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@ -956,10 +961,12 @@ static int intel_lr_context_do_pin(struct intel_context *ctx,
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lrc_reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
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ringbuf = ctx->engine[engine->id].ringbuf;
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ret = intel_pin_and_map_ringbuffer_obj(engine->dev, ringbuf);
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if (ret)
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goto unpin_map;
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i915_gem_context_reference(ctx);
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ctx->engine[engine->id].lrc_vma = i915_gem_obj_to_ggtt(ctx_obj);
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intel_lr_context_descriptor_update(ctx, engine);
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lrc_reg_state[CTX_RING_BUFFER_START+1] = ringbuf->vma->node.start;
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@ -970,31 +977,13 @@ static int intel_lr_context_do_pin(struct intel_context *ctx,
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if (i915.enable_guc_submission)
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I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);
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return ret;
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return 0;
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unpin_map:
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i915_gem_object_unpin_map(ctx_obj);
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unpin_ctx_obj:
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i915_gem_object_ggtt_unpin(ctx_obj);
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return ret;
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}
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static int intel_lr_context_pin(struct intel_context *ctx,
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struct intel_engine_cs *engine)
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{
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int ret = 0;
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if (ctx->engine[engine->id].pin_count++ == 0) {
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ret = intel_lr_context_do_pin(ctx, engine);
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if (ret)
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goto reset_pin_count;
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i915_gem_context_reference(ctx);
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}
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return ret;
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reset_pin_count:
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err:
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ctx->engine[engine->id].pin_count = 0;
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return ret;
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}
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@ -1002,19 +991,25 @@ reset_pin_count:
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void intel_lr_context_unpin(struct intel_context *ctx,
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struct intel_engine_cs *engine)
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{
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struct drm_i915_gem_object *ctx_obj = ctx->engine[engine->id].state;
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struct drm_i915_gem_object *ctx_obj;
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WARN_ON(!mutex_is_locked(&ctx->i915->dev->struct_mutex));
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if (--ctx->engine[engine->id].pin_count == 0) {
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i915_gem_object_unpin_map(ctx_obj);
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intel_unpin_ringbuffer_obj(ctx->engine[engine->id].ringbuf);
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i915_gem_object_ggtt_unpin(ctx_obj);
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ctx->engine[engine->id].lrc_vma = NULL;
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ctx->engine[engine->id].lrc_desc = 0;
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ctx->engine[engine->id].lrc_reg_state = NULL;
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lockdep_assert_held(&ctx->i915->dev->struct_mutex);
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GEM_BUG_ON(ctx->engine[engine->id].pin_count == 0);
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i915_gem_context_unreference(ctx);
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}
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if (--ctx->engine[engine->id].pin_count)
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return;
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intel_unpin_ringbuffer_obj(ctx->engine[engine->id].ringbuf);
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ctx_obj = ctx->engine[engine->id].state;
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i915_gem_object_unpin_map(ctx_obj);
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i915_gem_object_ggtt_unpin(ctx_obj);
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ctx->engine[engine->id].lrc_vma = NULL;
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ctx->engine[engine->id].lrc_desc = 0;
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ctx->engine[engine->id].lrc_reg_state = NULL;
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i915_gem_context_unreference(ctx);
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}
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static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
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@ -1914,6 +1909,7 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *engine)
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i915_gem_object_unpin_map(engine->status_page.obj);
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engine->status_page.obj = NULL;
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}
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intel_lr_context_unpin(dev_priv->kernel_context, engine);
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engine->idle_lite_restore_wa = 0;
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engine->disable_lite_restore_wa = false;
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@ -2017,11 +2013,10 @@ logical_ring_init(struct drm_device *dev, struct intel_engine_cs *engine)
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goto error;
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/* As this is the default context, always pin it */
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ret = intel_lr_context_do_pin(dctx, engine);
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ret = intel_lr_context_pin(dctx, engine);
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if (ret) {
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DRM_ERROR(
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"Failed to pin and map ringbuffer %s: %d\n",
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engine->name, ret);
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DRM_ERROR("Failed to pin context for %s: %d\n",
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engine->name, ret);
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goto error;
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}
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@ -2442,12 +2437,6 @@ void intel_lr_context_free(struct intel_context *ctx)
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if (!ctx_obj)
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continue;
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if (ctx == ctx->i915->kernel_context) {
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intel_unpin_ringbuffer_obj(ringbuf);
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i915_gem_object_ggtt_unpin(ctx_obj);
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i915_gem_object_unpin_map(ctx_obj);
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}
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WARN_ON(ctx->engine[i].pin_count);
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intel_ringbuffer_free(ringbuf);
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drm_gem_object_unreference(&ctx_obj->base);
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@ -2543,25 +2532,8 @@ int intel_lr_context_deferred_alloc(struct intel_context *ctx,
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ctx->engine[engine->id].ringbuf = ringbuf;
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ctx->engine[engine->id].state = ctx_obj;
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ctx->engine[engine->id].initialised = engine->init_context == NULL;
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if (ctx != ctx->i915->kernel_context && engine->init_context) {
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struct drm_i915_gem_request *req;
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req = i915_gem_request_alloc(engine, ctx);
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if (IS_ERR(req)) {
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ret = PTR_ERR(req);
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DRM_ERROR("ring create req: %d\n", ret);
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goto error_ringbuf;
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}
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ret = engine->init_context(req);
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i915_add_request_no_flush(req);
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if (ret) {
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DRM_ERROR("ring init context: %d\n",
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ret);
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goto error_ringbuf;
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}
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}
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return 0;
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error_ringbuf:
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