drm/amdgpu: Add multi-GPU DMA mapping helpers
Add BO-type specific helpers functions to DMA-map and unmap kfd_mem_attachments. Implement this functionality for userptrs by creating one SG BO per GPU and filling it with a DMA mapping of the pages from the original mem->bo. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Oak Zeng <Oak.Zeng@amd.com> Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Felix Kuehling
Alex Deucher
Родитель
7141394edc
Коммит
264fb4d332
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@ -44,11 +44,17 @@ enum TLB_FLUSH_TYPE {
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struct amdgpu_device;
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enum kfd_mem_attachment_type {
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KFD_MEM_ATT_SHARED, /* Share kgd_mem->bo or another attachment's */
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KFD_MEM_ATT_USERPTR, /* SG bo to DMA map pages from a userptr bo */
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};
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struct kfd_mem_attachment {
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struct list_head list;
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enum kfd_mem_attachment_type type;
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bool is_mapped;
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struct amdgpu_bo_va *bo_va;
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struct amdgpu_device *adev;
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bool is_mapped;
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uint64_t va;
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uint64_t pte_flags;
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};
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@ -475,12 +475,120 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
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return pte_flags;
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}
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static int
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kfd_mem_dmamap_userptr(struct kgd_mem *mem,
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struct kfd_mem_attachment *attachment)
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{
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enum dma_data_direction direction =
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mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ?
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DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
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struct ttm_operation_ctx ctx = {.interruptible = true};
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struct amdgpu_bo *bo = attachment->bo_va->base.bo;
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struct amdgpu_device *adev = attachment->adev;
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struct ttm_tt *src_ttm = mem->bo->tbo.ttm;
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struct ttm_tt *ttm = bo->tbo.ttm;
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int ret;
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ttm->sg = kmalloc(sizeof(*ttm->sg), GFP_KERNEL);
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if (unlikely(!ttm->sg))
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return -ENOMEM;
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if (WARN_ON(ttm->num_pages != src_ttm->num_pages))
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return -EINVAL;
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/* Same sequence as in amdgpu_ttm_tt_pin_userptr */
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ret = sg_alloc_table_from_pages(ttm->sg, src_ttm->pages,
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ttm->num_pages, 0,
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(u64)ttm->num_pages << PAGE_SHIFT,
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GFP_KERNEL);
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if (unlikely(ret))
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goto free_sg;
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ret = dma_map_sgtable(adev->dev, ttm->sg, direction, 0);
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if (unlikely(ret))
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goto release_sg;
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drm_prime_sg_to_dma_addr_array(ttm->sg, ttm->dma_address,
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ttm->num_pages);
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amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
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ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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if (ret)
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goto unmap_sg;
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return 0;
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unmap_sg:
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dma_unmap_sgtable(adev->dev, ttm->sg, direction, 0);
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release_sg:
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pr_err("DMA map userptr failed: %d\n", ret);
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sg_free_table(ttm->sg);
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free_sg:
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kfree(ttm->sg);
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ttm->sg = NULL;
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return ret;
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}
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static int
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kfd_mem_dmamap_attachment(struct kgd_mem *mem,
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struct kfd_mem_attachment *attachment)
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{
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switch (attachment->type) {
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case KFD_MEM_ATT_SHARED:
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return 0;
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case KFD_MEM_ATT_USERPTR:
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return kfd_mem_dmamap_userptr(mem, attachment);
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default:
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WARN_ON_ONCE(1);
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}
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return -EINVAL;
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}
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static void
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kfd_mem_dmaunmap_userptr(struct kgd_mem *mem,
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struct kfd_mem_attachment *attachment)
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{
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enum dma_data_direction direction =
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mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ?
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DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
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struct ttm_operation_ctx ctx = {.interruptible = false};
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struct amdgpu_bo *bo = attachment->bo_va->base.bo;
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struct amdgpu_device *adev = attachment->adev;
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struct ttm_tt *ttm = bo->tbo.ttm;
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if (unlikely(!ttm->sg))
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return;
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amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
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ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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dma_unmap_sgtable(adev->dev, ttm->sg, direction, 0);
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sg_free_table(ttm->sg);
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ttm->sg = NULL;
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}
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static void
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kfd_mem_dmaunmap_attachment(struct kgd_mem *mem,
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struct kfd_mem_attachment *attachment)
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{
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switch (attachment->type) {
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case KFD_MEM_ATT_SHARED:
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break;
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case KFD_MEM_ATT_USERPTR:
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kfd_mem_dmaunmap_userptr(mem, attachment);
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break;
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default:
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WARN_ON_ONCE(1);
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}
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}
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/* kfd_mem_attach - Add a BO to a VM
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*
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* Everything that needs to bo done only once when a BO is first added
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* to a VM. It can later be mapped and unmapped many times without
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* repeating these steps.
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*
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* 0. Create BO for DMA mapping, if needed
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* 1. Allocate and initialize BO VA entry data structure
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* 2. Add BO to the VM
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* 3. Determine ASIC-specific PTE flags
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@ -490,10 +598,12 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
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static int kfd_mem_attach(struct amdgpu_device *adev, struct kgd_mem *mem,
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struct amdgpu_vm *vm, bool is_aql)
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{
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struct amdgpu_device *bo_adev = amdgpu_ttm_adev(mem->bo->tbo.bdev);
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unsigned long bo_size = mem->bo->tbo.base.size;
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uint64_t va = mem->va;
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struct kfd_mem_attachment *attachment[2] = {NULL, NULL};
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struct amdgpu_bo *bo[2] = {NULL, NULL};
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struct drm_gem_object *gobj;
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int i, ret;
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if (!va) {
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@ -511,14 +621,37 @@ static int kfd_mem_attach(struct amdgpu_device *adev, struct kgd_mem *mem,
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pr_debug("\t add VA 0x%llx - 0x%llx to vm %p\n", va,
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va + bo_size, vm);
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/* FIXME: For now all attachments use the same BO. This is
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* incorrect because one BO can only have one DMA mapping
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* for one GPU. We need one BO per GPU, e.g. a DMABuf
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* import with dynamic attachment. This will be addressed
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* one BO-type at a time in subsequent patches.
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*/
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bo[i] = mem->bo;
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drm_gem_object_get(&bo[i]->tbo.base);
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if (adev == bo_adev || (mem->domain == AMDGPU_GEM_DOMAIN_VRAM &&
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amdgpu_xgmi_same_hive(adev, bo_adev))) {
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/* Mappings on the local GPU and VRAM mappings in the
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* local hive share the original BO
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*/
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attachment[i]->type = KFD_MEM_ATT_SHARED;
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bo[i] = mem->bo;
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drm_gem_object_get(&bo[i]->tbo.base);
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} else if (i > 0) {
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/* Multiple mappings on the same GPU share the BO */
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attachment[i]->type = KFD_MEM_ATT_SHARED;
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bo[i] = bo[0];
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drm_gem_object_get(&bo[i]->tbo.base);
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} else if (amdgpu_ttm_tt_get_usermm(mem->bo->tbo.ttm)) {
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/* Create an SG BO to DMA-map userptrs on other GPUs */
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attachment[i]->type = KFD_MEM_ATT_USERPTR;
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ret = amdgpu_gem_object_create(adev, bo_size, 1,
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AMDGPU_GEM_DOMAIN_CPU,
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0, ttm_bo_type_sg,
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mem->bo->tbo.base.resv,
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&gobj);
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if (ret)
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goto unwind;
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bo[i] = gem_to_amdgpu_bo(gobj);
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bo[i]->parent = amdgpu_bo_ref(mem->bo);
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} else {
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/* FIXME: Need to DMA-map other BO types */
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attachment[i]->type = KFD_MEM_ATT_SHARED;
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bo[i] = mem->bo;
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drm_gem_object_get(&bo[i]->tbo.base);
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}
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/* Add BO to VM internal data structures */
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attachment[i]->bo_va = amdgpu_vm_bo_add(adev, vm, bo[i]);
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