Samsung DT updates for v3.14
- Add support Octa Cores for exynos5420 : populate CPU node entries to 8 Cores : extend mct to support 8 local interrupts - Update dwmmc nodes for exynos5250 and exynos5420 : change status property of dwmmc nodes for exynos5250 : move dwmmc nodes from exynos5 to exynos5250 because it's different between exynos5250 and exynos5420 : rename mmc nodes from dwmmc for exynos5 SoCs : add dwmmc nodes for exynos5420 - Add G-Scaler nodes for exynos5420 - Add HS-i2c nodes in exynos5420 : High Speed I2C 7 channels (4 to 10) - Update sysreg binding and node name in exynos4 - Update min voltage on exynos5250-arndale - Move fifo-depth property from boards to exynos5250 SoC : because the fifo-depth property is SoC specific -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSrgntAAoJEA0Cl+kVi2xqfUIP/1eXRFBrF2l6CB27MwdAW3hk MXNYNwGhftKW/rvZJSMhfkqd3LIuJf707T5gLhfhC1yDi7ahK0BNa8UE1zoaRFC4 IaLvG+8jWiZkvunxOA504FEmO3EMw1ed0bV5Odo74Eelz1qqWwYT4pXcBgY+/Lyi tqxzSVaN9api3PxvY/RLy8sR9phF4jJ/hXrHMVf0L7CIuPpWyWKcUmav6uo3oJNv xYYK6xBGuLGr/LgWAwqj+4lPDx3dJtqMUkFV8p7UzhK0mSG3MnQCOFDd6FwznYkR Exy4KqIMZZLBv8ZnyA69QApOk3x2K9SqeUG7aXiqV751idjKy7s8/UPZ3fNhWiaq ytExM0VTSVArR9M/Qym2DDCvI4x0u80SeMTcR/igLAySnY2e4Hf61T7JJcmYiWOU V3cuoVVe6wzMK/Ng31UkYaUlFTPg5N7YJoyD1wXQa9fZcwxFYFHpA35M/68rUdMp 5SsYTFSK5wMwYdup7QsqqbylUAiydzICiFZ1SFBFL2NPpMyIRFVxowChimkKnx6/ BjVtkDd9LaM1sNHHWFO+BavOvlxRmivSbIv6q+50Ax7FO7f4aGr2KnJI9Npao859 5+wCVTxTZPZJecRlcjx/XGjX+kvnb5MqqVVGy0JbYcpElN+0ZLUPDnttwlr9Rxm1 i64VkezAAGVNeLWqX+LS =6e6p -----END PGP SIGNATURE----- Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt From Kukjin Kim: Samsung DT updates for v3.14 - Add support Octa Cores for exynos5420 : populate CPU node entries to 8 Cores : extend mct to support 8 local interrupts - Update dwmmc nodes for exynos5250 and exynos5420 : change status property of dwmmc nodes for exynos5250 : move dwmmc nodes from exynos5 to exynos5250 because it's different between exynos5250 and exynos5420 : rename mmc nodes from dwmmc for exynos5 SoCs : add dwmmc nodes for exynos5420 - Add G-Scaler nodes for exynos5420 - Add HS-i2c nodes in exynos5420 : High Speed I2C 7 channels (4 to 10) - Update sysreg binding and node name in exynos4 - Update min voltage on exynos5250-arndale - Move fifo-depth property from boards to exynos5250 SoC : because the fifo-depth property is SoC specific * tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Update Samsung sysreg binding document ARM: dts: Fix sysreg node name in exynos4.dtsi ARM: dts: Add hs-i2c nodes to exynos5420 ARM: dts: Update min voltage for vdd_arm on Arndale ARM: dts: populate cpu node entries to 8 cpus for exynos5420 clocksource: mct: extend mct to support 8 local interrupts for Exynos5420 ARM: dts: Add device nodes for GScaler blocks for exynos5420 ARM: dts: Add dwmmc DT nodes for exynos5420 SOC ARM: dts: rename mmc dts node for exynos5 series ARM: dts: Move fifo-depth property from exynos5250 board dts ARM: dts: change status property of dwmmc nodes for exynos5250 ARM: dts: Move dwmmc nodes from exynos5.dtsi to exynos5250.dtsi Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Коммит
2652fbde3f
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@ -1,7 +1,12 @@
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|||
SAMSUNG S5P/Exynos SoC series System Registers (SYSREG)
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Properties:
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- name : should be 'sysreg';
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- compatible : should contain "samsung,<chip name>-sysreg", "syscon";
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For Exynos4 SoC series it should be "samsung,exynos4-sysreg", "syscon";
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- reg : offset and length of the register set.
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Example:
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syscon@10010000 {
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compatible = "samsung,exynos4-sysreg", "syscon";
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reg = <0x10010000 0x400>;
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};
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@ -16,6 +16,8 @@ Required Properties:
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specific extensions.
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- "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
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specific extensions.
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- "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
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specific extensions.
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* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
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unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
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@ -241,11 +241,10 @@
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};
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};
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dwmmc0@12200000 {
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mmc@12200000 {
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -259,14 +258,13 @@
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};
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};
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dwmmc1@12210000 {
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mmc@12210000 {
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status = "disabled";
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};
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dwmmc2@12220000 {
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mmc@12220000 {
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num-slots = <1>;
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supports-highspeed;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -281,11 +279,10 @@
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};
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};
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dwmmc3@12230000 {
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mmc@12230000 {
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -99,7 +99,7 @@
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reg = <0x10440000 0x1000>;
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};
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sys_reg: sysreg {
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sys_reg: syscon@10010000 {
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compatible = "samsung,exynos4-sysreg", "syscon";
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reg = <0x10010000 0x400>;
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};
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@ -50,27 +50,6 @@
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interrupts = <1 9 0xf04>;
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};
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dwmmc_0: dwmmc0@12200000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 75 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc_1: dwmmc1@12210000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 76 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc_2: dwmmc2@12220000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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serial@12C00000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C00000 0x100>;
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@ -266,7 +266,7 @@
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buck2_reg: BUCK2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <925000>;
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1300000>;
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regulator-always-on;
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regulator-boot-on;
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@ -384,11 +384,11 @@
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status = "disabled";
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};
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dwmmc_0: dwmmc0@12200000 {
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mmc_0: mmc@12200000 {
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status = "okay";
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -403,14 +403,10 @@
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};
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};
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dwmmc_1: dwmmc1@12210000 {
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status = "disabled";
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};
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dwmmc_2: dwmmc2@12220000 {
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mmc_2: mmc@12220000 {
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status = "okay";
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num-slots = <1>;
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supports-highspeed;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -426,10 +422,6 @@
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};
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};
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dwmmc_3: dwmmc3@12230000 {
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status = "disabled";
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};
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i2s0: i2s@03830000 {
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status = "okay";
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};
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@ -140,11 +140,11 @@
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};
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};
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dwmmc0@12200000 {
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mmc@12200000 {
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status = "okay";
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -158,14 +158,10 @@
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};
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};
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dwmmc1@12210000 {
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status = "disabled";
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};
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dwmmc2@12220000 {
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mmc@12220000 {
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status = "okay";
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num-slots = <1>;
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supports-highspeed;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -180,10 +176,6 @@
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};
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};
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dwmmc3@12230000 {
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status = "disabled";
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};
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spi_0: spi@12d20000 {
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status = "disabled";
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};
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@ -175,7 +175,7 @@
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* On Snow we've got SIP WiFi and so can keep drive strengths low to
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* reduce EMI.
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*/
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dwmmc3@12230000 {
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mmc@12230000 {
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slot@0 {
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pinctrl-names = "default";
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pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
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@ -33,10 +33,10 @@
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gsc1 = &gsc_1;
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gsc2 = &gsc_2;
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gsc3 = &gsc_3;
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mshc0 = &dwmmc_0;
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mshc1 = &dwmmc_1;
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mshc2 = &dwmmc_2;
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mshc3 = &dwmmc_3;
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mshc0 = &mmc_0;
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mshc1 = &mmc_1;
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mshc2 = &mmc_2;
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mshc3 = &mmc_3;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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pinctrl-0 = <&spi2_bus>;
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};
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dwmmc_0: dwmmc0@12200000 {
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mmc_0: mmc@12200000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 75 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12200000 0x1000>;
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clocks = <&clock 280>, <&clock 139>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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};
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dwmmc_1: dwmmc1@12210000 {
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mmc_1: mmc@12210000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 76 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12210000 0x1000>;
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clocks = <&clock 281>, <&clock 140>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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};
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dwmmc_2: dwmmc2@12220000 {
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mmc_2: mmc@12220000 {
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compatible = "samsung,exynos5250-dw-mshc";
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12220000 0x1000>;
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clocks = <&clock 282>, <&clock 141>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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};
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dwmmc_3: dwmmc3@12230000 {
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mmc_3: mmc@12230000 {
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12230000 0x1000>;
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interrupts = <0 78 0>;
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#size-cells = <0>;
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clocks = <&clock 283>, <&clock 142>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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};
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i2s0: i2s@03830000 {
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@ -31,6 +31,39 @@
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};
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};
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mmc@12200000 {
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status = "okay";
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broken-cd;
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supports-highspeed;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <0 4>;
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samsung,dw-mshc-ddr-timing = <0 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
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slot@0 {
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reg = <0>;
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bus-width = <8>;
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};
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};
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mmc@12220000 {
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status = "okay";
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supports-highspeed;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
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slot@0 {
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reg = <0>;
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bus-width = <4>;
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};
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};
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dp-controller@145B0000 {
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pinctrl-names = "default";
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pinctrl-0 = <&dp_hpd>;
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|
|
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@ -22,6 +22,9 @@
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compatible = "samsung,exynos5420";
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aliases {
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mshc0 = &mmc_0;
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mshc1 = &mmc_1;
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mshc2 = &mmc_2;
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pinctrl0 = &pinctrl_0;
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pinctrl1 = &pinctrl_1;
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pinctrl2 = &pinctrl_2;
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|
@ -31,6 +34,15 @@
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
|
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i2c4 = &hsi2c_4;
|
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i2c5 = &hsi2c_5;
|
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i2c6 = &hsi2c_6;
|
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i2c7 = &hsi2c_7;
|
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i2c8 = &hsi2c_8;
|
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i2c9 = &hsi2c_9;
|
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i2c10 = &hsi2c_10;
|
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gsc0 = &gsc_0;
|
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gsc1 = &gsc_1;
|
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};
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cpus {
|
||||
|
@ -64,6 +76,34 @@
|
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reg = <0x3>;
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clock-frequency = <1800000000>;
|
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};
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|
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cpu4: cpu@100 {
|
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device_type = "cpu";
|
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compatible = "arm,cortex-a7";
|
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reg = <0x100>;
|
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clock-frequency = <1000000000>;
|
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};
|
||||
|
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cpu5: cpu@101 {
|
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device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
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reg = <0x101>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
|
||||
cpu6: cpu@102 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x102>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
|
||||
cpu7: cpu@103 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x103>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
};
|
||||
|
||||
clock: clock-controller@10010000 {
|
||||
|
@ -88,13 +128,50 @@
|
|||
clock-names = "mfc";
|
||||
};
|
||||
|
||||
mmc_0: mmc@12200000 {
|
||||
compatible = "samsung,exynos5420-dw-mshc-smu";
|
||||
interrupts = <0 75 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x12200000 0x2000>;
|
||||
clocks = <&clock 351>, <&clock 132>;
|
||||
clock-names = "biu", "ciu";
|
||||
fifo-depth = <0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc_1: mmc@12210000 {
|
||||
compatible = "samsung,exynos5420-dw-mshc-smu";
|
||||
interrupts = <0 76 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x12210000 0x2000>;
|
||||
clocks = <&clock 352>, <&clock 133>;
|
||||
clock-names = "biu", "ciu";
|
||||
fifo-depth = <0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc_2: mmc@12220000 {
|
||||
compatible = "samsung,exynos5420-dw-mshc";
|
||||
interrupts = <0 77 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x12220000 0x1000>;
|
||||
clocks = <&clock 353>, <&clock 134>;
|
||||
clock-names = "biu", "ciu";
|
||||
fifo-depth = <0x40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mct@101C0000 {
|
||||
compatible = "samsung,exynos4210-mct";
|
||||
reg = <0x101C0000 0x800>;
|
||||
interrupt-controller;
|
||||
#interrups-cells = <1>;
|
||||
interrupt-parent = <&mct_map>;
|
||||
interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>;
|
||||
interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
|
||||
<8>, <9>, <10>, <11>;
|
||||
clocks = <&clock 1>, <&clock 315>;
|
||||
clock-names = "fin_pll", "mct";
|
||||
|
||||
|
@ -109,7 +186,11 @@
|
|||
<4 &gic 0 120 0>,
|
||||
<5 &gic 0 121 0>,
|
||||
<6 &gic 0 122 0>,
|
||||
<7 &gic 0 123 0>;
|
||||
<7 &gic 0 123 0>,
|
||||
<8 &gic 0 128 0>,
|
||||
<9 &gic 0 129 0>,
|
||||
<10 &gic 0 130 0>,
|
||||
<11 &gic 0 131 0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -292,6 +373,97 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_4: i2c@12CA0000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12CA0000 0x1000>;
|
||||
interrupts = <0 60 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_hs_bus>;
|
||||
clocks = <&clock 265>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_5: i2c@12CB0000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12CB0000 0x1000>;
|
||||
interrupts = <0 61 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_hs_bus>;
|
||||
clocks = <&clock 266>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_6: i2c@12CC0000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12CC0000 0x1000>;
|
||||
interrupts = <0 62 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c6_hs_bus>;
|
||||
clocks = <&clock 267>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_7: i2c@12CD0000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12CD0000 0x1000>;
|
||||
interrupts = <0 63 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c7_hs_bus>;
|
||||
clocks = <&clock 268>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_8: i2c@12E00000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12E00000 0x1000>;
|
||||
interrupts = <0 87 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_hs_bus>;
|
||||
clocks = <&clock 281>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_9: i2c@12E10000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12E10000 0x1000>;
|
||||
interrupts = <0 88 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c9_hs_bus>;
|
||||
clocks = <&clock 282>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c_10: i2c@12E20000 {
|
||||
compatible = "samsung,exynos5-hsi2c";
|
||||
reg = <0x12E20000 0x1000>;
|
||||
interrupts = <0 203 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c10_hs_bus>;
|
||||
clocks = <&clock 283>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hdmi@14530000 {
|
||||
compatible = "samsung,exynos4212-hdmi";
|
||||
reg = <0x14530000 0x70000>;
|
||||
|
@ -310,4 +482,22 @@
|
|||
clocks = <&clock 431>, <&clock 143>;
|
||||
clock-names = "mixer", "sclk_hdmi";
|
||||
};
|
||||
|
||||
gsc_0: video-scaler@13e00000 {
|
||||
compatible = "samsung,exynos5-gsc";
|
||||
reg = <0x13e00000 0x1000>;
|
||||
interrupts = <0 85 0>;
|
||||
clocks = <&clock 465>;
|
||||
clock-names = "gscl";
|
||||
samsung,power-domain = <&gsc_pd>;
|
||||
};
|
||||
|
||||
gsc_1: video-scaler@13e10000 {
|
||||
compatible = "samsung,exynos5-gsc";
|
||||
reg = <0x13e10000 0x1000>;
|
||||
interrupts = <0 86 0>;
|
||||
clocks = <&clock 466>;
|
||||
clock-names = "gscl";
|
||||
samsung,power-domain = <&gsc_pd>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -71,6 +71,10 @@ enum {
|
|||
MCT_L1_IRQ,
|
||||
MCT_L2_IRQ,
|
||||
MCT_L3_IRQ,
|
||||
MCT_L4_IRQ,
|
||||
MCT_L5_IRQ,
|
||||
MCT_L6_IRQ,
|
||||
MCT_L7_IRQ,
|
||||
MCT_NR_IRQS,
|
||||
};
|
||||
|
||||
|
|
Загрузка…
Ссылка в новой задаче