i2c: at91: Convert to use struct i2c_timings
Instead of using custom variables and parser, convert the driver to use the ones provided by I2C core. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -43,16 +43,18 @@ void at91_init_twi_bus_master(struct at91_twi_dev *dev)
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* Calculate symmetric clock as stated in datasheet:
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* Calculate symmetric clock as stated in datasheet:
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* twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
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* twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
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*/
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*/
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static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
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static void at91_calc_twi_clock(struct at91_twi_dev *dev)
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{
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{
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int ckdiv, cdiv, div, hold = 0;
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int ckdiv, cdiv, div, hold = 0;
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struct at91_twi_pdata *pdata = dev->pdata;
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struct at91_twi_pdata *pdata = dev->pdata;
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int offset = pdata->clk_offset;
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int offset = pdata->clk_offset;
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int max_ckdiv = pdata->clk_max_div;
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int max_ckdiv = pdata->clk_max_div;
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u32 twd_hold_time_ns = 0;
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struct i2c_timings timings, *t = &timings;
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i2c_parse_fw_timings(dev->dev, t, true);
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div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
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div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
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2 * twi_clk) - offset);
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2 * t->bus_freq_hz) - offset);
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ckdiv = fls(div >> 8);
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ckdiv = fls(div >> 8);
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cdiv = div >> ckdiv;
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cdiv = div >> ckdiv;
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@ -64,15 +66,12 @@ static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
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}
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}
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if (pdata->has_hold_field) {
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if (pdata->has_hold_field) {
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of_property_read_u32(dev->dev->of_node, "i2c-sda-hold-time-ns",
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&twd_hold_time_ns);
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/*
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/*
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* hold time = HOLD + 3 x T_peripheral_clock
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* hold time = HOLD + 3 x T_peripheral_clock
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* Use clk rate in kHz to prevent overflows when computing
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* Use clk rate in kHz to prevent overflows when computing
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* hold.
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* hold.
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*/
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*/
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hold = DIV_ROUND_UP(twd_hold_time_ns
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hold = DIV_ROUND_UP(t->sda_hold_ns
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* (clk_get_rate(dev->clk) / 1000), 1000000);
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* (clk_get_rate(dev->clk) / 1000), 1000000);
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hold -= 3;
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hold -= 3;
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if (hold < 0)
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if (hold < 0)
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@ -89,7 +88,7 @@ static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
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| AT91_TWI_CWGR_HOLD(hold);
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| AT91_TWI_CWGR_HOLD(hold);
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dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns)\n",
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dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns)\n",
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cdiv, ckdiv, hold, twd_hold_time_ns);
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cdiv, ckdiv, hold, t->sda_hold_ns);
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}
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}
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static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
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static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
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@ -772,7 +771,6 @@ int at91_twi_probe_master(struct platform_device *pdev,
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u32 phy_addr, struct at91_twi_dev *dev)
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u32 phy_addr, struct at91_twi_dev *dev)
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{
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{
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int rc;
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int rc;
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u32 bus_clk_rate;
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init_completion(&dev->cmd_complete);
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init_completion(&dev->cmd_complete);
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@ -794,12 +792,7 @@ int at91_twi_probe_master(struct platform_device *pdev,
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dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size);
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dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size);
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}
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}
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rc = of_property_read_u32(dev->dev->of_node, "clock-frequency",
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at91_calc_twi_clock(dev);
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&bus_clk_rate);
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if (rc)
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bus_clk_rate = DEFAULT_TWI_CLK_HZ;
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at91_calc_twi_clock(dev, bus_clk_rate);
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dev->adapter.algo = &at91_twi_algorithm;
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dev->adapter.algo = &at91_twi_algorithm;
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dev->adapter.quirks = &at91_twi_quirks;
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dev->adapter.quirks = &at91_twi_quirks;
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@ -21,7 +21,6 @@
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#include <linux/platform_data/dma-atmel.h>
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#include <linux/platform_data/dma-atmel.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#define DEFAULT_TWI_CLK_HZ 100000 /* max 400 Kbits/s */
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#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
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#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
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#define AT91_I2C_DMA_THRESHOLD 8 /* enable DMA if transfer size is bigger than this threshold */
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#define AT91_I2C_DMA_THRESHOLD 8 /* enable DMA if transfer size is bigger than this threshold */
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#define AUTOSUSPEND_TIMEOUT 2000
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#define AUTOSUSPEND_TIMEOUT 2000
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