[PATCH] ppc32: add phy excluded features to ocp_func_emac_data
This patch adds a field to struct ocp_func_emac_data that allows platform-specific unsupported PHY features to be passed in to the ibm_emac ethernet driver. This patch also adds some logic for the Bamboo eval board to populate this field based on the dip switches on the board. This is a workaround for the improperly biased RJ-45 sockets on the Rev. 0 Bamboo. Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com> Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Родитель
8e8fff0975
Коммит
2698ebcb43
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@ -123,33 +123,69 @@ bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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static void __init bamboo_set_emacdata(void)
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static void __init bamboo_set_emacdata(void)
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{
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{
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unsigned char * selection1_base;
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u8 * base_addr;
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struct ocp_def *def;
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struct ocp_def *def;
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struct ocp_func_emac_data *emacdata;
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struct ocp_func_emac_data *emacdata;
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u8 selection1_val;
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u8 val;
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int mode;
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int mode;
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u32 excluded = 0;
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selection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
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base_addr = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
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selection1_val = readb(selection1_base);
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val = readb(base_addr);
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iounmap((void *) selection1_base);
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iounmap((void *) base_addr);
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if (BAMBOO_SEL_MII(selection1_val))
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if (BAMBOO_SEL_MII(val))
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mode = PHY_MODE_MII;
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mode = PHY_MODE_MII;
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else if (BAMBOO_SEL_RMII(selection1_val))
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else if (BAMBOO_SEL_RMII(val))
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mode = PHY_MODE_RMII;
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mode = PHY_MODE_RMII;
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else
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else
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mode = PHY_MODE_SMII;
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mode = PHY_MODE_SMII;
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/* Set mac_addr and phy mode for each EMAC */
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/*
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* SW2 on the Bamboo is used for ethernet configuration and is accessed
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* via the CONFIG2 register in the FPGA. If the ANEG pin is set,
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* overwrite the supported features with the settings in SW2.
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*
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* This is used as a workaround for the improperly biased RJ-45 sockets
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* on the Rev. 0 Bamboo. By default only 10baseT is functional.
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* Removing inductors L17 and L18 from the board allows 100baseT, but
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* disables 10baseT. The Rev. 1 has no such limitations.
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*/
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base_addr = ioremap64(BAMBOO_FPGA_CONFIG2_REG_ADDR, 8);
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val = readb(base_addr);
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iounmap((void *) base_addr);
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if (!BAMBOO_AUTONEGOTIATE(val)) {
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excluded |= SUPPORTED_Autoneg;
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if (BAMBOO_FORCE_100Mbps(val)) {
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excluded |= SUPPORTED_10baseT_Full;
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excluded |= SUPPORTED_10baseT_Half;
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if (BAMBOO_FULL_DUPLEX_EN(val))
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excluded |= SUPPORTED_100baseT_Half;
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else
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excluded |= SUPPORTED_100baseT_Full;
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} else {
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excluded |= SUPPORTED_100baseT_Full;
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excluded |= SUPPORTED_100baseT_Half;
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if (BAMBOO_FULL_DUPLEX_EN(val))
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excluded |= SUPPORTED_10baseT_Half;
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else
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excluded |= SUPPORTED_10baseT_Full;
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}
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}
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/* Set mac_addr, phy mode and unsupported phy features for each EMAC */
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def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
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def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
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emacdata = def->additions;
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emacdata = def->additions;
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memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
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memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
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emacdata->phy_mode = mode;
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emacdata->phy_mode = mode;
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emacdata->phy_feat_exc = excluded;
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def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
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def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
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emacdata = def->additions;
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emacdata = def->additions;
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memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
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memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
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emacdata->phy_mode = mode;
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emacdata->phy_mode = mode;
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emacdata->phy_feat_exc = excluded;
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}
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}
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static int
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static int
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@ -67,6 +67,7 @@ struct ocp_func_emac_data {
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int phy_mode; /* PHY type or configurable mode */
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int phy_mode; /* PHY type or configurable mode */
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u8 mac_addr[6]; /* EMAC mac address */
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u8 mac_addr[6]; /* EMAC mac address */
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u32 phy_map; /* EMAC phy map */
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u32 phy_map; /* EMAC phy map */
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u32 phy_feat_exc; /* Excluded PHY features */
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};
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};
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/* Sysfs support */
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/* Sysfs support */
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