ASoC: rt5663: Seprate the DC offset between headphone and headset
The patch seprates the DC offset between headphone and headset. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -14,8 +14,11 @@ Optional properties:
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- "realtek,dc_offset_l_manual"
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- "realtek,dc_offset_r_manual"
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- "realtek,dc_offset_l_manual_mic"
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- "realtek,dc_offset_r_manual_mic"
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Based on the different PCB layout, add the manual offset value to
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compensate the DC offset for each L and R channel.
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compensate the DC offset for each L and R channel, and they are different
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between headphone and headset.
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Pins on the device (for linking into audio routes) for RT5663:
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@ -14,6 +14,8 @@
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struct rt5663_platform_data {
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unsigned int dc_offset_l_manual;
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unsigned int dc_offset_r_manual;
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unsigned int dc_offset_l_manual_mic;
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unsigned int dc_offset_r_manual_mic;
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};
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#endif
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@ -1570,9 +1570,43 @@ static int rt5663_jack_detect(struct snd_soc_codec *codec, int jack_insert)
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case 2:
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rt5663->jack_type = SND_JACK_HEADSET;
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rt5663_enable_push_button_irq(codec, true);
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if (rt5663->pdata.dc_offset_l_manual_mic) {
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2,
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rt5663->pdata.dc_offset_l_manual_mic >>
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16);
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3,
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rt5663->pdata.dc_offset_l_manual_mic &
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0xffff);
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}
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if (rt5663->pdata.dc_offset_r_manual_mic) {
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5,
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rt5663->pdata.dc_offset_r_manual_mic >>
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16);
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6,
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rt5663->pdata.dc_offset_r_manual_mic &
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0xffff);
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}
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break;
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default:
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rt5663->jack_type = SND_JACK_HEADPHONE;
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if (rt5663->pdata.dc_offset_l_manual) {
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2,
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rt5663->pdata.dc_offset_l_manual >> 16);
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3,
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rt5663->pdata.dc_offset_l_manual &
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0xffff);
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}
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if (rt5663->pdata.dc_offset_r_manual) {
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5,
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rt5663->pdata.dc_offset_r_manual >> 16);
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6,
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rt5663->pdata.dc_offset_r_manual &
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0xffff);
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}
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break;
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}
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} else {
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@ -3133,6 +3167,10 @@ static int rt5663_parse_dp(struct rt5663_priv *rt5663, struct device *dev)
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&rt5663->pdata.dc_offset_l_manual);
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device_property_read_u32(dev, "realtek,dc_offset_r_manual",
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&rt5663->pdata.dc_offset_r_manual);
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device_property_read_u32(dev, "realtek,dc_offset_l_manual_mic",
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&rt5663->pdata.dc_offset_l_manual_mic);
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device_property_read_u32(dev, "realtek,dc_offset_r_manual_mic",
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&rt5663->pdata.dc_offset_r_manual_mic);
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return 0;
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}
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@ -3221,20 +3259,6 @@ static int rt5663_i2c_probe(struct i2c_client *i2c,
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dev_err(&i2c->dev, "%s:Unknown codec type\n", __func__);
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}
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if (rt5663->pdata.dc_offset_l_manual) {
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2,
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rt5663->pdata.dc_offset_l_manual >> 16);
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3,
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rt5663->pdata.dc_offset_l_manual & 0xffff);
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}
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if (rt5663->pdata.dc_offset_r_manual) {
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5,
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rt5663->pdata.dc_offset_r_manual >> 16);
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regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6,
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rt5663->pdata.dc_offset_r_manual & 0xffff);
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}
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/* GPIO1 as IRQ */
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regmap_update_bits(rt5663->regmap, RT5663_GPIO_1, RT5663_GP1_PIN_MASK,
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RT5663_GP1_PIN_IRQ);
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