Merge rsync://ozlabs.org/sfr-git/for-paulus/
This commit is contained in:
Коммит
292dcc86dd
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@ -142,8 +142,8 @@ config POWER4
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def_bool y
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config PPC_FPU
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bool
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default y if PPC64
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depends on PPC32
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def_bool y
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config BOOKE
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bool
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@ -317,7 +317,7 @@ config PPC_BPA
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config PPC_OF
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bool
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depends on PPC_MULTIPLATFORM # for now
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depends on PPC_MULTIPLATFORM || PPC_ISERIES
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default y
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config XICS
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@ -833,6 +833,12 @@ config PIN_TLB
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depends on ADVANCED_OPTIONS && 8xx
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endmenu
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if PPC64
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config KERNEL_START
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hex
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default "0xc000000000000000"
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endif
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source "net/Kconfig"
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source "drivers/Kconfig"
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@ -55,7 +55,7 @@ config BDI_SWITCH
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config BOOTX_TEXT
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bool "Support for early boot text console (BootX or OpenFirmware only)"
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depends PPC_OF
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depends PPC_OF && !PPC_ISERIES
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help
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Say Y here to see progress messages from the boot firmware in text
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mode. Requires either BootX or Open Firmware.
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@ -121,16 +121,17 @@ head-$(CONFIG_FSL_BOOKE) := arch/powerpc/kernel/head_fsl_booke.o
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ifeq ($(CONFIG_PPC32),y)
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head-$(CONFIG_6xx) += arch/powerpc/kernel/idle_6xx.o
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head-$(CONFIG_POWER4) += arch/powerpc/kernel/idle_power4.o
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head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
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endif
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core-y += arch/powerpc/kernel/ \
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arch/$(OLDARCH)/kernel/ \
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arch/powerpc/mm/ \
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arch/powerpc/lib/ \
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arch/powerpc/sysdev/ \
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arch/powerpc/platforms/
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core-y += arch/powerpc/kernel/
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core-y += arch/$(OLDARCH)/kernel/
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core-$(CONFIG_PPC32) += arch/powerpc/mm/
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core-$(CONFIG_PPC64) += arch/$(OLDARCH)/mm/
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core-$(CONFIG_PPC32) += arch/powerpc/lib/
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libs-$(CONFIG_PPC64) += arch/$(OLDARCH)/lib/
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core-y += arch/powerpc/sysdev/
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core-y += arch/powerpc/platforms/
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core-$(CONFIG_PPC32) += arch/ppc/syslib/
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core-$(CONFIG_MATH_EMULATION) += arch/ppc/math-emu/
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core-$(CONFIG_XMON) += arch/powerpc/xmon/
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@ -141,17 +142,20 @@ drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/
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drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
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BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
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.PHONY: $(BOOT_TARGETS)
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all: uImage zImage
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defaultimage-$(CONFIG_PPC32) := uImage zImage
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defaultimage-$(CONFIG_PPC_ISERIES) := vmlinux
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KBUILD_IMAGE := $(defaultimage-y)
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all: $(KBUILD_IMAGE)
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CPPFLAGS_vmlinux.lds := -Upowerpc
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# All the instructions talk about "make bzImage".
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bzImage: zImage
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BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
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.PHONY: $(BOOT_TARGETS)
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boot := arch/$(OLDARCH)/boot
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$(BOOT_TARGETS): vmlinux
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@ -2,17 +2,31 @@
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# Makefile for the linux kernel.
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#
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ifeq ($(CONFIG_PPC64),y)
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EXTRA_CFLAGS += -mno-minimal-toc
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endif
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ifeq ($(CONFIG_PPC32),y)
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extra-$(CONFIG_PPC_STD_MMU) := head.o
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extra_$(CONFIG_PPC64) := head_64.o
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endif
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extra-$(CONFIG_PPC64) := head_64.o
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extra-$(CONFIG_40x) := head_4xx.o
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extra-$(CONFIG_44x) := head_44x.o
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extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
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extra-$(CONFIG_8xx) := head_8xx.o
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extra-$(CONFIG_6xx) += idle_6xx.o
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extra-$(CONFIG_POWER4) += idle_power4.o
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extra-$(CONFIG_PPC_FPU) += fpu.o
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extra-y += vmlinux.lds
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obj-y := semaphore.o traps.o process.o
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obj-y := traps.o
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obj-$(CONFIG_PPC32) += semaphore.o process.o
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obj-$(CONFIG_PPC64) += idle_power4.o
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ifeq ($(CONFIG_PPC32),y)
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obj-$(CONFIG_MODULES) += ppc_ksyms.o
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endif
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obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
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ifeq ($(CONFIG_PPC_ISERIES),y)
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arch/powerpc/kernel/head_64.o: arch/powerpc/platforms/iseries/lparmap.s
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AFLAGS_head_64.o += -Iarch/powerpc/platforms/iseries
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endif
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@ -20,17 +20,20 @@
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/suspend.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#ifdef CONFIG_PPC64
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#include <linux/time.h>
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#include <linux/hardirq.h>
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#else
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#include <linux/ptrace.h>
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#include <linux/suspend.h>
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#endif
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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#ifdef CONFIG_PPC64
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@ -50,63 +53,117 @@
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int main(void)
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{
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/* thread struct on stack */
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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#ifdef CONFIG_PPC32
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DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
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#endif
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#ifdef CONFIG_PPC64
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DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror));
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DEFINE(THREAD_SHIFT, THREAD_SHIFT);
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#endif
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DEFINE(THREAD_SIZE, THREAD_SIZE);
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/* task_struct->thread */
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DEFINE(THREAD, offsetof(struct task_struct, thread));
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DEFINE(THREAD_INFO, offsetof(struct task_struct, thread_info));
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DEFINE(MM, offsetof(struct task_struct, mm));
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#ifdef CONFIG_PPC64
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DEFINE(THREAD_SHIFT, THREAD_SHIFT);
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DEFINE(THREAD_SIZE, THREAD_SIZE);
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DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
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#else
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DEFINE(THREAD_INFO, offsetof(struct task_struct, thread_info));
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DEFINE(PTRACE, offsetof(struct task_struct, ptrace));
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#endif /* CONFIG_PPC64 */
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DEFINE(KSP, offsetof(struct thread_struct, ksp));
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DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
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DEFINE(LAST_SYSCALL, offsetof(struct thread_struct, last_syscall));
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DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
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DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
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DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
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DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
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DEFINE(PT_PTRACED, PT_PTRACED);
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#endif
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#ifdef CONFIG_PPC64
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DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
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#endif
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#ifdef CONFIG_ALTIVEC
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DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
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DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
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DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
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DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_PPC64
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DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
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#else /* CONFIG_PPC64 */
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DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
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DEFINE(LAST_SYSCALL, offsetof(struct thread_struct, last_syscall));
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
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DEFINE(PT_PTRACED, PT_PTRACED);
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#endif
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#ifdef CONFIG_SPE
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DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
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DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
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DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
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DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
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#endif /* CONFIG_SPE */
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#endif /* CONFIG_PPC64 */
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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#ifdef CONFIG_PPC64
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DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror));
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#else
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
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DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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#endif /* CONFIG_PPC64 */
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#ifdef CONFIG_PPC64
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DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
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DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
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DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
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DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
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DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
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DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
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DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
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/* paca */
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DEFINE(PACA_SIZE, sizeof(struct paca_struct));
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DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
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DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
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DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
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DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
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DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
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DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
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DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
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DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
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DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
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DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
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DEFINE(PACAPROCENABLED, offsetof(struct paca_struct, proc_enabled));
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DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
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DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
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DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
|
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#ifdef CONFIG_HUGETLB_PAGE
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DEFINE(PACALOWHTLBAREAS, offsetof(struct paca_struct, context.low_htlb_areas));
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DEFINE(PACAHIGHHTLBAREAS, offsetof(struct paca_struct, context.high_htlb_areas));
|
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#endif /* CONFIG_HUGETLB_PAGE */
|
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DEFINE(PACADEFAULTDECR, offsetof(struct paca_struct, default_decr));
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DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
|
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DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
|
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DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
|
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DEFINE(PACA_EXDSI, offsetof(struct paca_struct, exdsi));
|
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DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
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DEFINE(PACALPPACA, offsetof(struct paca_struct, lppaca));
|
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DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
|
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|
||||
DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
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DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
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DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
|
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DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
|
||||
|
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/* RTAS */
|
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DEFINE(RTASBASE, offsetof(struct rtas_t, base));
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DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
|
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#endif /* CONFIG_PPC64 */
|
||||
|
||||
/* Interrupt register frame */
|
||||
DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
|
||||
#ifndef CONFIG_PPC64
|
||||
DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
|
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#else
|
||||
#else /* CONFIG_PPC64 */
|
||||
DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
|
||||
|
||||
/* 288 = # of volatile regs, int & fp, for leaf routines */
|
||||
/* which do not stack a frame. See the PPC64 ABI. */
|
||||
DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 288);
|
||||
#endif
|
||||
/* in fact we only use gpr0 - gpr9 and gpr20 - gpr23 */
|
||||
/* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
|
||||
DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
|
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DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
|
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DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
|
||||
DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
|
||||
|
@ -121,6 +178,7 @@ int main(void)
|
|||
DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
|
||||
DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
|
||||
DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
|
||||
#ifndef CONFIG_PPC64
|
||||
DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
|
||||
DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
|
||||
DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
|
||||
|
@ -139,6 +197,7 @@ int main(void)
|
|||
DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
|
||||
DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
|
||||
DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
|
||||
#endif /* CONFIG_PPC64 */
|
||||
/*
|
||||
* Note: these symbols include _ because they overlap with special
|
||||
* register names
|
||||
|
@ -148,23 +207,37 @@ int main(void)
|
|||
DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
|
||||
DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
|
||||
DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
|
||||
DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
|
||||
DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
|
||||
DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
|
||||
DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
|
||||
/* The PowerPC 400-class & Book-E processors have neither the DAR nor the DSISR
|
||||
* SPRs. Hence, we overload them to hold the similar DEAR and ESR SPRs
|
||||
* for such processors. For critical interrupts we use them to
|
||||
* hold SRR0 and SRR1.
|
||||
DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
|
||||
DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
|
||||
#ifndef CONFIG_PPC64
|
||||
DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
|
||||
/*
|
||||
* The PowerPC 400-class & Book-E processors have neither the DAR
|
||||
* nor the DSISR SPRs. Hence, we overload them to hold the similar
|
||||
* DEAR and ESR SPRs for such processors. For critical interrupts
|
||||
* we use them to hold SRR0 and SRR1.
|
||||
*/
|
||||
DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
|
||||
DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
|
||||
DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
|
||||
DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
|
||||
DEFINE(TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
|
||||
#else /* CONFIG_PPC64 */
|
||||
DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
|
||||
DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
|
||||
|
||||
/* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
|
||||
DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
|
||||
DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
DEFINE(CLONE_VM, CLONE_VM);
|
||||
DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
|
||||
|
||||
#ifndef CONFIG_PPC64
|
||||
DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
|
||||
#endif /* ! CONFIG_PPC64 */
|
||||
|
||||
/* About the CPU features table */
|
||||
DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec));
|
||||
|
@ -173,66 +246,13 @@ int main(void)
|
|||
DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
|
||||
DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
DEFINE(MM, offsetof(struct task_struct, mm));
|
||||
DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
|
||||
|
||||
DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
|
||||
DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
|
||||
DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
|
||||
DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
|
||||
DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
|
||||
DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
|
||||
DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
|
||||
|
||||
/* paca */
|
||||
DEFINE(PACA_SIZE, sizeof(struct paca_struct));
|
||||
DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
|
||||
DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
|
||||
DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
|
||||
DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
|
||||
DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
|
||||
DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
|
||||
DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
|
||||
DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
|
||||
DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
|
||||
DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
|
||||
DEFINE(PACAPROCENABLED, offsetof(struct paca_struct, proc_enabled));
|
||||
DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
|
||||
DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
|
||||
DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
|
||||
#ifdef CONFIG_HUGETLB_PAGE
|
||||
DEFINE(PACALOWHTLBAREAS, offsetof(struct paca_struct, context.low_htlb_areas));
|
||||
DEFINE(PACAHIGHHTLBAREAS, offsetof(struct paca_struct, context.high_htlb_areas));
|
||||
#endif /* CONFIG_HUGETLB_PAGE */
|
||||
DEFINE(PACADEFAULTDECR, offsetof(struct paca_struct, default_decr));
|
||||
DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
|
||||
DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
|
||||
DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
|
||||
DEFINE(PACA_EXDSI, offsetof(struct paca_struct, exdsi));
|
||||
DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
|
||||
DEFINE(PACALPPACA, offsetof(struct paca_struct, lppaca));
|
||||
DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
|
||||
DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
|
||||
DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
|
||||
DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
|
||||
DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
|
||||
|
||||
/* RTAS */
|
||||
DEFINE(RTASBASE, offsetof(struct rtas_t, base));
|
||||
DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
|
||||
|
||||
DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
|
||||
DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
|
||||
|
||||
/* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
|
||||
DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
|
||||
DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
|
||||
|
||||
/* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
|
||||
DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
|
||||
DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
|
||||
#ifndef CONFIG_PPC64
|
||||
DEFINE(pbe_address, offsetof(struct pbe, address));
|
||||
DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
|
||||
DEFINE(pbe_next, offsetof(struct pbe, next));
|
||||
|
||||
DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
|
||||
#else /* CONFIG_PPC64 */
|
||||
/* systemcfg offsets for use by vdso */
|
||||
DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct systemcfg, tb_orig_stamp));
|
||||
DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct systemcfg, tb_ticks_per_sec));
|
||||
|
@ -251,12 +271,6 @@ int main(void)
|
|||
DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
|
||||
DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
|
||||
DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
|
||||
#endif
|
||||
|
||||
DEFINE(pbe_address, offsetof(struct pbe, address));
|
||||
DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
|
||||
DEFINE(pbe_next, offsetof(struct pbe, next));
|
||||
|
||||
DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -349,12 +349,12 @@ i##n: \
|
|||
|
||||
/* System reset */
|
||||
/* core99 pmac starts the seconary here by changing the vector, and
|
||||
putting it back to what it was (UnknownException) when done. */
|
||||
putting it back to what it was (unknown_exception) when done. */
|
||||
#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
|
||||
. = 0x100
|
||||
b __secondary_start_gemini
|
||||
#else
|
||||
EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD)
|
||||
EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
|
||||
#endif
|
||||
|
||||
/* Machine check */
|
||||
|
@ -389,7 +389,7 @@ i##n: \
|
|||
cmpwi cr1,r4,0
|
||||
bne cr1,1f
|
||||
#endif
|
||||
EXC_XFER_STD(0x200, MachineCheckException)
|
||||
EXC_XFER_STD(0x200, machine_check_exception)
|
||||
#ifdef CONFIG_PPC_CHRP
|
||||
1: b machine_check_in_rtas
|
||||
#endif
|
||||
|
@ -456,10 +456,10 @@ Alignment:
|
|||
mfspr r5,SPRN_DSISR
|
||||
stw r5,_DSISR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0x600, AlignmentException)
|
||||
EXC_XFER_EE(0x600, alignment_exception)
|
||||
|
||||
/* Program check exception */
|
||||
EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD)
|
||||
EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
|
||||
|
||||
/* Floating-point unavailable */
|
||||
. = 0x800
|
||||
|
@ -472,8 +472,8 @@ FPUnavailable:
|
|||
/* Decrementer */
|
||||
EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
|
||||
|
||||
EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* System call */
|
||||
. = 0xc00
|
||||
|
@ -482,8 +482,8 @@ SystemCall:
|
|||
EXC_XFER_EE_LITE(0xc00, DoSyscall)
|
||||
|
||||
/* Single step - not used on 601 */
|
||||
EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/*
|
||||
* The Altivec unavailable trap is at 0x0f20. Foo.
|
||||
|
@ -502,7 +502,7 @@ SystemCall:
|
|||
Trap_0f:
|
||||
EXCEPTION_PROLOG
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0xf00, UnknownException)
|
||||
EXC_XFER_EE(0xf00, unknown_exception)
|
||||
|
||||
/*
|
||||
* Handle TLB miss for instruction on 603/603e.
|
||||
|
@ -702,44 +702,44 @@ DataStoreTLBMiss:
|
|||
rfi
|
||||
|
||||
#ifndef CONFIG_ALTIVEC
|
||||
#define AltivecAssistException UnknownException
|
||||
#define altivec_assist_exception unknown_exception
|
||||
#endif
|
||||
|
||||
EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE)
|
||||
EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
|
||||
#ifdef CONFIG_POWER4
|
||||
EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, AltivecAssistException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD)
|
||||
#else /* !CONFIG_POWER4 */
|
||||
EXCEPTION(0x1600, Trap_16, AltivecAssistException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
|
||||
EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
|
||||
#endif /* CONFIG_POWER4 */
|
||||
EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2100, Trap_21, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2200, Trap_22, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2300, Trap_23, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2400, Trap_24, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2500, Trap_25, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2600, Trap_26, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2700, Trap_27, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2800, Trap_28, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2900, Trap_29, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2a00, Trap_2a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2b00, Trap_2b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2c00, Trap_2c, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2d00, Trap_2d, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2e00, Trap_2e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2f00, MOLTrampoline, UnknownException, EXC_XFER_EE_LITE)
|
||||
EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
|
||||
|
||||
.globl mol_trampoline
|
||||
.set mol_trampoline, i0x2f00
|
||||
|
@ -751,7 +751,7 @@ AltiVecUnavailable:
|
|||
#ifdef CONFIG_ALTIVEC
|
||||
bne load_up_altivec /* if from user, just load it up */
|
||||
#endif /* CONFIG_ALTIVEC */
|
||||
EXC_XFER_EE_LITE(0xf20, AltivecUnavailException)
|
||||
EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
|
||||
|
||||
#ifdef CONFIG_PPC64BRIDGE
|
||||
DataAccess:
|
||||
|
@ -767,12 +767,12 @@ DataSegment:
|
|||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
mfspr r4,SPRN_DAR
|
||||
stw r4,_DAR(r11)
|
||||
EXC_XFER_STD(0x380, UnknownException)
|
||||
EXC_XFER_STD(0x380, unknown_exception)
|
||||
|
||||
InstructionSegment:
|
||||
EXCEPTION_PROLOG
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_STD(0x480, UnknownException)
|
||||
EXC_XFER_STD(0x480, unknown_exception)
|
||||
#endif /* CONFIG_PPC64BRIDGE */
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
|
|
|
@ -309,13 +309,13 @@ skpinv: addi r4,r4,1 /* Increment */
|
|||
|
||||
interrupt_base:
|
||||
/* Critical Input Interrupt */
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
|
||||
|
||||
/* Machine Check Interrupt */
|
||||
#ifdef CONFIG_440A
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#endif
|
||||
|
||||
/* Data Storage Interrupt */
|
||||
|
@ -442,7 +442,7 @@ interrupt_base:
|
|||
#ifdef CONFIG_PPC_FPU
|
||||
FP_UNAVAILABLE_EXCEPTION
|
||||
#else
|
||||
EXCEPTION(0x2010, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
|
||||
/* System Call Interrupt */
|
||||
|
@ -451,21 +451,21 @@ interrupt_base:
|
|||
EXC_XFER_EE_LITE(0x0c00, DoSyscall)
|
||||
|
||||
/* Auxillary Processor Unavailable Interrupt */
|
||||
EXCEPTION(0x2020, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Decrementer Interrupt */
|
||||
DECREMENTER_EXCEPTION
|
||||
|
||||
/* Fixed Internal Timer Interrupt */
|
||||
/* TODO: Add FIT support */
|
||||
EXCEPTION(0x1010, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Watchdog Timer Interrupt */
|
||||
/* TODO: Add watchdog support */
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
|
||||
#endif
|
||||
|
||||
/* Data TLB Error Interrupt */
|
||||
|
|
|
@ -245,12 +245,12 @@ label:
|
|||
/*
|
||||
* 0x0100 - Critical Interrupt Exception
|
||||
*/
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
|
||||
|
||||
/*
|
||||
* 0x0200 - Machine Check Exception
|
||||
*/
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
|
||||
/*
|
||||
* 0x0300 - Data Storage Exception
|
||||
|
@ -405,7 +405,7 @@ label:
|
|||
mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */
|
||||
stw r4,_DEAR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0x600, AlignmentException)
|
||||
EXC_XFER_EE(0x600, alignment_exception)
|
||||
|
||||
/* 0x0700 - Program Exception */
|
||||
START_EXCEPTION(0x0700, ProgramCheck)
|
||||
|
@ -413,21 +413,21 @@ label:
|
|||
mfspr r4,SPRN_ESR /* Grab the ESR and save it */
|
||||
stw r4,_ESR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_STD(0x700, ProgramCheckException)
|
||||
EXC_XFER_STD(0x700, program_check_exception)
|
||||
|
||||
EXCEPTION(0x0800, Trap_08, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0900, Trap_09, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0A00, Trap_0A, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0B00, Trap_0B, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* 0x0C00 - System Call Exception */
|
||||
START_EXCEPTION(0x0C00, SystemCall)
|
||||
NORMAL_EXCEPTION_PROLOG
|
||||
EXC_XFER_EE_LITE(0xc00, DoSyscall)
|
||||
|
||||
EXCEPTION(0x0D00, Trap_0D, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0E00, Trap_0E, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0F00, Trap_0F, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* 0x1000 - Programmable Interval Timer (PIT) Exception */
|
||||
START_EXCEPTION(0x1000, Decrementer)
|
||||
|
@ -444,14 +444,14 @@ label:
|
|||
|
||||
/* 0x1010 - Fixed Interval Timer (FIT) Exception
|
||||
*/
|
||||
STND_EXCEPTION(0x1010, FITException, UnknownException)
|
||||
STND_EXCEPTION(0x1010, FITException, unknown_exception)
|
||||
|
||||
/* 0x1020 - Watchdog Timer (WDT) Exception
|
||||
*/
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
@ -656,25 +656,25 @@ label:
|
|||
mfspr r10, SPRN_SPRG0
|
||||
b InstructionAccess
|
||||
|
||||
EXCEPTION(0x1300, Trap_13, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1400, Trap_14, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
|
||||
#ifdef CONFIG_IBM405_ERR51
|
||||
/* 405GP errata 51 */
|
||||
START_EXCEPTION(0x1700, Trap_17)
|
||||
b DTLBMiss
|
||||
#else
|
||||
EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1A00, Trap_1A, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1B00, Trap_1B, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1C00, Trap_1C, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1D00, Trap_1D, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1E00, Trap_1E, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1F00, Trap_1F, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Check for a single step debug exception while in an exception
|
||||
* handler before state has been saved. This is to catch the case
|
||||
|
|
|
@ -1253,7 +1253,7 @@ unrecov_slb:
|
|||
*
|
||||
* On iSeries, the hypervisor must fill in at least one entry before
|
||||
* we get control (with relocate on). The address is give to the hv
|
||||
* as a page number (see xLparMap in LparData.c), so this must be at a
|
||||
* as a page number (see xLparMap in lpardata.c), so this must be at a
|
||||
* fixed address (the linker can't compute (u64)&initial_stab >>
|
||||
* PAGE_SHIFT).
|
||||
*/
|
||||
|
@ -1364,6 +1364,7 @@ _STATIC(__start_initialization_iSeries)
|
|||
addi r2,r2,0x4000
|
||||
|
||||
bl .iSeries_early_setup
|
||||
bl .early_setup
|
||||
|
||||
/* relocation is on at this point */
|
||||
|
||||
|
@ -1970,20 +1971,22 @@ _GLOBAL(hmt_start_secondary)
|
|||
blr
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEXEC) || (defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES))
|
||||
#if defined(CONFIG_KEXEC) || defined(CONFIG_SMP)
|
||||
_GLOBAL(smp_release_cpus)
|
||||
/* All secondary cpus are spinning on a common
|
||||
* spinloop, release them all now so they can start
|
||||
* to spin on their individual paca spinloops.
|
||||
* For non SMP kernels, the secondary cpus never
|
||||
* get out of the common spinloop.
|
||||
* XXX This does nothing useful on iSeries, secondaries are
|
||||
* already waiting on their paca.
|
||||
*/
|
||||
li r3,1
|
||||
LOADADDR(r5,__secondary_hold_spinloop)
|
||||
std r3,0(r5)
|
||||
sync
|
||||
blr
|
||||
#endif /* CONFIG_SMP && !CONFIG_PPC_ISERIES */
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -203,7 +203,7 @@ i##n: \
|
|||
ret_from_except)
|
||||
|
||||
/* System reset */
|
||||
EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD)
|
||||
EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
|
||||
|
||||
/* Machine check */
|
||||
. = 0x200
|
||||
|
@ -214,7 +214,7 @@ MachineCheck:
|
|||
mfspr r5,SPRN_DSISR
|
||||
stw r5,_DSISR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_STD(0x200, MachineCheckException)
|
||||
EXC_XFER_STD(0x200, machine_check_exception)
|
||||
|
||||
/* Data access exception.
|
||||
* This is "never generated" by the MPC8xx. We jump to it for other
|
||||
|
@ -252,20 +252,20 @@ Alignment:
|
|||
mfspr r5,SPRN_DSISR
|
||||
stw r5,_DSISR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0x600, AlignmentException)
|
||||
EXC_XFER_EE(0x600, alignment_exception)
|
||||
|
||||
/* Program check exception */
|
||||
EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD)
|
||||
EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
|
||||
|
||||
/* No FPU on MPC8xx. This exception is not supposed to happen.
|
||||
*/
|
||||
EXCEPTION(0x800, FPUnavailable, UnknownException, EXC_XFER_STD)
|
||||
EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
|
||||
|
||||
/* Decrementer */
|
||||
EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
|
||||
|
||||
EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* System call */
|
||||
. = 0xc00
|
||||
|
@ -274,9 +274,9 @@ SystemCall:
|
|||
EXC_XFER_EE_LITE(0xc00, DoSyscall)
|
||||
|
||||
/* Single step - not used on 601 */
|
||||
EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xf00, Trap_0f, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* On the MPC8xx, this is a software emulation interrupt. It occurs
|
||||
* for all unimplemented and illegal instructions.
|
||||
|
@ -540,22 +540,22 @@ DataTLBError:
|
|||
#endif
|
||||
b DataAccess
|
||||
|
||||
EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* On the MPC8xx, these next four traps are used for development
|
||||
* support of breakpoints and such. Someday I will get around to
|
||||
* using them.
|
||||
*/
|
||||
EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
. = 0x2000
|
||||
|
||||
|
|
|
@ -426,14 +426,14 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
|
||||
interrupt_base:
|
||||
/* Critical Input Interrupt */
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
|
||||
|
||||
/* Machine Check Interrupt */
|
||||
#ifdef CONFIG_E200
|
||||
/* no RFMCI, MCSRRs on E200 */
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#else
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#endif
|
||||
|
||||
/* Data Storage Interrupt */
|
||||
|
@ -542,9 +542,9 @@ interrupt_base:
|
|||
#else
|
||||
#ifdef CONFIG_E200
|
||||
/* E200 treats 'normal' floating point instructions as FP Unavail exception */
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
|
||||
#else
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
@ -554,20 +554,20 @@ interrupt_base:
|
|||
EXC_XFER_EE_LITE(0x0c00, DoSyscall)
|
||||
|
||||
/* Auxillary Processor Unavailable Interrupt */
|
||||
EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Decrementer Interrupt */
|
||||
DECREMENTER_EXCEPTION
|
||||
|
||||
/* Fixed Internal Timer Interrupt */
|
||||
/* TODO: Add FIT support */
|
||||
EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Watchdog Timer Interrupt */
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
|
||||
#endif
|
||||
|
||||
/* Data TLB Error Interrupt */
|
||||
|
@ -696,21 +696,21 @@ interrupt_base:
|
|||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE_LITE(0x2010, KernelSPE)
|
||||
#else
|
||||
EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif /* CONFIG_SPE */
|
||||
|
||||
/* SPE Floating Point Data */
|
||||
#ifdef CONFIG_SPE
|
||||
EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
|
||||
#else
|
||||
EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
|
||||
#endif /* CONFIG_SPE */
|
||||
|
||||
/* SPE Floating Point Round */
|
||||
EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Performance Monitor */
|
||||
EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD)
|
||||
EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
|
||||
|
||||
|
||||
/* Debug Interrupt */
|
||||
|
|
|
@ -76,4 +76,3 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
|
|||
isync
|
||||
sync
|
||||
blr
|
||||
|
|
@ -53,10 +53,10 @@
|
|||
|
||||
extern void transfer_to_handler(void);
|
||||
extern void do_IRQ(struct pt_regs *regs);
|
||||
extern void MachineCheckException(struct pt_regs *regs);
|
||||
extern void AlignmentException(struct pt_regs *regs);
|
||||
extern void ProgramCheckException(struct pt_regs *regs);
|
||||
extern void SingleStepException(struct pt_regs *regs);
|
||||
extern void machine_check_exception(struct pt_regs *regs);
|
||||
extern void alignment_exception(struct pt_regs *regs);
|
||||
extern void program_check_exception(struct pt_regs *regs);
|
||||
extern void single_step_exception(struct pt_regs *regs);
|
||||
extern int do_signal(sigset_t *, struct pt_regs *);
|
||||
extern int pmac_newworld;
|
||||
extern int sys_sigreturn(struct pt_regs *regs);
|
||||
|
@ -72,10 +72,10 @@ EXPORT_SYMBOL(clear_user_page);
|
|||
EXPORT_SYMBOL(do_signal);
|
||||
EXPORT_SYMBOL(transfer_to_handler);
|
||||
EXPORT_SYMBOL(do_IRQ);
|
||||
EXPORT_SYMBOL(MachineCheckException);
|
||||
EXPORT_SYMBOL(AlignmentException);
|
||||
EXPORT_SYMBOL(ProgramCheckException);
|
||||
EXPORT_SYMBOL(SingleStepException);
|
||||
EXPORT_SYMBOL(machine_check_exception);
|
||||
EXPORT_SYMBOL(alignment_exception);
|
||||
EXPORT_SYMBOL(program_check_exception);
|
||||
EXPORT_SYMBOL(single_step_exception);
|
||||
EXPORT_SYMBOL(sys_sigreturn);
|
||||
EXPORT_SYMBOL(ppc_n_lost_interrupts);
|
||||
EXPORT_SYMBOL(ppc_lost_interrupts);
|
||||
|
|
|
@ -1,6 +1,4 @@
|
|||
/*
|
||||
* arch/powerpc/kernel/traps.c
|
||||
*
|
||||
* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
|
@ -23,29 +21,46 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/unistd.h>
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/user.h>
|
||||
#include <linux/a.out.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/config.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/prctl.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kprobes.h>
|
||||
#include <asm/kdebug.h>
|
||||
#ifdef CONFIG_PPC32
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/prctl.h>
|
||||
#endif
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
#ifdef CONFIG_PPC32
|
||||
#include <asm/reg.h>
|
||||
#include <asm/xmon.h>
|
||||
#ifdef CONFIG_PMAC_BACKLIGHT
|
||||
#include <asm/backlight.h>
|
||||
#endif
|
||||
#include <asm/perfmon.h>
|
||||
#endif
|
||||
#ifdef CONFIG_PPC64
|
||||
#include <asm/processor.h>
|
||||
#include <asm/ppcdebug.h>
|
||||
#include <asm/rtas.h>
|
||||
#include <asm/systemcfg.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pmc.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#define __KPROBES __kprobes
|
||||
#else
|
||||
#define __KPROBES
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUGGER
|
||||
int (*__debugger)(struct pt_regs *regs);
|
||||
|
@ -96,7 +111,7 @@ int die(const char *str, struct pt_regs *regs, long err)
|
|||
console_verbose();
|
||||
spin_lock_irq(&die_lock);
|
||||
bust_spinlocks(1);
|
||||
#ifdef CONFIG_PMAC_BACKLIGHT
|
||||
#if defined(CONFIG_PPC32) && defined(CONFIG_PMAC_BACKLIGHT)
|
||||
if (_machine == _MACH_Pmac) {
|
||||
set_backlight_enable(1);
|
||||
set_backlight_level(BACKLIGHT_MAX);
|
||||
|
@ -154,9 +169,17 @@ int die(const char *str, struct pt_regs *regs, long err)
|
|||
panic("Fatal exception in interrupt");
|
||||
|
||||
if (panic_on_oops) {
|
||||
#ifdef CONFIG_PPC64
|
||||
printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
|
||||
ssleep(5);
|
||||
#endif
|
||||
panic("Fatal exception");
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
do_exit(err);
|
||||
#else
|
||||
do_exit(SIGSEGV);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -176,6 +199,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
|
|||
info.si_addr = (void __user *) addr;
|
||||
force_sig_info(signr, &info, current);
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
/*
|
||||
* Init gets no signals that it doesn't have a handler for.
|
||||
* That's all very well, but if it has caused a synchronous
|
||||
|
@ -197,6 +221,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
|
|||
do_exit(signr);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
|
@ -206,7 +231,7 @@ void system_reset_exception(struct pt_regs *regs)
|
|||
if (ppc_md.system_reset_exception)
|
||||
ppc_md.system_reset_exception(regs);
|
||||
|
||||
die("System Reset", regs, SIGABRT);
|
||||
die("System Reset", regs, 0);
|
||||
|
||||
/* Must die if the interrupt is not recoverable */
|
||||
if (!(regs->msr & MSR_RI))
|
||||
|
@ -216,6 +241,7 @@ void system_reset_exception(struct pt_regs *regs)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
/*
|
||||
* I/O accesses can cause machine checks on powermacs.
|
||||
* Check if the NIP corresponds to the address of a sync
|
||||
|
@ -264,8 +290,10 @@ static inline int check_io_access(struct pt_regs *regs)
|
|||
#endif /* CONFIG_PPC_PMAC */
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
|
||||
|
||||
/* On 4xx, the reason for the machine check or program exception
|
||||
is in the ESR. */
|
||||
#define get_reason(regs) ((regs)->dsisr)
|
||||
|
@ -284,6 +312,7 @@ static inline int check_io_access(struct pt_regs *regs)
|
|||
#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
|
||||
|
||||
#else
|
||||
|
||||
/* On non-4xx, the reason for the machine check or program
|
||||
exception is in the MSR. */
|
||||
#define get_reason(regs) ((regs)->msr)
|
||||
|
@ -297,6 +326,7 @@ static inline int check_io_access(struct pt_regs *regs)
|
|||
#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
/*
|
||||
* This is "fall-back" implementation for configurations
|
||||
* which don't provide platform-specific machine check info
|
||||
|
@ -305,8 +335,9 @@ void __attribute__ ((weak))
|
|||
platform_machine_check(struct pt_regs *regs)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
void MachineCheckException(struct pt_regs *regs)
|
||||
void machine_check_exception(struct pt_regs *regs)
|
||||
{
|
||||
#ifdef CONFIG_PPC64
|
||||
int recover = 0;
|
||||
|
@ -462,23 +493,31 @@ void MachineCheckException(struct pt_regs *regs)
|
|||
* additional info, e.g. bus error registers.
|
||||
*/
|
||||
platform_machine_check(regs);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
if (debugger_fault_handler(regs))
|
||||
return;
|
||||
die("Machine check", regs, SIGBUS);
|
||||
die("Machine check", regs,
|
||||
#ifdef CONFIG_PPC32
|
||||
SIGBUS
|
||||
#else
|
||||
0
|
||||
#endif
|
||||
);
|
||||
|
||||
/* Must die if the interrupt is not recoverable */
|
||||
if (!(regs->msr & MSR_RI))
|
||||
panic("Unrecoverable Machine check");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
void SMIException(struct pt_regs *regs)
|
||||
{
|
||||
die("System Management Interrupt", regs, SIGABRT);
|
||||
}
|
||||
#endif
|
||||
|
||||
void UnknownException(struct pt_regs *regs)
|
||||
void unknown_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
|
||||
regs->nip, regs->msr, regs->trap);
|
||||
|
@ -486,7 +525,7 @@ void UnknownException(struct pt_regs *regs)
|
|||
_exception(SIGTRAP, regs, 0, 0);
|
||||
}
|
||||
|
||||
void InstructionBreakpoint(struct pt_regs *regs)
|
||||
void instruction_breakpoint_exception(struct pt_regs *regs)
|
||||
{
|
||||
if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
|
||||
5, SIGTRAP) == NOTIFY_STOP)
|
||||
|
@ -496,14 +535,20 @@ void InstructionBreakpoint(struct pt_regs *regs)
|
|||
_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
void RunModeException(struct pt_regs *regs)
|
||||
{
|
||||
_exception(SIGTRAP, regs, 0, 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
void SingleStepException(struct pt_regs *regs)
|
||||
void __KPROBES single_step_exception(struct pt_regs *regs)
|
||||
{
|
||||
#ifdef CONFIG_PPC32
|
||||
regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
|
||||
#else
|
||||
regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
|
||||
#endif
|
||||
|
||||
if (notify_die(DIE_SSTEP, "single_step", regs, 5,
|
||||
5, SIGTRAP) == NOTIFY_STOP)
|
||||
|
@ -520,15 +565,62 @@ void SingleStepException(struct pt_regs *regs)
|
|||
* pretend we got a single-step exception. This was pointed out
|
||||
* by Kumar Gala. -- paulus
|
||||
*/
|
||||
static void emulate_single_step(struct pt_regs *regs)
|
||||
static inline void emulate_single_step(struct pt_regs *regs)
|
||||
{
|
||||
if (single_stepping(regs)) {
|
||||
#ifdef CONFIG_PPC32
|
||||
clear_single_step(regs);
|
||||
_exception(SIGTRAP, regs, TRAP_TRACE, 0);
|
||||
#else
|
||||
single_step_exception(regs);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/* Illegal instruction emulation support. Originally written to
|
||||
static void parse_fpe(struct pt_regs *regs)
|
||||
{
|
||||
int code = 0;
|
||||
unsigned long fpscr;
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
/* We must make sure the FP state is consistent with
|
||||
* our MSR_FP in regs
|
||||
*/
|
||||
preempt_disable();
|
||||
if (regs->msr & MSR_FP)
|
||||
giveup_fpu(current);
|
||||
preempt_enable();
|
||||
#else
|
||||
flush_fp_to_thread(current);
|
||||
#endif
|
||||
|
||||
fpscr = current->thread.fpscr;
|
||||
|
||||
/* Invalid operation */
|
||||
if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
|
||||
code = FPE_FLTINV;
|
||||
|
||||
/* Overflow */
|
||||
else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
|
||||
code = FPE_FLTOVF;
|
||||
|
||||
/* Underflow */
|
||||
else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
|
||||
code = FPE_FLTUND;
|
||||
|
||||
/* Divide by zero */
|
||||
else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
|
||||
code = FPE_FLTDIV;
|
||||
|
||||
/* Inexact result */
|
||||
else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
|
||||
code = FPE_FLTRES;
|
||||
|
||||
_exception(SIGFPE, regs, code, regs->nip);
|
||||
}
|
||||
|
||||
/*
|
||||
* Illegal instruction emulation support. Originally written to
|
||||
* provide the PVR to user applications using the mfspr rd, PVR.
|
||||
* Return non-zero if we can't emulate, or -EFAULT if the associated
|
||||
* memory access caused an access fault. Return zero on success.
|
||||
|
@ -536,7 +628,6 @@ static void emulate_single_step(struct pt_regs *regs)
|
|||
* There are a couple of ways to do this, either "decode" the instruction
|
||||
* or directly match lots of bits. In this case, matching lots of
|
||||
* bits is faster and easier.
|
||||
*
|
||||
*/
|
||||
#define INST_MFSPR_PVR 0x7c1f42a6
|
||||
#define INST_MFSPR_PVR_MASK 0xfc1fffff
|
||||
|
@ -547,6 +638,8 @@ static void emulate_single_step(struct pt_regs *regs)
|
|||
#define INST_MCRXR 0x7c000400
|
||||
#define INST_MCRXR_MASK 0x7c0007fe
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
|
||||
#define INST_STRING 0x7c00042a
|
||||
#define INST_STRING_MASK 0x7c0007fe
|
||||
#define INST_STRING_GEN_MASK 0x7c00067e
|
||||
|
@ -622,6 +715,7 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
|
|||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
static int emulate_instruction(struct pt_regs *regs)
|
||||
{
|
||||
|
@ -643,22 +737,44 @@ static int emulate_instruction(struct pt_regs *regs)
|
|||
}
|
||||
|
||||
/* Emulating the dcba insn is just a no-op. */
|
||||
if ((instword & INST_DCBA_MASK) == INST_DCBA)
|
||||
if ((instword & INST_DCBA_MASK) == INST_DCBA) {
|
||||
#ifdef CONFIG_PPC64
|
||||
static int warned;
|
||||
|
||||
if (!warned) {
|
||||
printk(KERN_WARNING
|
||||
"process %d (%s) uses obsolete 'dcba' insn\n",
|
||||
current->pid, current->comm);
|
||||
warned = 1;
|
||||
}
|
||||
#endif /* CONFIG_PPC64 */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Emulate the mcrxr insn. */
|
||||
if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
|
||||
int shift = (instword >> 21) & 0x1c;
|
||||
unsigned int shift = (instword >> 21) & 0x1c;
|
||||
unsigned long msk = 0xf0000000UL >> shift;
|
||||
#ifdef CONFIG_PPC64
|
||||
static int warned;
|
||||
|
||||
if (!warned) {
|
||||
printk(KERN_WARNING
|
||||
"process %d (%s) uses obsolete 'mcrxr' insn\n",
|
||||
current->pid, current->comm);
|
||||
warned = 1;
|
||||
}
|
||||
#endif
|
||||
regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
|
||||
regs->xer &= ~0xf0000000UL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
/* Emulate load/store string insn. */
|
||||
if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
|
||||
return emulate_string_inst(regs, instword);
|
||||
#endif
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -686,7 +802,7 @@ struct bug_entry *find_bug(unsigned long bugaddr)
|
|||
return module_find_bug(bugaddr);
|
||||
}
|
||||
|
||||
int check_bug_trap(struct pt_regs *regs)
|
||||
static int check_bug_trap(struct pt_regs *regs)
|
||||
{
|
||||
struct bug_entry *bug;
|
||||
unsigned long addr;
|
||||
|
@ -701,34 +817,38 @@ int check_bug_trap(struct pt_regs *regs)
|
|||
return 0;
|
||||
if (bug->line & BUG_WARNING_TRAP) {
|
||||
/* this is a WARN_ON rather than BUG/BUG_ON */
|
||||
#ifdef CONFIG_XMON
|
||||
#if defined(CONFIG_PPC32) && defined(CONFIG_XMON)
|
||||
xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
|
||||
bug->function, bug->file,
|
||||
bug->line & ~BUG_WARNING_TRAP);
|
||||
#endif /* CONFIG_XMON */
|
||||
#endif
|
||||
printk(KERN_ERR "Badness in %s at %s:%d\n",
|
||||
bug->function, bug->file,
|
||||
bug->line & ~BUG_WARNING_TRAP);
|
||||
#ifdef CONFIG_PPC32
|
||||
dump_stack();
|
||||
#else
|
||||
show_stack(current, (void *)regs->gpr[1]);
|
||||
#endif
|
||||
return 1;
|
||||
}
|
||||
#ifdef CONFIG_XMON
|
||||
#if defined(CONFIG_PPC32) && defined(CONFIG_XMON)
|
||||
xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
|
||||
bug->function, bug->file, bug->line);
|
||||
xmon(regs);
|
||||
#endif /* CONFIG_XMON */
|
||||
#endif
|
||||
printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
|
||||
bug->function, bug->file, bug->line);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ProgramCheckException(struct pt_regs *regs)
|
||||
void __KPROBES program_check_exception(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int reason = get_reason(regs);
|
||||
#if defined(CONFIG_PPC32) && defined(CONFIG_MATH_EMULATION)
|
||||
extern int do_mathemu(struct pt_regs *regs);
|
||||
|
||||
#ifdef CONFIG_MATH_EMULATION
|
||||
/* (reason & REASON_ILLEGAL) would be the obvious thing here,
|
||||
* but there seems to be a hardware bug on the 405GP (RevD)
|
||||
* that means ESR is sometimes set incorrectly - either to
|
||||
|
@ -740,69 +860,61 @@ void ProgramCheckException(struct pt_regs *regs)
|
|||
emulate_single_step(regs);
|
||||
return;
|
||||
}
|
||||
#endif /* CONFIG_MATH_EMULATION */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
if (debugger_fault_handler(regs))
|
||||
return;
|
||||
#endif
|
||||
|
||||
if (reason & REASON_FP) {
|
||||
/* IEEE FP exception */
|
||||
int code = 0;
|
||||
u32 fpscr;
|
||||
|
||||
/* We must make sure the FP state is consistent with
|
||||
* our MSR_FP in regs
|
||||
*/
|
||||
preempt_disable();
|
||||
if (regs->msr & MSR_FP)
|
||||
giveup_fpu(current);
|
||||
preempt_enable();
|
||||
|
||||
fpscr = current->thread.fpscr;
|
||||
fpscr &= fpscr << 22; /* mask summary bits with enables */
|
||||
if (fpscr & FPSCR_VX)
|
||||
code = FPE_FLTINV;
|
||||
else if (fpscr & FPSCR_OX)
|
||||
code = FPE_FLTOVF;
|
||||
else if (fpscr & FPSCR_UX)
|
||||
code = FPE_FLTUND;
|
||||
else if (fpscr & FPSCR_ZX)
|
||||
code = FPE_FLTDIV;
|
||||
else if (fpscr & FPSCR_XX)
|
||||
code = FPE_FLTRES;
|
||||
_exception(SIGFPE, regs, code, regs->nip);
|
||||
return;
|
||||
}
|
||||
|
||||
if (reason & REASON_TRAP) {
|
||||
parse_fpe(regs);
|
||||
} else if (reason & REASON_TRAP) {
|
||||
/* trap exception */
|
||||
#ifdef CONFIG_PPC64
|
||||
if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
|
||||
== NOTIFY_STOP)
|
||||
return;
|
||||
#endif
|
||||
if (debugger_bpt(regs))
|
||||
return;
|
||||
if (check_bug_trap(regs)) {
|
||||
regs->nip += 4;
|
||||
return;
|
||||
}
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Try to emulate it if we should. */
|
||||
if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT,
|
||||
#ifdef CONFIG_PPC32
|
||||
0
|
||||
#else
|
||||
regs->nip
|
||||
#endif
|
||||
);
|
||||
} else
|
||||
#ifdef CONFIG_PPC32
|
||||
if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED))
|
||||
#endif
|
||||
{
|
||||
/* Privileged or illegal instruction; try to emulate it. */
|
||||
switch (emulate_instruction(regs)) {
|
||||
case 0:
|
||||
regs->nip += 4;
|
||||
emulate_single_step(regs);
|
||||
return;
|
||||
break;
|
||||
case -EFAULT:
|
||||
_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
|
||||
return;
|
||||
break;
|
||||
default:
|
||||
if (reason & REASON_PRIVILEGED)
|
||||
_exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
|
||||
else
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (reason & REASON_PRIVILEGED)
|
||||
_exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
|
||||
else
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
}
|
||||
|
||||
void AlignmentException(struct pt_regs *regs)
|
||||
void alignment_exception(struct pt_regs *regs)
|
||||
{
|
||||
int fixed;
|
||||
|
||||
|
@ -817,15 +929,28 @@ void AlignmentException(struct pt_regs *regs)
|
|||
/* Operand address was bad */
|
||||
if (fixed == -EFAULT) {
|
||||
if (user_mode(regs))
|
||||
_exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
|
||||
_exception(SIGSEGV, regs,
|
||||
#ifdef CONFIG_PPC32
|
||||
SEGV_ACCERR,
|
||||
#else
|
||||
SEGV_MAPERR,
|
||||
#endif
|
||||
regs->dar);
|
||||
else
|
||||
/* Search exception table */
|
||||
bad_page_fault(regs, regs->dar, SIGSEGV);
|
||||
return;
|
||||
}
|
||||
_exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
|
||||
_exception(SIGBUS, regs, BUS_ADRALN,
|
||||
#ifdef CONFIG_PPC32
|
||||
regs->dar
|
||||
#else
|
||||
regs->nip
|
||||
#endif
|
||||
);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
void StackOverflow(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
|
||||
|
@ -849,8 +974,58 @@ void trace_syscall(struct pt_regs *regs)
|
|||
current, current->pid, regs->nip, regs->link, regs->gpr[0],
|
||||
regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
|
||||
}
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_8xx
|
||||
#ifdef CONFIG_PPC64
|
||||
void kernel_fp_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
|
||||
"%lx at %lx\n", regs->trap, regs->nip);
|
||||
die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
|
||||
}
|
||||
#endif
|
||||
|
||||
void altivec_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
#if !defined(CONFIG_ALTIVEC) || defined(CONFIG_PPC64)
|
||||
if (user_mode(regs)) {
|
||||
/* A user program has executed an altivec instruction,
|
||||
but this kernel doesn't support altivec. */
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_PPC32
|
||||
{
|
||||
static int kernel_altivec_count;
|
||||
|
||||
/* The kernel has executed an altivec instruction without
|
||||
first enabling altivec. Whinge but let it do it. */
|
||||
if (++kernel_altivec_count < 10)
|
||||
printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
|
||||
current, regs->nip);
|
||||
regs->msr |= MSR_VEC;
|
||||
}
|
||||
#else
|
||||
printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
|
||||
"%lx at %lx\n", regs->trap, regs->nip);
|
||||
die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
extern perf_irq_t perf_irq;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PPC64) || defined(CONFIG_E500)
|
||||
void performance_monitor_exception(struct pt_regs *regs)
|
||||
{
|
||||
perf_irq(regs);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_PPC32) && defined(CONFIG_8xx)
|
||||
void SoftwareEmulation(struct pt_regs *regs)
|
||||
{
|
||||
extern int do_mathemu(struct pt_regs *);
|
||||
|
@ -879,8 +1054,9 @@ void SoftwareEmulation(struct pt_regs *regs)
|
|||
} else
|
||||
emulate_single_step(regs);
|
||||
}
|
||||
#endif /* CONFIG_8xx */
|
||||
#endif /* defined(CONFIG_PPC32) && defined(CONFIG_8xx) */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
|
||||
|
||||
void DebugException(struct pt_regs *regs, unsigned long debug_status)
|
||||
|
@ -909,42 +1085,36 @@ void TAUException(struct pt_regs *regs)
|
|||
regs->nip, regs->msr, regs->trap, print_tainted());
|
||||
}
|
||||
#endif /* CONFIG_INT_TAU */
|
||||
|
||||
void AltivecUnavailException(struct pt_regs *regs)
|
||||
{
|
||||
static int kernel_altivec_count;
|
||||
|
||||
#ifndef CONFIG_ALTIVEC
|
||||
if (user_mode(regs)) {
|
||||
/* A user program has executed an altivec instruction,
|
||||
but this kernel doesn't support altivec. */
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
/* The kernel has executed an altivec instruction without
|
||||
first enabling altivec. Whinge but let it do it. */
|
||||
if (++kernel_altivec_count < 10)
|
||||
printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
|
||||
current, regs->nip);
|
||||
regs->msr |= MSR_VEC;
|
||||
}
|
||||
#endif /* CONFIG_PPC32*/
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
void AltivecAssistException(struct pt_regs *regs)
|
||||
void altivec_assist_exception(struct pt_regs *regs)
|
||||
{
|
||||
int err;
|
||||
#ifdef CONFIG_PPC64
|
||||
siginfo_t info;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
preempt_disable();
|
||||
if (regs->msr & MSR_VEC)
|
||||
giveup_altivec(current);
|
||||
preempt_enable();
|
||||
#endif
|
||||
if (!user_mode(regs)) {
|
||||
printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
|
||||
" at %lx\n", regs->nip);
|
||||
die("Kernel Altivec assist exception", regs, SIGILL);
|
||||
die("Kernel "
|
||||
#ifdef CONFIG_PPC64
|
||||
"VMX/"
|
||||
#endif
|
||||
"Altivec assist exception", regs, SIGILL);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
flush_altivec_to_thread(current);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
err = emulate_altivec(regs);
|
||||
if (err == 0) {
|
||||
regs->nip += 4; /* skip emulated instruction */
|
||||
|
@ -954,7 +1124,15 @@ void AltivecAssistException(struct pt_regs *regs)
|
|||
|
||||
if (err == -EFAULT) {
|
||||
/* got an error reading the instruction */
|
||||
#ifdef CONFIG_PPC32
|
||||
_exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
|
||||
#else
|
||||
info.si_signo = SIGSEGV;
|
||||
info.si_errno = 0;
|
||||
info.si_code = SEGV_MAPERR;
|
||||
info.si_addr = (void __user *) regs->nip;
|
||||
force_sig_info(SIGSEGV, &info, current);
|
||||
#endif
|
||||
} else {
|
||||
/* didn't recognize the instruction */
|
||||
/* XXX quick hack for now: set the non-Java bit in the VSCR */
|
||||
|
@ -966,13 +1144,7 @@ void AltivecAssistException(struct pt_regs *regs)
|
|||
}
|
||||
#endif /* CONFIG_ALTIVEC */
|
||||
|
||||
#ifdef CONFIG_E500
|
||||
void PerformanceMonitorException(struct pt_regs *regs)
|
||||
{
|
||||
perf_irq(regs);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#ifdef CONFIG_FSL_BOOKE
|
||||
void CacheLockingException(struct pt_regs *regs, unsigned long address,
|
||||
unsigned long error_code)
|
||||
|
@ -1022,7 +1194,24 @@ void SPEFloatingPointException(struct pt_regs *regs)
|
|||
return;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/*
|
||||
* We enter here if we get an unrecoverable exception, that is, one
|
||||
* that happened at a point where the RI (recoverable interrupt) bit
|
||||
* in the MSR is 0. This indicates that SRR0/1 are live, and that
|
||||
* we therefore lost state by taking this exception.
|
||||
*/
|
||||
void unrecoverable_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
|
||||
regs->trap, regs->nip);
|
||||
die("Unrecoverable exception", regs, SIGABRT);
|
||||
}
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
/*
|
||||
* Default handler for a Watchdog exception,
|
||||
|
@ -1041,6 +1230,20 @@ void WatchdogException(struct pt_regs *regs)
|
|||
WatchdogHandler(regs);
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/*
|
||||
* We enter here if we discover during exception entry that we are
|
||||
* running in supervisor mode with a userspace value in the stack pointer.
|
||||
*/
|
||||
void kernel_bad_stack(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
|
||||
regs->gpr[1], regs->nip);
|
||||
die("Bad kernel stack pointer", regs, SIGABRT);
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init trap_init(void)
|
||||
{
|
||||
|
|
|
@ -1,174 +0,0 @@
|
|||
/* Align . to a 8 byte boundary equals to maximum function alignment. */
|
||||
/* sched.text is aling to function alignment to secure we have same
|
||||
* address even at second ld pass when generating System.map */
|
||||
/* spinlock.text is aling to function alignment to secure we have same
|
||||
* address even at second ld pass when generating System.map */
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to
|
||||
the beginning of the section so we begin them at 0. */
|
||||
/* Stabs debugging sections. */
|
||||
OUTPUT_ARCH(powerpc:common)
|
||||
jiffies = jiffies_64 + 4;
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rel.text : { *(.rel.text) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rel.data : { *(.rel.data) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rel.rodata : { *(.rel.rodata) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rel.got : { *(.rel.got) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rel.ctors : { *(.rel.ctors) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rel.dtors : { *(.rel.dtors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rel.bss : { *(.rel.bss) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rel.plt : { *(.rel.plt) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
/* .init : { *(.init) } =0*/
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
*(.text)
|
||||
. = ALIGN(8); __sched_text_start = .; *(.sched.text) __sched_text_end = .;
|
||||
. = ALIGN(8); __lock_text_start = .; *(.spinlock.text) __lock_text_end = .;
|
||||
*(.fixup)
|
||||
*(.got1)
|
||||
__got2_start = .;
|
||||
*(.got2)
|
||||
__got2_end = .;
|
||||
}
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
.rodata : AT(ADDR(.rodata) - 0) { *(.rodata) *(.rodata.*) *(__vermagic) } .rodata1 : AT(ADDR(.rodata1) - 0) { *(.rodata1) } .pci_fixup : AT(ADDR(.pci_fixup) - 0) { __start_pci_fixups_early = .; *(.pci_fixup_early) __end_pci_fixups_early = .; __start_pci_fixups_header = .; *(.pci_fixup_header) __end_pci_fixups_header = .; __start_pci_fixups_final = .; *(.pci_fixup_final) __end_pci_fixups_final = .; __start_pci_fixups_enable = .; *(.pci_fixup_enable) __end_pci_fixups_enable = .; } __ksymtab : AT(ADDR(__ksymtab) - 0) { __start___ksymtab = .; *(__ksymtab) __stop___ksymtab = .; } __ksymtab_gpl : AT(ADDR(__ksymtab_gpl) - 0) { __start___ksymtab_gpl = .; *(__ksymtab_gpl) __stop___ksymtab_gpl = .; } __kcrctab : AT(ADDR(__kcrctab) - 0) { __start___kcrctab = .; *(__kcrctab) __stop___kcrctab = .; } __kcrctab_gpl : AT(ADDR(__kcrctab_gpl) - 0) { __start___kcrctab_gpl = .; *(__kcrctab_gpl) __stop___kcrctab_gpl = .; } __ksymtab_strings : AT(ADDR(__ksymtab_strings) - 0) { *(__ksymtab_strings) } __param : AT(ADDR(__param) - 0) { __start___param = .; *(__param) __stop___param = .; }
|
||||
.fini : { *(.fini) } =0
|
||||
.ctors : { *(.ctors) }
|
||||
.dtors : { *(.dtors) }
|
||||
.fixup : { *(.fixup) }
|
||||
__ex_table : {
|
||||
__start___ex_table = .;
|
||||
*(__ex_table)
|
||||
__stop___ex_table = .;
|
||||
}
|
||||
__bug_table : {
|
||||
__start___bug_table = .;
|
||||
*(__bug_table)
|
||||
__stop___bug_table = .;
|
||||
}
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = ALIGN(4096);
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata2)
|
||||
*(.got.plt) *(.got)
|
||||
*(.dynamic)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
|
||||
. = ALIGN(4096);
|
||||
__nosave_begin = .;
|
||||
.data_nosave : { *(.data.nosave) }
|
||||
. = ALIGN(4096);
|
||||
__nosave_end = .;
|
||||
|
||||
. = ALIGN(32);
|
||||
.data.cacheline_aligned : { *(.data.cacheline_aligned) }
|
||||
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
. = ALIGN(8192);
|
||||
.data.init_task : { *(.data.init_task) }
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_begin = .;
|
||||
.init.text : {
|
||||
_sinittext = .;
|
||||
*(.init.text)
|
||||
_einittext = .;
|
||||
}
|
||||
/* .exit.text is discarded at runtime, not link time,
|
||||
to deal with references from __bug_table */
|
||||
.exit.text : { *(.exit.text) }
|
||||
.init.data : {
|
||||
*(.init.data);
|
||||
__vtop_table_begin = .;
|
||||
*(.vtop_fixup);
|
||||
__vtop_table_end = .;
|
||||
__ptov_table_begin = .;
|
||||
*(.ptov_fixup);
|
||||
__ptov_table_end = .;
|
||||
}
|
||||
. = ALIGN(16);
|
||||
__setup_start = .;
|
||||
.init.setup : { *(.init.setup) }
|
||||
__setup_end = .;
|
||||
__initcall_start = .;
|
||||
.initcall.init : {
|
||||
*(.initcall1.init)
|
||||
*(.initcall2.init)
|
||||
*(.initcall3.init)
|
||||
*(.initcall4.init)
|
||||
*(.initcall5.init)
|
||||
*(.initcall6.init)
|
||||
*(.initcall7.init)
|
||||
}
|
||||
__initcall_end = .;
|
||||
|
||||
__con_initcall_start = .;
|
||||
.con_initcall.init : { *(.con_initcall.init) }
|
||||
__con_initcall_end = .;
|
||||
|
||||
.security_initcall.init : AT(ADDR(.security_initcall.init) - 0) { __security_initcall_start = .; *(.security_initcall.init) __security_initcall_end = .; }
|
||||
|
||||
__start___ftr_fixup = .;
|
||||
__ftr_fixup : { *(__ftr_fixup) }
|
||||
__stop___ftr_fixup = .;
|
||||
|
||||
. = ALIGN(32);
|
||||
__per_cpu_start = .;
|
||||
.data.percpu : { *(.data.percpu) }
|
||||
__per_cpu_end = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__initramfs_start = .;
|
||||
.init.ramfs : { *(.init.ramfs) }
|
||||
__initramfs_end = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_end = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
_sextratext = .;
|
||||
_eextratext = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
}
|
||||
__bss_stop = .;
|
||||
|
||||
_end = . ;
|
||||
PROVIDE (end = .);
|
||||
|
||||
/* Sections to be discarded. */
|
||||
/DISCARD/ : {
|
||||
*(.exitcall.exit)
|
||||
*(.exit.data)
|
||||
}
|
||||
}
|
|
@ -1,10 +1,29 @@
|
|||
#include <linux/config.h>
|
||||
#ifdef CONFIG_PPC64
|
||||
#include <asm/page.h>
|
||||
#endif
|
||||
#include <asm-generic/vmlinux.lds.h>
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
OUTPUT_ARCH(powerpc:common64)
|
||||
jiffies = jiffies_64;
|
||||
#else
|
||||
OUTPUT_ARCH(powerpc:common)
|
||||
jiffies = jiffies_64 + 4;
|
||||
#endif
|
||||
SECTIONS
|
||||
{
|
||||
/* Sections to be discarded. */
|
||||
/DISCARD/ : {
|
||||
*(.exitcall.exit)
|
||||
#ifdef CONFIG_PPC32
|
||||
*(.exit.data)
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
#ifdef CONFIG_PPC32
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
|
@ -28,17 +47,30 @@ SECTIONS
|
|||
.rela.plt : { *(.rela.plt) }
|
||||
/* .init : { *(.init) } =0*/
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
#endif
|
||||
.text : {
|
||||
#ifdef CONFIG_PPC64
|
||||
*(.text .text.*)
|
||||
#else
|
||||
*(.text)
|
||||
#endif
|
||||
SCHED_TEXT
|
||||
LOCK_TEXT
|
||||
#ifdef CONFIG_PPC64
|
||||
KPROBES_TEXT
|
||||
#endif
|
||||
*(.fixup)
|
||||
#ifdef CONFIG_PPC32
|
||||
*(.got1)
|
||||
__got2_start = .;
|
||||
*(.got2)
|
||||
__got2_end = .;
|
||||
#else
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
_etext = .;
|
||||
#endif
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
|
||||
|
@ -48,6 +80,7 @@ SECTIONS
|
|||
.dtors : { *(.dtors) }
|
||||
|
||||
.fixup : { *(.fixup) }
|
||||
#endif
|
||||
|
||||
__ex_table : {
|
||||
__start___ex_table = .;
|
||||
|
@ -61,6 +94,17 @@ SECTIONS
|
|||
__stop___bug_table = .;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
__ftr_fixup : {
|
||||
__start___ftr_fixup = .;
|
||||
*(__ftr_fixup)
|
||||
__stop___ftr_fixup = .;
|
||||
}
|
||||
|
||||
RODATA
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = ALIGN(4096);
|
||||
.data :
|
||||
|
@ -90,16 +134,25 @@ SECTIONS
|
|||
.data.init_task : { *(.data.init_task) }
|
||||
|
||||
. = ALIGN(4096);
|
||||
#else
|
||||
/* will be freed after init */
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
#endif
|
||||
__init_begin = .;
|
||||
.init.text : {
|
||||
_sinittext = .;
|
||||
*(.init.text)
|
||||
_einittext = .;
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
/* .exit.text is discarded at runtime, not link time,
|
||||
to deal with references from __bug_table */
|
||||
.exit.text : { *(.exit.text) }
|
||||
#endif
|
||||
.init.data : {
|
||||
#ifdef CONFIG_PPC64
|
||||
*(.init.data)
|
||||
#else
|
||||
*(.init.data);
|
||||
__vtop_table_begin = .;
|
||||
*(.vtop_fixup);
|
||||
|
@ -107,13 +160,31 @@ SECTIONS
|
|||
__ptov_table_begin = .;
|
||||
*(.ptov_fixup);
|
||||
__ptov_table_end = .;
|
||||
#endif
|
||||
}
|
||||
|
||||
. = ALIGN(16);
|
||||
#ifdef CONFIG_PPC32
|
||||
__setup_start = .;
|
||||
.init.setup : { *(.init.setup) }
|
||||
#endif
|
||||
.init.setup : {
|
||||
#ifdef CONFIG_PPC64
|
||||
__setup_start = .;
|
||||
#endif
|
||||
*(.init.setup)
|
||||
#ifdef CONFIG_PPC64
|
||||
__setup_end = .;
|
||||
#endif
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
__setup_end = .;
|
||||
|
||||
__initcall_start = .;
|
||||
#endif
|
||||
.initcall.init : {
|
||||
#ifdef CONFIG_PPC64
|
||||
__initcall_start = .;
|
||||
#endif
|
||||
*(.initcall1.init)
|
||||
*(.initcall2.init)
|
||||
*(.initcall3.init)
|
||||
|
@ -121,27 +192,109 @@ SECTIONS
|
|||
*(.initcall5.init)
|
||||
*(.initcall6.init)
|
||||
*(.initcall7.init)
|
||||
#ifdef CONFIG_PPC64
|
||||
__initcall_end = .;
|
||||
#endif
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
__initcall_end = .;
|
||||
|
||||
__con_initcall_start = .;
|
||||
.con_initcall.init : { *(.con_initcall.init) }
|
||||
#endif
|
||||
.con_initcall.init : {
|
||||
#ifdef CONFIG_PPC64
|
||||
__con_initcall_start = .;
|
||||
#endif
|
||||
*(.con_initcall.init)
|
||||
#ifdef CONFIG_PPC64
|
||||
__con_initcall_end = .;
|
||||
#endif
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
__con_initcall_end = .;
|
||||
#endif
|
||||
|
||||
SECURITY_INIT
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
__start___ftr_fixup = .;
|
||||
__ftr_fixup : { *(__ftr_fixup) }
|
||||
__stop___ftr_fixup = .;
|
||||
#else
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
.init.ramfs : {
|
||||
__initramfs_start = .;
|
||||
*(.init.ramfs)
|
||||
__initramfs_end = .;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
. = ALIGN(32);
|
||||
__per_cpu_start = .;
|
||||
.data.percpu : { *(.data.percpu) }
|
||||
#endif
|
||||
.data.percpu : {
|
||||
#ifdef CONFIG_PPC64
|
||||
__per_cpu_start = .;
|
||||
#endif
|
||||
*(.data.percpu)
|
||||
#ifdef CONFIG_PPC64
|
||||
__per_cpu_end = .;
|
||||
#endif
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
__per_cpu_end = .;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
. = ALIGN(16384);
|
||||
__init_end = .;
|
||||
/* freed after init ends here */
|
||||
|
||||
|
||||
/* Read/write sections */
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
. = ALIGN(16384);
|
||||
/* The initial task and kernel stack */
|
||||
.data.init_task : {
|
||||
*(.data.init_task)
|
||||
}
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
.data.page_aligned : {
|
||||
*(.data.page_aligned)
|
||||
}
|
||||
|
||||
.data.cacheline_aligned : {
|
||||
*(.data.cacheline_aligned)
|
||||
}
|
||||
|
||||
.data : {
|
||||
*(.data .data.rel* .toc1)
|
||||
*(.branch_lt)
|
||||
}
|
||||
|
||||
.opd : {
|
||||
*(.opd)
|
||||
}
|
||||
|
||||
.got : {
|
||||
__toc_start = .;
|
||||
*(.got)
|
||||
*(.toc)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
_edata = .;
|
||||
}
|
||||
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
#else
|
||||
. = ALIGN(4096);
|
||||
__initramfs_start = .;
|
||||
.init.ramfs : { *(.init.ramfs) }
|
||||
.init.ramfs : {
|
||||
*(.init.ramfs)
|
||||
}
|
||||
__initramfs_end = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
|
@ -152,21 +305,30 @@ SECTIONS
|
|||
_eextratext = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
#endif
|
||||
.bss : {
|
||||
#ifdef CONFIG_PPC64
|
||||
__bss_start = .;
|
||||
#else
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
#endif
|
||||
*(.bss)
|
||||
#ifdef CONFIG_PPC32
|
||||
*(COMMON)
|
||||
}
|
||||
#else
|
||||
__bss_stop = .;
|
||||
|
||||
_end = . ;
|
||||
PROVIDE (end = .);
|
||||
|
||||
/* Sections to be discarded. */
|
||||
/DISCARD/ : {
|
||||
*(.exitcall.exit)
|
||||
*(.exit.data)
|
||||
#endif
|
||||
}
|
||||
#ifdef CONFIG_PPC32
|
||||
__bss_stop = .;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
#endif
|
||||
_end = . ;
|
||||
#ifdef CONFIG_PPC32
|
||||
PROVIDE (end = .);
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* HvCallSm.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -16,8 +15,8 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _HVCALLSM_H
|
||||
#define _HVCALLSM_H
|
||||
#ifndef _ISERIES_CALL_SM_H
|
||||
#define _ISERIES_CALL_SM_H
|
||||
|
||||
/*
|
||||
* This file contains the "hypervisor call" interface which is used to
|
||||
|
@ -35,4 +34,4 @@ static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex,
|
|||
return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap);
|
||||
}
|
||||
|
||||
#endif /* _HVCALLSM_H */
|
||||
#endif /* _ISERIES_CALL_SM_H */
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* ItIplParmsReal.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -16,8 +15,8 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ITIPLPARMSREAL_H
|
||||
#define _ITIPLPARMSREAL_H
|
||||
#ifndef _ISERIES_IPL_PARMS_H
|
||||
#define _ISERIES_IPL_PARMS_H
|
||||
|
||||
/*
|
||||
* This struct maps the IPL Parameters DMA'd from the SP.
|
||||
|
@ -68,4 +67,4 @@ struct ItIplParmsReal {
|
|||
|
||||
extern struct ItIplParmsReal xItIplParmsReal;
|
||||
|
||||
#endif /* _ITIPLPARMSREAL_H */
|
||||
#endif /* _ISERIES_IPL_PARMS_H */
|
|
@ -40,7 +40,8 @@
|
|||
#include <asm/iSeries/HvLpEvent.h>
|
||||
#include <asm/iSeries/HvCallPci.h>
|
||||
#include <asm/iSeries/HvCallXm.h>
|
||||
#include <asm/iSeries/iSeries_irq.h>
|
||||
|
||||
#include "irq.h"
|
||||
|
||||
/* This maps virtual irq numbers to real irqs */
|
||||
unsigned int virt_irq_to_real_map[NR_IRQS];
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
#ifndef __ISERIES_IRQ_H__
|
||||
#define __ISERIES_IRQ_H__
|
||||
#ifndef _ISERIES_IRQ_H
|
||||
#define _ISERIES_IRQ_H
|
||||
|
||||
extern void iSeries_init_IRQ(void);
|
||||
extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
|
||||
extern void iSeries_activate_IRQs(void);
|
||||
|
||||
#endif /* __ISERIES_IRQ_H__ */
|
||||
#endif /* _ISERIES_IRQ_H */
|
|
@ -19,15 +19,15 @@
|
|||
#include <asm/lppaca.h>
|
||||
#include <asm/iSeries/ItLpRegSave.h>
|
||||
#include <asm/paca.h>
|
||||
#include <asm/iSeries/HvReleaseData.h>
|
||||
#include <asm/iSeries/LparMap.h>
|
||||
#include <asm/iSeries/ItVpdAreas.h>
|
||||
#include <asm/iSeries/ItIplParmsReal.h>
|
||||
#include <asm/iSeries/ItExtVpdPanel.h>
|
||||
#include <asm/iSeries/ItLpQueue.h>
|
||||
#include <asm/iSeries/IoHriProcessorVpd.h>
|
||||
#include <asm/iSeries/ItSpCommArea.h>
|
||||
|
||||
#include "vpd_areas.h"
|
||||
#include "spcomm_area.h"
|
||||
#include "ipl_parms.h"
|
||||
#include "processor_vpd.h"
|
||||
#include "release_data.h"
|
||||
|
||||
/* The HvReleaseData is the root of the information shared between
|
||||
* the hypervisor and Linux.
|
||||
|
|
|
@ -13,6 +13,8 @@
|
|||
#include <linux/bootmem.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/paca.h>
|
||||
#include <asm/iSeries/ItLpQueue.h>
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* IoHriMainStore.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -17,8 +16,8 @@
|
|||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _IOHRIMAINSTORE_H
|
||||
#define _IOHRIMAINSTORE_H
|
||||
#ifndef _ISERIES_MAIN_STORE_H
|
||||
#define _ISERIES_MAIN_STORE_H
|
||||
|
||||
/* Main Store Vpd for Condor,iStar,sStar */
|
||||
struct IoHriMainStoreSegment4 {
|
||||
|
@ -163,4 +162,4 @@ struct IoHriMainStoreSegment5 {
|
|||
|
||||
extern u64 xMsVpd[];
|
||||
|
||||
#endif /* _IOHRIMAINSTORE_H */
|
||||
#endif /* _ISERIES_MAIN_STORE_H */
|
|
@ -37,12 +37,13 @@
|
|||
|
||||
#include <asm/iSeries/HvCallPci.h>
|
||||
#include <asm/iSeries/HvCallXm.h>
|
||||
#include <asm/iSeries/iSeries_irq.h>
|
||||
#include <asm/iSeries/iSeries_pci.h>
|
||||
#include <asm/iSeries/mf.h>
|
||||
|
||||
#include <asm/ppc-pci.h>
|
||||
|
||||
#include "irq.h"
|
||||
|
||||
extern unsigned long io_page_mask;
|
||||
|
||||
/*
|
||||
|
|
|
@ -26,8 +26,9 @@
|
|||
#include <asm/lppaca.h>
|
||||
#include <asm/iSeries/ItLpQueue.h>
|
||||
#include <asm/iSeries/HvCallXm.h>
|
||||
#include <asm/iSeries/IoHriMainStore.h>
|
||||
#include <asm/iSeries/IoHriProcessorVpd.h>
|
||||
|
||||
#include "processor_vpd.h"
|
||||
#include "main_store.h"
|
||||
|
||||
static int __init iseries_proc_create(void)
|
||||
{
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* IoHriProcessorVpd.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -16,8 +15,8 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _IOHRIPROCESSORVPD_H
|
||||
#define _IOHRIPROCESSORVPD_H
|
||||
#ifndef _ISERIES_PROCESSOR_VPD_H
|
||||
#define _ISERIES_PROCESSOR_VPD_H
|
||||
|
||||
#include <asm/types.h>
|
||||
|
||||
|
@ -83,4 +82,4 @@ struct IoHriProcessorVpd {
|
|||
|
||||
extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
|
||||
|
||||
#endif /* _IOHRIPROCESSORVPD_H */
|
||||
#endif /* _ISERIES_PROCESSOR_VPD_H */
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* HvReleaseData.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -16,8 +15,8 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _HVRELEASEDATA_H
|
||||
#define _HVRELEASEDATA_H
|
||||
#ifndef _ISERIES_RELEASE_DATA_H
|
||||
#define _ISERIES_RELEASE_DATA_H
|
||||
|
||||
/*
|
||||
* This control block contains the critical information about the
|
||||
|
@ -61,4 +60,4 @@ struct HvReleaseData {
|
|||
|
||||
extern struct HvReleaseData hvReleaseData;
|
||||
|
||||
#endif /* _HVRELEASEDATA_H */
|
||||
#endif /* _ISERIES_RELEASE_DATA_H */
|
|
@ -48,18 +48,18 @@
|
|||
#include <asm/iSeries/HvCallHpt.h>
|
||||
#include <asm/iSeries/HvLpConfig.h>
|
||||
#include <asm/iSeries/HvCallEvent.h>
|
||||
#include <asm/iSeries/HvCallSm.h>
|
||||
#include <asm/iSeries/HvCallXm.h>
|
||||
#include <asm/iSeries/ItLpQueue.h>
|
||||
#include <asm/iSeries/IoHriMainStore.h>
|
||||
#include <asm/iSeries/mf.h>
|
||||
#include <asm/iSeries/HvLpEvent.h>
|
||||
#include <asm/iSeries/iSeries_irq.h>
|
||||
#include <asm/iSeries/IoHriProcessorVpd.h>
|
||||
#include <asm/iSeries/ItVpdAreas.h>
|
||||
#include <asm/iSeries/LparMap.h>
|
||||
|
||||
#include "setup.h"
|
||||
#include "irq.h"
|
||||
#include "vpd_areas.h"
|
||||
#include "processor_vpd.h"
|
||||
#include "main_store.h"
|
||||
#include "call_sm.h"
|
||||
|
||||
extern void hvlog(char *fmt, ...);
|
||||
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* ItSpCommArea.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -17,8 +16,8 @@
|
|||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _ITSPCOMMAREA_H
|
||||
#define _ITSPCOMMAREA_H
|
||||
#ifndef _ISERIES_SPCOMM_AREA_H
|
||||
#define _ISERIES_SPCOMM_AREA_H
|
||||
|
||||
|
||||
struct SpCommArea {
|
||||
|
@ -34,4 +33,4 @@ struct SpCommArea {
|
|||
|
||||
extern struct SpCommArea xSpCommArea;
|
||||
|
||||
#endif /* _ITSPCOMMAREA_H */
|
||||
#endif /* _ISERIES_SPCOMM_AREA_H */
|
|
@ -1,5 +1,4 @@
|
|||
/*
|
||||
* ItVpdAreas.h
|
||||
* Copyright (C) 2001 Mike Corrigan IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
@ -16,8 +15,8 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef _ITVPDAREAS_H
|
||||
#define _ITVPDAREAS_H
|
||||
#ifndef _ISERIES_VPD_AREAS_H
|
||||
#define _ISERIES_VPD_AREAS_H
|
||||
|
||||
/*
|
||||
* This file defines the address and length of all of the VPD area passed to
|
||||
|
@ -86,4 +85,4 @@ struct ItVpdAreas {
|
|||
|
||||
extern struct ItVpdAreas itVpdAreas;
|
||||
|
||||
#endif /* _ITVPDAREAS_H */
|
||||
#endif /* _ISERIES_VPD_AREAS_H */
|
|
@ -38,6 +38,8 @@ endif
|
|||
|
||||
# These are here while we do the architecture merge
|
||||
vecemu-y += ../../powerpc/kernel/vecemu.o
|
||||
vector-y += ../../powerpc/kernel/vector.o
|
||||
fpu-y += ../../powerpc/kernel/fpu.o
|
||||
|
||||
else
|
||||
obj-y := entry.o irq.o idle.o time.o misc.o \
|
||||
|
|
|
@ -1,133 +0,0 @@
|
|||
/*
|
||||
* FPU support code, moved here from head.S so that it can be used
|
||||
* by chips which use other head-whatever.S files.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/cputable.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
|
||||
/*
|
||||
* This task wants to use the FPU now.
|
||||
* On UP, disable FP for the task which had the FPU previously,
|
||||
* and save its floating-point registers in its thread_struct.
|
||||
* Load up this task's FP registers from its thread_struct,
|
||||
* enable the FPU for the current task and return to the task.
|
||||
*/
|
||||
.globl load_up_fpu
|
||||
load_up_fpu:
|
||||
mfmsr r5
|
||||
ori r5,r5,MSR_FP
|
||||
#ifdef CONFIG_PPC64BRIDGE
|
||||
clrldi r5,r5,1 /* turn off 64-bit mode */
|
||||
#endif /* CONFIG_PPC64BRIDGE */
|
||||
SYNC
|
||||
MTMSRD(r5) /* enable use of fpu now */
|
||||
isync
|
||||
/*
|
||||
* For SMP, we don't do lazy FPU switching because it just gets too
|
||||
* horrendously complex, especially when a task switches from one CPU
|
||||
* to another. Instead we call giveup_fpu in switch_to.
|
||||
*/
|
||||
#ifndef CONFIG_SMP
|
||||
tophys(r6,0) /* get __pa constant */
|
||||
addis r3,r6,last_task_used_math@ha
|
||||
lwz r4,last_task_used_math@l(r3)
|
||||
cmpwi 0,r4,0
|
||||
beq 1f
|
||||
add r4,r4,r6
|
||||
addi r4,r4,THREAD /* want last_task_used_math->thread */
|
||||
SAVE_32FPRS(0, r4)
|
||||
mffs fr0
|
||||
stfd fr0,THREAD_FPSCR-4(r4)
|
||||
lwz r5,PT_REGS(r4)
|
||||
add r5,r5,r6
|
||||
lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
li r10,MSR_FP|MSR_FE0|MSR_FE1
|
||||
andc r4,r4,r10 /* disable FP for previous task */
|
||||
stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
1:
|
||||
#endif /* CONFIG_SMP */
|
||||
/* enable use of FP after return */
|
||||
mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
|
||||
lwz r4,THREAD_FPEXC_MODE(r5)
|
||||
ori r9,r9,MSR_FP /* enable FP for current */
|
||||
or r9,r9,r4
|
||||
lfd fr0,THREAD_FPSCR-4(r5)
|
||||
mtfsf 0xff,fr0
|
||||
REST_32FPRS(0, r5)
|
||||
#ifndef CONFIG_SMP
|
||||
subi r4,r5,THREAD
|
||||
sub r4,r4,r6
|
||||
stw r4,last_task_used_math@l(r3)
|
||||
#endif /* CONFIG_SMP */
|
||||
/* restore registers and return */
|
||||
/* we haven't used ctr or xer or lr */
|
||||
b fast_exception_return
|
||||
|
||||
/*
|
||||
* FP unavailable trap from kernel - print a message, but let
|
||||
* the task use FP in the kernel until it returns to user mode.
|
||||
*/
|
||||
.globl KernelFP
|
||||
KernelFP:
|
||||
lwz r3,_MSR(r1)
|
||||
ori r3,r3,MSR_FP
|
||||
stw r3,_MSR(r1) /* enable use of FP after return */
|
||||
lis r3,86f@h
|
||||
ori r3,r3,86f@l
|
||||
mr r4,r2 /* current */
|
||||
lwz r5,_NIP(r1)
|
||||
bl printk
|
||||
b ret_from_except
|
||||
86: .string "floating point used in kernel (task=%p, pc=%x)\n"
|
||||
.align 4,0
|
||||
|
||||
/*
|
||||
* giveup_fpu(tsk)
|
||||
* Disable FP for the task given as the argument,
|
||||
* and save the floating-point registers in its thread_struct.
|
||||
* Enables the FPU for use in the kernel on return.
|
||||
*/
|
||||
.globl giveup_fpu
|
||||
giveup_fpu:
|
||||
mfmsr r5
|
||||
ori r5,r5,MSR_FP
|
||||
SYNC_601
|
||||
ISYNC_601
|
||||
MTMSRD(r5) /* enable use of fpu now */
|
||||
SYNC_601
|
||||
isync
|
||||
cmpwi 0,r3,0
|
||||
beqlr- /* if no previous owner, done */
|
||||
addi r3,r3,THREAD /* want THREAD of task */
|
||||
lwz r5,PT_REGS(r3)
|
||||
cmpwi 0,r5,0
|
||||
SAVE_32FPRS(0, r3)
|
||||
mffs fr0
|
||||
stfd fr0,THREAD_FPSCR-4(r3)
|
||||
beq 1f
|
||||
lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
li r3,MSR_FP|MSR_FE0|MSR_FE1
|
||||
andc r4,r4,r3 /* disable FP for previous task */
|
||||
stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
|
||||
1:
|
||||
#ifndef CONFIG_SMP
|
||||
li r5,0
|
||||
lis r4,last_task_used_math@ha
|
||||
stw r5,last_task_used_math@l(r4)
|
||||
#endif /* CONFIG_SMP */
|
||||
blr
|
|
@ -349,12 +349,12 @@ i##n: \
|
|||
|
||||
/* System reset */
|
||||
/* core99 pmac starts the seconary here by changing the vector, and
|
||||
putting it back to what it was (UnknownException) when done. */
|
||||
putting it back to what it was (unknown_exception) when done. */
|
||||
#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
|
||||
. = 0x100
|
||||
b __secondary_start_gemini
|
||||
#else
|
||||
EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD)
|
||||
EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
|
||||
#endif
|
||||
|
||||
/* Machine check */
|
||||
|
@ -389,7 +389,7 @@ i##n: \
|
|||
cmpwi cr1,r4,0
|
||||
bne cr1,1f
|
||||
#endif
|
||||
EXC_XFER_STD(0x200, MachineCheckException)
|
||||
EXC_XFER_STD(0x200, machine_check_exception)
|
||||
#ifdef CONFIG_PPC_CHRP
|
||||
1: b machine_check_in_rtas
|
||||
#endif
|
||||
|
@ -456,10 +456,10 @@ Alignment:
|
|||
mfspr r5,SPRN_DSISR
|
||||
stw r5,_DSISR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0x600, AlignmentException)
|
||||
EXC_XFER_EE(0x600, alignment_exception)
|
||||
|
||||
/* Program check exception */
|
||||
EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD)
|
||||
EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
|
||||
|
||||
/* Floating-point unavailable */
|
||||
. = 0x800
|
||||
|
@ -472,8 +472,8 @@ FPUnavailable:
|
|||
/* Decrementer */
|
||||
EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
|
||||
|
||||
EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* System call */
|
||||
. = 0xc00
|
||||
|
@ -482,8 +482,8 @@ SystemCall:
|
|||
EXC_XFER_EE_LITE(0xc00, DoSyscall)
|
||||
|
||||
/* Single step - not used on 601 */
|
||||
EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/*
|
||||
* The Altivec unavailable trap is at 0x0f20. Foo.
|
||||
|
@ -502,7 +502,7 @@ SystemCall:
|
|||
Trap_0f:
|
||||
EXCEPTION_PROLOG
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0xf00, UnknownException)
|
||||
EXC_XFER_EE(0xf00, unknown_exception)
|
||||
|
||||
/*
|
||||
* Handle TLB miss for instruction on 603/603e.
|
||||
|
@ -702,44 +702,44 @@ DataStoreTLBMiss:
|
|||
rfi
|
||||
|
||||
#ifndef CONFIG_ALTIVEC
|
||||
#define AltivecAssistException UnknownException
|
||||
#define altivec_assist_exception unknown_exception
|
||||
#endif
|
||||
|
||||
EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE)
|
||||
EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
|
||||
#ifdef CONFIG_POWER4
|
||||
EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, AltivecAssistException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD)
|
||||
#else /* !CONFIG_POWER4 */
|
||||
EXCEPTION(0x1600, Trap_16, AltivecAssistException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
|
||||
EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
|
||||
#endif /* CONFIG_POWER4 */
|
||||
EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2100, Trap_21, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2200, Trap_22, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2300, Trap_23, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2400, Trap_24, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2500, Trap_25, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2600, Trap_26, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2700, Trap_27, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2800, Trap_28, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2900, Trap_29, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2a00, Trap_2a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2b00, Trap_2b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2c00, Trap_2c, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2d00, Trap_2d, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2e00, Trap_2e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2f00, MOLTrampoline, UnknownException, EXC_XFER_EE_LITE)
|
||||
EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
|
||||
|
||||
.globl mol_trampoline
|
||||
.set mol_trampoline, i0x2f00
|
||||
|
@ -751,7 +751,7 @@ AltiVecUnavailable:
|
|||
#ifdef CONFIG_ALTIVEC
|
||||
bne load_up_altivec /* if from user, just load it up */
|
||||
#endif /* CONFIG_ALTIVEC */
|
||||
EXC_XFER_EE_LITE(0xf20, AltivecUnavailException)
|
||||
EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
|
||||
|
||||
#ifdef CONFIG_PPC64BRIDGE
|
||||
DataAccess:
|
||||
|
@ -767,12 +767,12 @@ DataSegment:
|
|||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
mfspr r4,SPRN_DAR
|
||||
stw r4,_DAR(r11)
|
||||
EXC_XFER_STD(0x380, UnknownException)
|
||||
EXC_XFER_STD(0x380, unknown_exception)
|
||||
|
||||
InstructionSegment:
|
||||
EXCEPTION_PROLOG
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_STD(0x480, UnknownException)
|
||||
EXC_XFER_STD(0x480, unknown_exception)
|
||||
#endif /* CONFIG_PPC64BRIDGE */
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
|
|
|
@ -309,13 +309,13 @@ skpinv: addi r4,r4,1 /* Increment */
|
|||
|
||||
interrupt_base:
|
||||
/* Critical Input Interrupt */
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
|
||||
|
||||
/* Machine Check Interrupt */
|
||||
#ifdef CONFIG_440A
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#endif
|
||||
|
||||
/* Data Storage Interrupt */
|
||||
|
@ -442,7 +442,7 @@ interrupt_base:
|
|||
#ifdef CONFIG_PPC_FPU
|
||||
FP_UNAVAILABLE_EXCEPTION
|
||||
#else
|
||||
EXCEPTION(0x2010, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
|
||||
/* System Call Interrupt */
|
||||
|
@ -451,21 +451,21 @@ interrupt_base:
|
|||
EXC_XFER_EE_LITE(0x0c00, DoSyscall)
|
||||
|
||||
/* Auxillary Processor Unavailable Interrupt */
|
||||
EXCEPTION(0x2020, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Decrementer Interrupt */
|
||||
DECREMENTER_EXCEPTION
|
||||
|
||||
/* Fixed Internal Timer Interrupt */
|
||||
/* TODO: Add FIT support */
|
||||
EXCEPTION(0x1010, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Watchdog Timer Interrupt */
|
||||
/* TODO: Add watchdog support */
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
|
||||
#endif
|
||||
|
||||
/* Data TLB Error Interrupt */
|
||||
|
|
|
@ -245,12 +245,12 @@ label:
|
|||
/*
|
||||
* 0x0100 - Critical Interrupt Exception
|
||||
*/
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
|
||||
|
||||
/*
|
||||
* 0x0200 - Machine Check Exception
|
||||
*/
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
|
||||
/*
|
||||
* 0x0300 - Data Storage Exception
|
||||
|
@ -405,7 +405,7 @@ label:
|
|||
mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */
|
||||
stw r4,_DEAR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0x600, AlignmentException)
|
||||
EXC_XFER_EE(0x600, alignment_exception)
|
||||
|
||||
/* 0x0700 - Program Exception */
|
||||
START_EXCEPTION(0x0700, ProgramCheck)
|
||||
|
@ -413,21 +413,21 @@ label:
|
|||
mfspr r4,SPRN_ESR /* Grab the ESR and save it */
|
||||
stw r4,_ESR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_STD(0x700, ProgramCheckException)
|
||||
EXC_XFER_STD(0x700, program_check_exception)
|
||||
|
||||
EXCEPTION(0x0800, Trap_08, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0900, Trap_09, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0A00, Trap_0A, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0B00, Trap_0B, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* 0x0C00 - System Call Exception */
|
||||
START_EXCEPTION(0x0C00, SystemCall)
|
||||
NORMAL_EXCEPTION_PROLOG
|
||||
EXC_XFER_EE_LITE(0xc00, DoSyscall)
|
||||
|
||||
EXCEPTION(0x0D00, Trap_0D, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0E00, Trap_0E, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0F00, Trap_0F, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* 0x1000 - Programmable Interval Timer (PIT) Exception */
|
||||
START_EXCEPTION(0x1000, Decrementer)
|
||||
|
@ -444,14 +444,14 @@ label:
|
|||
|
||||
/* 0x1010 - Fixed Interval Timer (FIT) Exception
|
||||
*/
|
||||
STND_EXCEPTION(0x1010, FITException, UnknownException)
|
||||
STND_EXCEPTION(0x1010, FITException, unknown_exception)
|
||||
|
||||
/* 0x1020 - Watchdog Timer (WDT) Exception
|
||||
*/
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
@ -656,25 +656,25 @@ label:
|
|||
mfspr r10, SPRN_SPRG0
|
||||
b InstructionAccess
|
||||
|
||||
EXCEPTION(0x1300, Trap_13, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1400, Trap_14, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
|
||||
#ifdef CONFIG_IBM405_ERR51
|
||||
/* 405GP errata 51 */
|
||||
START_EXCEPTION(0x1700, Trap_17)
|
||||
b DTLBMiss
|
||||
#else
|
||||
EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1A00, Trap_1A, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1B00, Trap_1B, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1C00, Trap_1C, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1D00, Trap_1D, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1E00, Trap_1E, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1F00, Trap_1F, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Check for a single step debug exception while in an exception
|
||||
* handler before state has been saved. This is to catch the case
|
||||
|
|
|
@ -203,7 +203,7 @@ i##n: \
|
|||
ret_from_except)
|
||||
|
||||
/* System reset */
|
||||
EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD)
|
||||
EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
|
||||
|
||||
/* Machine check */
|
||||
. = 0x200
|
||||
|
@ -214,7 +214,7 @@ MachineCheck:
|
|||
mfspr r5,SPRN_DSISR
|
||||
stw r5,_DSISR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_STD(0x200, MachineCheckException)
|
||||
EXC_XFER_STD(0x200, machine_check_exception)
|
||||
|
||||
/* Data access exception.
|
||||
* This is "never generated" by the MPC8xx. We jump to it for other
|
||||
|
@ -252,20 +252,20 @@ Alignment:
|
|||
mfspr r5,SPRN_DSISR
|
||||
stw r5,_DSISR(r11)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE(0x600, AlignmentException)
|
||||
EXC_XFER_EE(0x600, alignment_exception)
|
||||
|
||||
/* Program check exception */
|
||||
EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD)
|
||||
EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
|
||||
|
||||
/* No FPU on MPC8xx. This exception is not supposed to happen.
|
||||
*/
|
||||
EXCEPTION(0x800, FPUnavailable, UnknownException, EXC_XFER_STD)
|
||||
EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
|
||||
|
||||
/* Decrementer */
|
||||
EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
|
||||
|
||||
EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* System call */
|
||||
. = 0xc00
|
||||
|
@ -274,9 +274,9 @@ SystemCall:
|
|||
EXC_XFER_EE_LITE(0xc00, DoSyscall)
|
||||
|
||||
/* Single step - not used on 601 */
|
||||
EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xf00, Trap_0f, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
|
||||
EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* On the MPC8xx, this is a software emulation interrupt. It occurs
|
||||
* for all unimplemented and illegal instructions.
|
||||
|
@ -540,22 +540,22 @@ DataTLBError:
|
|||
#endif
|
||||
b DataAccess
|
||||
|
||||
EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* On the MPC8xx, these next four traps are used for development
|
||||
* support of breakpoints and such. Someday I will get around to
|
||||
* using them.
|
||||
*/
|
||||
EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
|
||||
EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
. = 0x2000
|
||||
|
||||
|
|
|
@ -335,7 +335,7 @@ label:
|
|||
mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \
|
||||
stw r4,_DEAR(r11); \
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
EXC_XFER_EE(0x0600, AlignmentException)
|
||||
EXC_XFER_EE(0x0600, alignment_exception)
|
||||
|
||||
#define PROGRAM_EXCEPTION \
|
||||
START_EXCEPTION(Program) \
|
||||
|
@ -343,7 +343,7 @@ label:
|
|||
mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \
|
||||
stw r4,_ESR(r11); \
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD; \
|
||||
EXC_XFER_STD(0x0700, ProgramCheckException)
|
||||
EXC_XFER_STD(0x0700, program_check_exception)
|
||||
|
||||
#define DECREMENTER_EXCEPTION \
|
||||
START_EXCEPTION(Decrementer) \
|
||||
|
|
|
@ -426,14 +426,14 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
|
||||
interrupt_base:
|
||||
/* Critical Input Interrupt */
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
|
||||
|
||||
/* Machine Check Interrupt */
|
||||
#ifdef CONFIG_E200
|
||||
/* no RFMCI, MCSRRs on E200 */
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#else
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
|
||||
MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
|
||||
#endif
|
||||
|
||||
/* Data Storage Interrupt */
|
||||
|
@ -542,9 +542,9 @@ interrupt_base:
|
|||
#else
|
||||
#ifdef CONFIG_E200
|
||||
/* E200 treats 'normal' floating point instructions as FP Unavail exception */
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
|
||||
#else
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
@ -554,20 +554,20 @@ interrupt_base:
|
|||
EXC_XFER_EE_LITE(0x0c00, DoSyscall)
|
||||
|
||||
/* Auxillary Processor Unavailable Interrupt */
|
||||
EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Decrementer Interrupt */
|
||||
DECREMENTER_EXCEPTION
|
||||
|
||||
/* Fixed Internal Timer Interrupt */
|
||||
/* TODO: Add FIT support */
|
||||
EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Watchdog Timer Interrupt */
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
|
||||
#else
|
||||
CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
|
||||
CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
|
||||
#endif
|
||||
|
||||
/* Data TLB Error Interrupt */
|
||||
|
@ -696,21 +696,21 @@ interrupt_base:
|
|||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
EXC_XFER_EE_LITE(0x2010, KernelSPE)
|
||||
#else
|
||||
EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
|
||||
#endif /* CONFIG_SPE */
|
||||
|
||||
/* SPE Floating Point Data */
|
||||
#ifdef CONFIG_SPE
|
||||
EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
|
||||
#else
|
||||
EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
|
||||
#endif /* CONFIG_SPE */
|
||||
|
||||
/* SPE Floating Point Round */
|
||||
EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE)
|
||||
EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
|
||||
|
||||
/* Performance Monitor */
|
||||
EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD)
|
||||
EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
|
||||
|
||||
|
||||
/* Debug Interrupt */
|
||||
|
|
|
@ -53,10 +53,10 @@
|
|||
|
||||
extern void transfer_to_handler(void);
|
||||
extern void do_IRQ(struct pt_regs *regs);
|
||||
extern void MachineCheckException(struct pt_regs *regs);
|
||||
extern void AlignmentException(struct pt_regs *regs);
|
||||
extern void ProgramCheckException(struct pt_regs *regs);
|
||||
extern void SingleStepException(struct pt_regs *regs);
|
||||
extern void machine_check_exception(struct pt_regs *regs);
|
||||
extern void alignment_exception(struct pt_regs *regs);
|
||||
extern void program_check_exception(struct pt_regs *regs);
|
||||
extern void single_step_exception(struct pt_regs *regs);
|
||||
extern int do_signal(sigset_t *, struct pt_regs *);
|
||||
extern int pmac_newworld;
|
||||
extern int sys_sigreturn(struct pt_regs *regs);
|
||||
|
@ -72,10 +72,10 @@ EXPORT_SYMBOL(clear_user_page);
|
|||
EXPORT_SYMBOL(do_signal);
|
||||
EXPORT_SYMBOL(transfer_to_handler);
|
||||
EXPORT_SYMBOL(do_IRQ);
|
||||
EXPORT_SYMBOL(MachineCheckException);
|
||||
EXPORT_SYMBOL(AlignmentException);
|
||||
EXPORT_SYMBOL(ProgramCheckException);
|
||||
EXPORT_SYMBOL(SingleStepException);
|
||||
EXPORT_SYMBOL(machine_check_exception);
|
||||
EXPORT_SYMBOL(alignment_exception);
|
||||
EXPORT_SYMBOL(program_check_exception);
|
||||
EXPORT_SYMBOL(single_step_exception);
|
||||
EXPORT_SYMBOL(sys_sigreturn);
|
||||
EXPORT_SYMBOL(ppc_n_lost_interrupts);
|
||||
EXPORT_SYMBOL(ppc_lost_interrupts);
|
||||
|
|
|
@ -74,7 +74,7 @@ void (*debugger_fault_handler)(struct pt_regs *regs);
|
|||
|
||||
DEFINE_SPINLOCK(die_lock);
|
||||
|
||||
void die(const char * str, struct pt_regs * fp, long err)
|
||||
int die(const char * str, struct pt_regs * fp, long err)
|
||||
{
|
||||
static int die_counter;
|
||||
int nl = 0;
|
||||
|
@ -232,7 +232,7 @@ platform_machine_check(struct pt_regs *regs)
|
|||
{
|
||||
}
|
||||
|
||||
void MachineCheckException(struct pt_regs *regs)
|
||||
void machine_check_exception(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long reason = get_mc_reason(regs);
|
||||
|
||||
|
@ -393,14 +393,14 @@ void SMIException(struct pt_regs *regs)
|
|||
#endif
|
||||
}
|
||||
|
||||
void UnknownException(struct pt_regs *regs)
|
||||
void unknown_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
|
||||
regs->nip, regs->msr, regs->trap, print_tainted());
|
||||
_exception(SIGTRAP, regs, 0, 0);
|
||||
}
|
||||
|
||||
void InstructionBreakpoint(struct pt_regs *regs)
|
||||
void instruction_breakpoint_exception(struct pt_regs *regs)
|
||||
{
|
||||
if (debugger_iabr_match(regs))
|
||||
return;
|
||||
|
@ -622,7 +622,7 @@ int check_bug_trap(struct pt_regs *regs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void ProgramCheckException(struct pt_regs *regs)
|
||||
void program_check_exception(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int reason = get_reason(regs);
|
||||
extern int do_mathemu(struct pt_regs *regs);
|
||||
|
@ -701,7 +701,7 @@ void ProgramCheckException(struct pt_regs *regs)
|
|||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
}
|
||||
|
||||
void SingleStepException(struct pt_regs *regs)
|
||||
void single_step_exception(struct pt_regs *regs)
|
||||
{
|
||||
regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
|
||||
if (debugger_sstep(regs))
|
||||
|
@ -709,7 +709,7 @@ void SingleStepException(struct pt_regs *regs)
|
|||
_exception(SIGTRAP, regs, TRAP_TRACE, 0);
|
||||
}
|
||||
|
||||
void AlignmentException(struct pt_regs *regs)
|
||||
void alignment_exception(struct pt_regs *regs)
|
||||
{
|
||||
int fixed;
|
||||
|
||||
|
@ -814,7 +814,7 @@ void TAUException(struct pt_regs *regs)
|
|||
}
|
||||
#endif /* CONFIG_INT_TAU */
|
||||
|
||||
void AltivecUnavailException(struct pt_regs *regs)
|
||||
void altivec_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
static int kernel_altivec_count;
|
||||
|
||||
|
@ -835,7 +835,7 @@ void AltivecUnavailException(struct pt_regs *regs)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
void AltivecAssistException(struct pt_regs *regs)
|
||||
void altivec_assist_exception(struct pt_regs *regs)
|
||||
{
|
||||
int err;
|
||||
|
||||
|
@ -872,7 +872,7 @@ void AltivecAssistException(struct pt_regs *regs)
|
|||
#endif /* CONFIG_ALTIVEC */
|
||||
|
||||
#ifdef CONFIG_E500
|
||||
void PerformanceMonitorException(struct pt_regs *regs)
|
||||
void performance_monitor_exception(struct pt_regs *regs)
|
||||
{
|
||||
perf_irq(regs);
|
||||
}
|
||||
|
|
|
@ -1,217 +0,0 @@
|
|||
#include <asm/ppc_asm.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* The routines below are in assembler so we can closely control the
|
||||
* usage of floating-point registers. These routines must be called
|
||||
* with preempt disabled.
|
||||
*/
|
||||
.data
|
||||
fpzero:
|
||||
.long 0
|
||||
fpone:
|
||||
.long 0x3f800000 /* 1.0 in single-precision FP */
|
||||
fphalf:
|
||||
.long 0x3f000000 /* 0.5 in single-precision FP */
|
||||
|
||||
.text
|
||||
/*
|
||||
* Internal routine to enable floating point and set FPSCR to 0.
|
||||
* Don't call it from C; it doesn't use the normal calling convention.
|
||||
*/
|
||||
fpenable:
|
||||
mfmsr r10
|
||||
ori r11,r10,MSR_FP
|
||||
mtmsr r11
|
||||
isync
|
||||
stfd fr0,24(r1)
|
||||
stfd fr1,16(r1)
|
||||
stfd fr31,8(r1)
|
||||
lis r11,fpzero@ha
|
||||
mffs fr31
|
||||
lfs fr1,fpzero@l(r11)
|
||||
mtfsf 0xff,fr1
|
||||
blr
|
||||
|
||||
fpdisable:
|
||||
mtfsf 0xff,fr31
|
||||
lfd fr31,8(r1)
|
||||
lfd fr1,16(r1)
|
||||
lfd fr0,24(r1)
|
||||
mtmsr r10
|
||||
isync
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector add, floating point.
|
||||
*/
|
||||
.globl vaddfp
|
||||
vaddfp:
|
||||
stwu r1,-32(r1)
|
||||
mflr r0
|
||||
stw r0,36(r1)
|
||||
bl fpenable
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
lfsx fr1,r5,r6
|
||||
fadds fr0,fr0,fr1
|
||||
stfsx fr0,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
bl fpdisable
|
||||
lwz r0,36(r1)
|
||||
mtlr r0
|
||||
addi r1,r1,32
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector subtract, floating point.
|
||||
*/
|
||||
.globl vsubfp
|
||||
vsubfp:
|
||||
stwu r1,-32(r1)
|
||||
mflr r0
|
||||
stw r0,36(r1)
|
||||
bl fpenable
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
lfsx fr1,r5,r6
|
||||
fsubs fr0,fr0,fr1
|
||||
stfsx fr0,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
bl fpdisable
|
||||
lwz r0,36(r1)
|
||||
mtlr r0
|
||||
addi r1,r1,32
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector multiply and add, floating point.
|
||||
*/
|
||||
.globl vmaddfp
|
||||
vmaddfp:
|
||||
stwu r1,-48(r1)
|
||||
mflr r0
|
||||
stw r0,52(r1)
|
||||
bl fpenable
|
||||
stfd fr2,32(r1)
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r7,0
|
||||
1: lfsx fr0,r4,r7
|
||||
lfsx fr1,r5,r7
|
||||
lfsx fr2,r6,r7
|
||||
fmadds fr0,fr0,fr2,fr1
|
||||
stfsx fr0,r3,r7
|
||||
addi r7,r7,4
|
||||
bdnz 1b
|
||||
lfd fr2,32(r1)
|
||||
bl fpdisable
|
||||
lwz r0,52(r1)
|
||||
mtlr r0
|
||||
addi r1,r1,48
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector negative multiply and subtract, floating point.
|
||||
*/
|
||||
.globl vnmsubfp
|
||||
vnmsubfp:
|
||||
stwu r1,-48(r1)
|
||||
mflr r0
|
||||
stw r0,52(r1)
|
||||
bl fpenable
|
||||
stfd fr2,32(r1)
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r7,0
|
||||
1: lfsx fr0,r4,r7
|
||||
lfsx fr1,r5,r7
|
||||
lfsx fr2,r6,r7
|
||||
fnmsubs fr0,fr0,fr2,fr1
|
||||
stfsx fr0,r3,r7
|
||||
addi r7,r7,4
|
||||
bdnz 1b
|
||||
lfd fr2,32(r1)
|
||||
bl fpdisable
|
||||
lwz r0,52(r1)
|
||||
mtlr r0
|
||||
addi r1,r1,48
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector reciprocal estimate. We just compute 1.0/x.
|
||||
* r3 -> destination, r4 -> source.
|
||||
*/
|
||||
.globl vrefp
|
||||
vrefp:
|
||||
stwu r1,-32(r1)
|
||||
mflr r0
|
||||
stw r0,36(r1)
|
||||
bl fpenable
|
||||
lis r9,fpone@ha
|
||||
li r0,4
|
||||
lfs fr1,fpone@l(r9)
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
fdivs fr0,fr1,fr0
|
||||
stfsx fr0,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
bl fpdisable
|
||||
lwz r0,36(r1)
|
||||
mtlr r0
|
||||
addi r1,r1,32
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector reciprocal square-root estimate, floating point.
|
||||
* We use the frsqrte instruction for the initial estimate followed
|
||||
* by 2 iterations of Newton-Raphson to get sufficient accuracy.
|
||||
* r3 -> destination, r4 -> source.
|
||||
*/
|
||||
.globl vrsqrtefp
|
||||
vrsqrtefp:
|
||||
stwu r1,-48(r1)
|
||||
mflr r0
|
||||
stw r0,52(r1)
|
||||
bl fpenable
|
||||
stfd fr2,32(r1)
|
||||
stfd fr3,40(r1)
|
||||
stfd fr4,48(r1)
|
||||
stfd fr5,56(r1)
|
||||
lis r9,fpone@ha
|
||||
lis r8,fphalf@ha
|
||||
li r0,4
|
||||
lfs fr4,fpone@l(r9)
|
||||
lfs fr5,fphalf@l(r8)
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
frsqrte fr1,fr0 /* r = frsqrte(s) */
|
||||
fmuls fr3,fr1,fr0 /* r * s */
|
||||
fmuls fr2,fr1,fr5 /* r * 0.5 */
|
||||
fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
|
||||
fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
|
||||
fmuls fr3,fr1,fr0 /* r * s */
|
||||
fmuls fr2,fr1,fr5 /* r * 0.5 */
|
||||
fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
|
||||
fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
|
||||
stfsx fr1,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
lfd fr5,56(r1)
|
||||
lfd fr4,48(r1)
|
||||
lfd fr3,40(r1)
|
||||
lfd fr2,32(r1)
|
||||
bl fpdisable
|
||||
lwz r0,36(r1)
|
||||
mtlr r0
|
||||
addi r1,r1,32
|
||||
blr
|
|
@ -178,7 +178,7 @@ void __init ibm44x_platform_init(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
/* Called from MachineCheckException */
|
||||
/* Called from machine_check_exception */
|
||||
void platform_machine_check(struct pt_regs *regs)
|
||||
{
|
||||
printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n",
|
||||
|
|
|
@ -279,7 +279,7 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|||
#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */
|
||||
}
|
||||
|
||||
/* Called from MachineCheckException */
|
||||
/* Called from machine_check_exception */
|
||||
void platform_machine_check(struct pt_regs *regs)
|
||||
{
|
||||
#if defined(DCRN_PLB0_BEAR)
|
||||
|
|
|
@ -82,7 +82,7 @@ CFLAGS += $(call cc-option,-funit-at-a-time)
|
|||
head-y := arch/ppc64/kernel/head.o
|
||||
|
||||
libs-y += arch/ppc64/lib/
|
||||
core-y += arch/ppc64/kernel/
|
||||
core-y += arch/ppc64/kernel/ arch/powerpc/kernel/
|
||||
core-y += arch/ppc64/mm/
|
||||
core-y += arch/powerpc/platforms/
|
||||
core-$(CONFIG_XMON) += arch/ppc64/xmon/
|
||||
|
|
|
@ -3,14 +3,16 @@
|
|||
#
|
||||
|
||||
EXTRA_CFLAGS += -mno-minimal-toc
|
||||
ifneq ($(CONFIG_PPC_MERGE),y)
|
||||
extra-y := head.o vmlinux.lds
|
||||
endif
|
||||
|
||||
obj-y := setup.o entry.o traps.o irq.o idle.o dma.o \
|
||||
obj-y := setup.o entry.o irq.o idle.o dma.o \
|
||||
time.o process.o signal.o syscalls.o misc.o ptrace.o \
|
||||
align.o semaphore.o bitops.o pacaData.o \
|
||||
udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \
|
||||
ptrace32.o signal32.o rtc.o init_task.o \
|
||||
lmb.o cputable.o cpu_setup_power4.o idle_power4.o \
|
||||
lmb.o cputable.o cpu_setup_power4.o \
|
||||
iommu.o sysfs.o vdso.o pmc.o firmware.o prom.o
|
||||
obj-y += vdso32/ vdso64/
|
||||
|
||||
|
@ -64,15 +66,13 @@ obj-$(CONFIG_PPC_BPA) += pSeries_smp.o
|
|||
obj-$(CONFIG_PPC_MAPLE) += smp-tbsync.o
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
|
||||
obj-$(CONFIG_KPROBES) += kprobes.o
|
||||
|
||||
CFLAGS_ioctl32.o += -Ifs/
|
||||
|
||||
ifneq ($(CONFIG_PPC_MERGE),y)
|
||||
ifeq ($(CONFIG_PPC_ISERIES),y)
|
||||
arch/ppc64/kernel/head.o: arch/ppc64/kernel/lparmap.s
|
||||
AFLAGS_head.o += -Iarch/ppc64/kernel
|
||||
arch/ppc64/kernel/head.o: arch/powerpc/platforms/iseries/lparmap.s
|
||||
AFLAGS_head.o += -Iarch/powerpc/platforms/iseries
|
||||
endif
|
||||
endif
|
||||
|
||||
# These are here while we do the architecture merge
|
||||
vecemu-y += ../../powerpc/kernel/vecemu.o
|
||||
|
|
|
@ -1,568 +0,0 @@
|
|||
/*
|
||||
* linux/arch/ppc64/kernel/traps.c
|
||||
*
|
||||
* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* Modified by Cort Dougan (cort@cs.nmt.edu)
|
||||
* and Paul Mackerras (paulus@cs.anu.edu.au)
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file handles the architecture-dependent parts of hardware exceptions
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/unistd.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/user.h>
|
||||
#include <linux/a.out.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kprobes.h>
|
||||
#include <asm/kdebug.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/ppcdebug.h>
|
||||
#include <asm/rtas.h>
|
||||
#include <asm/systemcfg.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pmc.h>
|
||||
|
||||
#ifdef CONFIG_DEBUGGER
|
||||
int (*__debugger)(struct pt_regs *regs);
|
||||
int (*__debugger_ipi)(struct pt_regs *regs);
|
||||
int (*__debugger_bpt)(struct pt_regs *regs);
|
||||
int (*__debugger_sstep)(struct pt_regs *regs);
|
||||
int (*__debugger_iabr_match)(struct pt_regs *regs);
|
||||
int (*__debugger_dabr_match)(struct pt_regs *regs);
|
||||
int (*__debugger_fault_handler)(struct pt_regs *regs);
|
||||
|
||||
EXPORT_SYMBOL(__debugger);
|
||||
EXPORT_SYMBOL(__debugger_ipi);
|
||||
EXPORT_SYMBOL(__debugger_bpt);
|
||||
EXPORT_SYMBOL(__debugger_sstep);
|
||||
EXPORT_SYMBOL(__debugger_iabr_match);
|
||||
EXPORT_SYMBOL(__debugger_dabr_match);
|
||||
EXPORT_SYMBOL(__debugger_fault_handler);
|
||||
#endif
|
||||
|
||||
struct notifier_block *powerpc_die_chain;
|
||||
static DEFINE_SPINLOCK(die_notifier_lock);
|
||||
|
||||
int register_die_notifier(struct notifier_block *nb)
|
||||
{
|
||||
int err = 0;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&die_notifier_lock, flags);
|
||||
err = notifier_chain_register(&powerpc_die_chain, nb);
|
||||
spin_unlock_irqrestore(&die_notifier_lock, flags);
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Trap & Exception support
|
||||
*/
|
||||
|
||||
static DEFINE_SPINLOCK(die_lock);
|
||||
|
||||
int die(const char *str, struct pt_regs *regs, long err)
|
||||
{
|
||||
static int die_counter;
|
||||
int nl = 0;
|
||||
|
||||
if (debugger(regs))
|
||||
return 1;
|
||||
|
||||
console_verbose();
|
||||
spin_lock_irq(&die_lock);
|
||||
bust_spinlocks(1);
|
||||
printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
|
||||
#ifdef CONFIG_PREEMPT
|
||||
printk("PREEMPT ");
|
||||
nl = 1;
|
||||
#endif
|
||||
#ifdef CONFIG_SMP
|
||||
printk("SMP NR_CPUS=%d ", NR_CPUS);
|
||||
nl = 1;
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_PAGEALLOC
|
||||
printk("DEBUG_PAGEALLOC ");
|
||||
nl = 1;
|
||||
#endif
|
||||
#ifdef CONFIG_NUMA
|
||||
printk("NUMA ");
|
||||
nl = 1;
|
||||
#endif
|
||||
switch(systemcfg->platform) {
|
||||
case PLATFORM_PSERIES:
|
||||
printk("PSERIES ");
|
||||
nl = 1;
|
||||
break;
|
||||
case PLATFORM_PSERIES_LPAR:
|
||||
printk("PSERIES LPAR ");
|
||||
nl = 1;
|
||||
break;
|
||||
case PLATFORM_ISERIES_LPAR:
|
||||
printk("ISERIES LPAR ");
|
||||
nl = 1;
|
||||
break;
|
||||
case PLATFORM_POWERMAC:
|
||||
printk("POWERMAC ");
|
||||
nl = 1;
|
||||
break;
|
||||
case PLATFORM_BPA:
|
||||
printk("BPA ");
|
||||
nl = 1;
|
||||
break;
|
||||
}
|
||||
if (nl)
|
||||
printk("\n");
|
||||
print_modules();
|
||||
show_regs(regs);
|
||||
bust_spinlocks(0);
|
||||
spin_unlock_irq(&die_lock);
|
||||
|
||||
if (in_interrupt())
|
||||
panic("Fatal exception in interrupt");
|
||||
|
||||
if (panic_on_oops) {
|
||||
printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
|
||||
ssleep(5);
|
||||
panic("Fatal exception");
|
||||
}
|
||||
do_exit(SIGSEGV);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
|
||||
{
|
||||
siginfo_t info;
|
||||
|
||||
if (!user_mode(regs)) {
|
||||
if (die("Exception in kernel mode", regs, signr))
|
||||
return;
|
||||
}
|
||||
|
||||
memset(&info, 0, sizeof(info));
|
||||
info.si_signo = signr;
|
||||
info.si_code = code;
|
||||
info.si_addr = (void __user *) addr;
|
||||
force_sig_info(signr, &info, current);
|
||||
}
|
||||
|
||||
void system_reset_exception(struct pt_regs *regs)
|
||||
{
|
||||
/* See if any machine dependent calls */
|
||||
if (ppc_md.system_reset_exception)
|
||||
ppc_md.system_reset_exception(regs);
|
||||
|
||||
die("System Reset", regs, 0);
|
||||
|
||||
/* Must die if the interrupt is not recoverable */
|
||||
if (!(regs->msr & MSR_RI))
|
||||
panic("Unrecoverable System Reset");
|
||||
|
||||
/* What should we do here? We could issue a shutdown or hard reset. */
|
||||
}
|
||||
|
||||
void machine_check_exception(struct pt_regs *regs)
|
||||
{
|
||||
int recover = 0;
|
||||
|
||||
/* See if any machine dependent calls */
|
||||
if (ppc_md.machine_check_exception)
|
||||
recover = ppc_md.machine_check_exception(regs);
|
||||
|
||||
if (recover)
|
||||
return;
|
||||
|
||||
if (debugger_fault_handler(regs))
|
||||
return;
|
||||
die("Machine check", regs, 0);
|
||||
|
||||
/* Must die if the interrupt is not recoverable */
|
||||
if (!(regs->msr & MSR_RI))
|
||||
panic("Unrecoverable Machine check");
|
||||
}
|
||||
|
||||
void unknown_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
|
||||
regs->nip, regs->msr, regs->trap);
|
||||
|
||||
_exception(SIGTRAP, regs, 0, 0);
|
||||
}
|
||||
|
||||
void instruction_breakpoint_exception(struct pt_regs *regs)
|
||||
{
|
||||
if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
|
||||
5, SIGTRAP) == NOTIFY_STOP)
|
||||
return;
|
||||
if (debugger_iabr_match(regs))
|
||||
return;
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
|
||||
}
|
||||
|
||||
void __kprobes single_step_exception(struct pt_regs *regs)
|
||||
{
|
||||
regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
|
||||
|
||||
if (notify_die(DIE_SSTEP, "single_step", regs, 5,
|
||||
5, SIGTRAP) == NOTIFY_STOP)
|
||||
return;
|
||||
if (debugger_sstep(regs))
|
||||
return;
|
||||
|
||||
_exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
|
||||
}
|
||||
|
||||
/*
|
||||
* After we have successfully emulated an instruction, we have to
|
||||
* check if the instruction was being single-stepped, and if so,
|
||||
* pretend we got a single-step exception. This was pointed out
|
||||
* by Kumar Gala. -- paulus
|
||||
*/
|
||||
static inline void emulate_single_step(struct pt_regs *regs)
|
||||
{
|
||||
if (regs->msr & MSR_SE)
|
||||
single_step_exception(regs);
|
||||
}
|
||||
|
||||
static void parse_fpe(struct pt_regs *regs)
|
||||
{
|
||||
int code = 0;
|
||||
unsigned long fpscr;
|
||||
|
||||
flush_fp_to_thread(current);
|
||||
|
||||
fpscr = current->thread.fpscr;
|
||||
|
||||
/* Invalid operation */
|
||||
if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
|
||||
code = FPE_FLTINV;
|
||||
|
||||
/* Overflow */
|
||||
else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
|
||||
code = FPE_FLTOVF;
|
||||
|
||||
/* Underflow */
|
||||
else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
|
||||
code = FPE_FLTUND;
|
||||
|
||||
/* Divide by zero */
|
||||
else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
|
||||
code = FPE_FLTDIV;
|
||||
|
||||
/* Inexact result */
|
||||
else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
|
||||
code = FPE_FLTRES;
|
||||
|
||||
_exception(SIGFPE, regs, code, regs->nip);
|
||||
}
|
||||
|
||||
/*
|
||||
* Illegal instruction emulation support. Return non-zero if we can't
|
||||
* emulate, or -EFAULT if the associated memory access caused an access
|
||||
* fault. Return zero on success.
|
||||
*/
|
||||
|
||||
#define INST_MFSPR_PVR 0x7c1f42a6
|
||||
#define INST_MFSPR_PVR_MASK 0xfc1fffff
|
||||
|
||||
#define INST_DCBA 0x7c0005ec
|
||||
#define INST_DCBA_MASK 0x7c0007fe
|
||||
|
||||
#define INST_MCRXR 0x7c000400
|
||||
#define INST_MCRXR_MASK 0x7c0007fe
|
||||
|
||||
static int emulate_instruction(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int instword;
|
||||
|
||||
if (!user_mode(regs))
|
||||
return -EINVAL;
|
||||
|
||||
CHECK_FULL_REGS(regs);
|
||||
|
||||
if (get_user(instword, (unsigned int __user *)(regs->nip)))
|
||||
return -EFAULT;
|
||||
|
||||
/* Emulate the mfspr rD, PVR. */
|
||||
if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
|
||||
unsigned int rd;
|
||||
|
||||
rd = (instword >> 21) & 0x1f;
|
||||
regs->gpr[rd] = mfspr(SPRN_PVR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Emulating the dcba insn is just a no-op. */
|
||||
if ((instword & INST_DCBA_MASK) == INST_DCBA) {
|
||||
static int warned;
|
||||
|
||||
if (!warned) {
|
||||
printk(KERN_WARNING
|
||||
"process %d (%s) uses obsolete 'dcba' insn\n",
|
||||
current->pid, current->comm);
|
||||
warned = 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Emulate the mcrxr insn. */
|
||||
if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
|
||||
static int warned;
|
||||
unsigned int shift;
|
||||
|
||||
if (!warned) {
|
||||
printk(KERN_WARNING
|
||||
"process %d (%s) uses obsolete 'mcrxr' insn\n",
|
||||
current->pid, current->comm);
|
||||
warned = 1;
|
||||
}
|
||||
|
||||
shift = (instword >> 21) & 0x1c;
|
||||
regs->ccr &= ~(0xf0000000 >> shift);
|
||||
regs->ccr |= (regs->xer & 0xf0000000) >> shift;
|
||||
regs->xer &= ~0xf0000000;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Look through the list of trap instructions that are used for BUG(),
|
||||
* BUG_ON() and WARN_ON() and see if we hit one. At this point we know
|
||||
* that the exception was caused by a trap instruction of some kind.
|
||||
* Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
|
||||
* otherwise.
|
||||
*/
|
||||
extern struct bug_entry __start___bug_table[], __stop___bug_table[];
|
||||
|
||||
#ifndef CONFIG_MODULES
|
||||
#define module_find_bug(x) NULL
|
||||
#endif
|
||||
|
||||
struct bug_entry *find_bug(unsigned long bugaddr)
|
||||
{
|
||||
struct bug_entry *bug;
|
||||
|
||||
for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
|
||||
if (bugaddr == bug->bug_addr)
|
||||
return bug;
|
||||
return module_find_bug(bugaddr);
|
||||
}
|
||||
|
||||
static int
|
||||
check_bug_trap(struct pt_regs *regs)
|
||||
{
|
||||
struct bug_entry *bug;
|
||||
unsigned long addr;
|
||||
|
||||
if (regs->msr & MSR_PR)
|
||||
return 0; /* not in kernel */
|
||||
addr = regs->nip; /* address of trap instruction */
|
||||
if (addr < PAGE_OFFSET)
|
||||
return 0;
|
||||
bug = find_bug(regs->nip);
|
||||
if (bug == NULL)
|
||||
return 0;
|
||||
if (bug->line & BUG_WARNING_TRAP) {
|
||||
/* this is a WARN_ON rather than BUG/BUG_ON */
|
||||
printk(KERN_ERR "Badness in %s at %s:%d\n",
|
||||
bug->function, bug->file,
|
||||
bug->line & ~BUG_WARNING_TRAP);
|
||||
show_stack(current, (void *)regs->gpr[1]);
|
||||
return 1;
|
||||
}
|
||||
printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
|
||||
bug->function, bug->file, bug->line);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __kprobes program_check_exception(struct pt_regs *regs)
|
||||
{
|
||||
if (debugger_fault_handler(regs))
|
||||
return;
|
||||
|
||||
if (regs->msr & 0x100000) {
|
||||
/* IEEE FP exception */
|
||||
parse_fpe(regs);
|
||||
} else if (regs->msr & 0x20000) {
|
||||
/* trap exception */
|
||||
|
||||
if (notify_die(DIE_BPT, "breakpoint", regs, 5,
|
||||
5, SIGTRAP) == NOTIFY_STOP)
|
||||
return;
|
||||
if (debugger_bpt(regs))
|
||||
return;
|
||||
|
||||
if (check_bug_trap(regs)) {
|
||||
regs->nip += 4;
|
||||
return;
|
||||
}
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
|
||||
|
||||
} else {
|
||||
/* Privileged or illegal instruction; try to emulate it. */
|
||||
switch (emulate_instruction(regs)) {
|
||||
case 0:
|
||||
regs->nip += 4;
|
||||
emulate_single_step(regs);
|
||||
break;
|
||||
|
||||
case -EFAULT:
|
||||
_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
|
||||
break;
|
||||
|
||||
default:
|
||||
if (regs->msr & 0x40000)
|
||||
/* priveleged */
|
||||
_exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
|
||||
else
|
||||
/* illegal */
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void kernel_fp_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
|
||||
"%lx at %lx\n", regs->trap, regs->nip);
|
||||
die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
|
||||
}
|
||||
|
||||
void altivec_unavailable_exception(struct pt_regs *regs)
|
||||
{
|
||||
if (user_mode(regs)) {
|
||||
/* A user program has executed an altivec instruction,
|
||||
but this kernel doesn't support altivec. */
|
||||
_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
|
||||
return;
|
||||
}
|
||||
printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
|
||||
"%lx at %lx\n", regs->trap, regs->nip);
|
||||
die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
|
||||
}
|
||||
|
||||
extern perf_irq_t perf_irq;
|
||||
|
||||
void performance_monitor_exception(struct pt_regs *regs)
|
||||
{
|
||||
perf_irq(regs);
|
||||
}
|
||||
|
||||
void alignment_exception(struct pt_regs *regs)
|
||||
{
|
||||
int fixed;
|
||||
|
||||
fixed = fix_alignment(regs);
|
||||
|
||||
if (fixed == 1) {
|
||||
regs->nip += 4; /* skip over emulated instruction */
|
||||
emulate_single_step(regs);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Operand address was bad */
|
||||
if (fixed == -EFAULT) {
|
||||
if (user_mode(regs)) {
|
||||
_exception(SIGSEGV, regs, SEGV_MAPERR, regs->dar);
|
||||
} else {
|
||||
/* Search exception table */
|
||||
bad_page_fault(regs, regs->dar, SIGSEGV);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
_exception(SIGBUS, regs, BUS_ADRALN, regs->nip);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ALTIVEC
|
||||
void altivec_assist_exception(struct pt_regs *regs)
|
||||
{
|
||||
int err;
|
||||
siginfo_t info;
|
||||
|
||||
if (!user_mode(regs)) {
|
||||
printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
|
||||
" at %lx\n", regs->nip);
|
||||
die("Kernel VMX/Altivec assist exception", regs, SIGILL);
|
||||
}
|
||||
|
||||
flush_altivec_to_thread(current);
|
||||
|
||||
err = emulate_altivec(regs);
|
||||
if (err == 0) {
|
||||
regs->nip += 4; /* skip emulated instruction */
|
||||
emulate_single_step(regs);
|
||||
return;
|
||||
}
|
||||
|
||||
if (err == -EFAULT) {
|
||||
/* got an error reading the instruction */
|
||||
info.si_signo = SIGSEGV;
|
||||
info.si_errno = 0;
|
||||
info.si_code = SEGV_MAPERR;
|
||||
info.si_addr = (void __user *) regs->nip;
|
||||
force_sig_info(SIGSEGV, &info, current);
|
||||
} else {
|
||||
/* didn't recognize the instruction */
|
||||
/* XXX quick hack for now: set the non-Java bit in the VSCR */
|
||||
if (printk_ratelimit())
|
||||
printk(KERN_ERR "Unrecognized altivec instruction "
|
||||
"in %s at %lx\n", current->comm, regs->nip);
|
||||
current->thread.vscr.u[3] |= 0x10000;
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_ALTIVEC */
|
||||
|
||||
/*
|
||||
* We enter here if we get an unrecoverable exception, that is, one
|
||||
* that happened at a point where the RI (recoverable interrupt) bit
|
||||
* in the MSR is 0. This indicates that SRR0/1 are live, and that
|
||||
* we therefore lost state by taking this exception.
|
||||
*/
|
||||
void unrecoverable_exception(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
|
||||
regs->trap, regs->nip);
|
||||
die("Unrecoverable exception", regs, SIGABRT);
|
||||
}
|
||||
|
||||
/*
|
||||
* We enter here if we discover during exception entry that we are
|
||||
* running in supervisor mode with a userspace value in the stack pointer.
|
||||
*/
|
||||
void kernel_bad_stack(struct pt_regs *regs)
|
||||
{
|
||||
printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
|
||||
regs->gpr[1], regs->nip);
|
||||
die("Bad kernel stack pointer", regs, SIGABRT);
|
||||
}
|
||||
|
||||
void __init trap_init(void)
|
||||
{
|
||||
}
|
|
@ -1,172 +0,0 @@
|
|||
#include <asm/ppc_asm.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* The routines below are in assembler so we can closely control the
|
||||
* usage of floating-point registers. These routines must be called
|
||||
* with preempt disabled.
|
||||
*/
|
||||
.section ".toc","aw"
|
||||
fpzero:
|
||||
.tc FD_0_0[TC],0
|
||||
fpone:
|
||||
.tc FD_3ff00000_0[TC],0x3ff0000000000000 /* 1.0 */
|
||||
fphalf:
|
||||
.tc FD_3fe00000_0[TC],0x3fe0000000000000 /* 0.5 */
|
||||
|
||||
.text
|
||||
/*
|
||||
* Internal routine to enable floating point and set FPSCR to 0.
|
||||
* Don't call it from C; it doesn't use the normal calling convention.
|
||||
*/
|
||||
fpenable:
|
||||
mfmsr r10
|
||||
ori r11,r10,MSR_FP
|
||||
mtmsr r11
|
||||
isync
|
||||
stfd fr31,-8(r1)
|
||||
stfd fr0,-16(r1)
|
||||
stfd fr1,-24(r1)
|
||||
mffs fr31
|
||||
lfd fr1,fpzero@toc(r2)
|
||||
mtfsf 0xff,fr1
|
||||
blr
|
||||
|
||||
fpdisable:
|
||||
mtlr r12
|
||||
mtfsf 0xff,fr31
|
||||
lfd fr1,-24(r1)
|
||||
lfd fr0,-16(r1)
|
||||
lfd fr31,-8(r1)
|
||||
mtmsr r10
|
||||
isync
|
||||
blr
|
||||
|
||||
/*
|
||||
* Vector add, floating point.
|
||||
*/
|
||||
_GLOBAL(vaddfp)
|
||||
mflr r12
|
||||
bl fpenable
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
lfsx fr1,r5,r6
|
||||
fadds fr0,fr0,fr1
|
||||
stfsx fr0,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
b fpdisable
|
||||
|
||||
/*
|
||||
* Vector subtract, floating point.
|
||||
*/
|
||||
_GLOBAL(vsubfp)
|
||||
mflr r12
|
||||
bl fpenable
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
lfsx fr1,r5,r6
|
||||
fsubs fr0,fr0,fr1
|
||||
stfsx fr0,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
b fpdisable
|
||||
|
||||
/*
|
||||
* Vector multiply and add, floating point.
|
||||
*/
|
||||
_GLOBAL(vmaddfp)
|
||||
mflr r12
|
||||
bl fpenable
|
||||
stfd fr2,-32(r1)
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r7,0
|
||||
1: lfsx fr0,r4,r7
|
||||
lfsx fr1,r5,r7
|
||||
lfsx fr2,r6,r7
|
||||
fmadds fr0,fr0,fr2,fr1
|
||||
stfsx fr0,r3,r7
|
||||
addi r7,r7,4
|
||||
bdnz 1b
|
||||
lfd fr2,-32(r1)
|
||||
b fpdisable
|
||||
|
||||
/*
|
||||
* Vector negative multiply and subtract, floating point.
|
||||
*/
|
||||
_GLOBAL(vnmsubfp)
|
||||
mflr r12
|
||||
bl fpenable
|
||||
stfd fr2,-32(r1)
|
||||
li r0,4
|
||||
mtctr r0
|
||||
li r7,0
|
||||
1: lfsx fr0,r4,r7
|
||||
lfsx fr1,r5,r7
|
||||
lfsx fr2,r6,r7
|
||||
fnmsubs fr0,fr0,fr2,fr1
|
||||
stfsx fr0,r3,r7
|
||||
addi r7,r7,4
|
||||
bdnz 1b
|
||||
lfd fr2,-32(r1)
|
||||
b fpdisable
|
||||
|
||||
/*
|
||||
* Vector reciprocal estimate. We just compute 1.0/x.
|
||||
* r3 -> destination, r4 -> source.
|
||||
*/
|
||||
_GLOBAL(vrefp)
|
||||
mflr r12
|
||||
bl fpenable
|
||||
li r0,4
|
||||
lfd fr1,fpone@toc(r2)
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
fdivs fr0,fr1,fr0
|
||||
stfsx fr0,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
b fpdisable
|
||||
|
||||
/*
|
||||
* Vector reciprocal square-root estimate, floating point.
|
||||
* We use the frsqrte instruction for the initial estimate followed
|
||||
* by 2 iterations of Newton-Raphson to get sufficient accuracy.
|
||||
* r3 -> destination, r4 -> source.
|
||||
*/
|
||||
_GLOBAL(vrsqrtefp)
|
||||
mflr r12
|
||||
bl fpenable
|
||||
stfd fr2,-32(r1)
|
||||
stfd fr3,-40(r1)
|
||||
stfd fr4,-48(r1)
|
||||
stfd fr5,-56(r1)
|
||||
li r0,4
|
||||
lfd fr4,fpone@toc(r2)
|
||||
lfd fr5,fphalf@toc(r2)
|
||||
mtctr r0
|
||||
li r6,0
|
||||
1: lfsx fr0,r4,r6
|
||||
frsqrte fr1,fr0 /* r = frsqrte(s) */
|
||||
fmuls fr3,fr1,fr0 /* r * s */
|
||||
fmuls fr2,fr1,fr5 /* r * 0.5 */
|
||||
fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
|
||||
fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
|
||||
fmuls fr3,fr1,fr0 /* r * s */
|
||||
fmuls fr2,fr1,fr5 /* r * 0.5 */
|
||||
fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
|
||||
fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
|
||||
stfsx fr1,r3,r6
|
||||
addi r6,r6,4
|
||||
bdnz 1b
|
||||
lfd fr5,-56(r1)
|
||||
lfd fr4,-48(r1)
|
||||
lfd fr3,-40(r1)
|
||||
lfd fr2,-32(r1)
|
||||
b fpdisable
|
|
@ -118,10 +118,10 @@ extern void _set_L3CR(unsigned long);
|
|||
#endif
|
||||
|
||||
extern void via_cuda_init(void);
|
||||
extern void pmac_nvram_init(void);
|
||||
extern void read_rtc_time(void);
|
||||
extern void pmac_find_display(void);
|
||||
extern void giveup_fpu(struct task_struct *);
|
||||
extern void disable_kernel_fp(void);
|
||||
extern void enable_kernel_fp(void);
|
||||
extern void flush_fp_to_thread(struct task_struct *);
|
||||
extern void enable_kernel_altivec(void);
|
||||
|
@ -346,5 +346,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
|
|||
|
||||
#define arch_align_stack(x) (x)
|
||||
|
||||
extern unsigned long reloc_offset(void);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_SYSTEM_H */
|
||||
|
|
|
@ -87,7 +87,7 @@ extern void cacheable_memzero(void *p, unsigned int nb);
|
|||
extern void *cacheable_memcpy(void *, const void *, unsigned int);
|
||||
extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
|
||||
extern void bad_page_fault(struct pt_regs *, unsigned long, int);
|
||||
extern void die(const char *, struct pt_regs *, long);
|
||||
extern int die(const char *, struct pt_regs *, long);
|
||||
extern void _exception(int, struct pt_regs *, int, unsigned long);
|
||||
#ifdef CONFIG_BOOKE_WDT
|
||||
extern u32 booke_wdt_enabled;
|
||||
|
|
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