RDMA/hns: Remove unnecessary access right set during INIT2INIT
As the qp access right is checked and setted in common function hns_roce_v2_set_opt_fields(), there is no need to set again for a special case INIT2INIT. Fixes:926a01dc00
("RDMA/hns: Add QP operations support for hip08 SoC") Fixes:7db82697b8
("RDMA/hns: Add support for extended atomic in userspace") Link: https://lore.kernel.org/r/1607650657-35992-7-git-send-email-liweihang@huawei.com Signed-off-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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f75506833e
Коммит
29b52027ac
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@ -3975,7 +3975,6 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp,
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roce_set_bit(context->byte_172_sq_psn, V2_QPC_BYTE_172_FRE_S, 1);
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hr_qp->access_flags = attr->qp_access_flags;
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roce_set_field(context->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M,
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V2_QPC_BYTE_252_TX_CQN_S, to_hr_cq(ibqp->send_cq)->cqn);
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@ -4004,51 +4003,6 @@ static void modify_qp_init_to_init(struct ib_qp *ibqp,
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roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M,
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V2_QPC_BYTE_4_TST_S, 0);
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if (attr_mask & IB_QP_ACCESS_FLAGS) {
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roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
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!!(attr->qp_access_flags & IB_ACCESS_REMOTE_READ));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
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0);
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roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
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!!(attr->qp_access_flags &
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IB_ACCESS_REMOTE_WRITE));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
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0);
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roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
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!!(attr->qp_access_flags &
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IB_ACCESS_REMOTE_ATOMIC));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
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0);
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roce_set_bit(context->byte_76_srqn_op_en,
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V2_QPC_BYTE_76_EXT_ATE_S,
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!!(attr->qp_access_flags &
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IB_ACCESS_REMOTE_ATOMIC));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en,
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V2_QPC_BYTE_76_EXT_ATE_S, 0);
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} else {
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roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
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!!(hr_qp->access_flags & IB_ACCESS_REMOTE_READ));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
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0);
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roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
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!!(hr_qp->access_flags & IB_ACCESS_REMOTE_WRITE));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
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0);
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roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
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!!(hr_qp->access_flags & IB_ACCESS_REMOTE_ATOMIC));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
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0);
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roce_set_bit(context->byte_76_srqn_op_en,
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V2_QPC_BYTE_76_EXT_ATE_S,
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!!(hr_qp->access_flags & IB_ACCESS_REMOTE_ATOMIC));
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roce_set_bit(qpc_mask->byte_76_srqn_op_en,
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V2_QPC_BYTE_76_EXT_ATE_S, 0);
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}
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roce_set_field(context->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,
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V2_QPC_BYTE_16_PD_S, to_hr_pd(ibqp->pd)->pdn);
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roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,
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