Merge branch 'imx/devel' into next/devel
This commit is contained in:
Коммит
29ea35969b
|
@ -0,0 +1,13 @@
|
|||
What: /sys/class/scsi_host/hostX/isci_id
|
||||
Date: June 2011
|
||||
Contact: Dave Jiang <dave.jiang@intel.com>
|
||||
Description:
|
||||
This file contains the enumerated host ID for the Intel
|
||||
SCU controller. The Intel(R) C600 Series Chipset SATA/SAS
|
||||
Storage Control Unit embeds up to two 4-port controllers in
|
||||
a single PCI device. The controllers are enumerated in order
|
||||
which usually means the lowest number scsi_host corresponds
|
||||
with the first controller, but this association is not
|
||||
guaranteed. The 'isci_id' attribute unambiguously identifies
|
||||
the controller index: '0' for the first controller,
|
||||
'1' for the second.
|
|
@ -380,7 +380,7 @@ will be charged as a new owner of it.
|
|||
|
||||
5.2 stat file
|
||||
|
||||
5.2.1 memory.stat file includes following statistics
|
||||
memory.stat file includes following statistics
|
||||
|
||||
# per-memory cgroup local status
|
||||
cache - # of bytes of page cache memory.
|
||||
|
@ -438,89 +438,6 @@ Note:
|
|||
file_mapped is accounted only when the memory cgroup is owner of page
|
||||
cache.)
|
||||
|
||||
5.2.2 memory.vmscan_stat
|
||||
|
||||
memory.vmscan_stat includes statistics information for memory scanning and
|
||||
freeing, reclaiming. The statistics shows memory scanning information since
|
||||
memory cgroup creation and can be reset to 0 by writing 0 as
|
||||
|
||||
#echo 0 > ../memory.vmscan_stat
|
||||
|
||||
This file contains following statistics.
|
||||
|
||||
[param]_[file_or_anon]_pages_by_[reason]_[under_heararchy]
|
||||
[param]_elapsed_ns_by_[reason]_[under_hierarchy]
|
||||
|
||||
For example,
|
||||
|
||||
scanned_file_pages_by_limit indicates the number of scanned
|
||||
file pages at vmscan.
|
||||
|
||||
Now, 3 parameters are supported
|
||||
|
||||
scanned - the number of pages scanned by vmscan
|
||||
rotated - the number of pages activated at vmscan
|
||||
freed - the number of pages freed by vmscan
|
||||
|
||||
If "rotated" is high against scanned/freed, the memcg seems busy.
|
||||
|
||||
Now, 2 reason are supported
|
||||
|
||||
limit - the memory cgroup's limit
|
||||
system - global memory pressure + softlimit
|
||||
(global memory pressure not under softlimit is not handled now)
|
||||
|
||||
When under_hierarchy is added in the tail, the number indicates the
|
||||
total memcg scan of its children and itself.
|
||||
|
||||
elapsed_ns is a elapsed time in nanosecond. This may include sleep time
|
||||
and not indicates CPU usage. So, please take this as just showing
|
||||
latency.
|
||||
|
||||
Here is an example.
|
||||
|
||||
# cat /cgroup/memory/A/memory.vmscan_stat
|
||||
scanned_pages_by_limit 9471864
|
||||
scanned_anon_pages_by_limit 6640629
|
||||
scanned_file_pages_by_limit 2831235
|
||||
rotated_pages_by_limit 4243974
|
||||
rotated_anon_pages_by_limit 3971968
|
||||
rotated_file_pages_by_limit 272006
|
||||
freed_pages_by_limit 2318492
|
||||
freed_anon_pages_by_limit 962052
|
||||
freed_file_pages_by_limit 1356440
|
||||
elapsed_ns_by_limit 351386416101
|
||||
scanned_pages_by_system 0
|
||||
scanned_anon_pages_by_system 0
|
||||
scanned_file_pages_by_system 0
|
||||
rotated_pages_by_system 0
|
||||
rotated_anon_pages_by_system 0
|
||||
rotated_file_pages_by_system 0
|
||||
freed_pages_by_system 0
|
||||
freed_anon_pages_by_system 0
|
||||
freed_file_pages_by_system 0
|
||||
elapsed_ns_by_system 0
|
||||
scanned_pages_by_limit_under_hierarchy 9471864
|
||||
scanned_anon_pages_by_limit_under_hierarchy 6640629
|
||||
scanned_file_pages_by_limit_under_hierarchy 2831235
|
||||
rotated_pages_by_limit_under_hierarchy 4243974
|
||||
rotated_anon_pages_by_limit_under_hierarchy 3971968
|
||||
rotated_file_pages_by_limit_under_hierarchy 272006
|
||||
freed_pages_by_limit_under_hierarchy 2318492
|
||||
freed_anon_pages_by_limit_under_hierarchy 962052
|
||||
freed_file_pages_by_limit_under_hierarchy 1356440
|
||||
elapsed_ns_by_limit_under_hierarchy 351386416101
|
||||
scanned_pages_by_system_under_hierarchy 0
|
||||
scanned_anon_pages_by_system_under_hierarchy 0
|
||||
scanned_file_pages_by_system_under_hierarchy 0
|
||||
rotated_pages_by_system_under_hierarchy 0
|
||||
rotated_anon_pages_by_system_under_hierarchy 0
|
||||
rotated_file_pages_by_system_under_hierarchy 0
|
||||
freed_pages_by_system_under_hierarchy 0
|
||||
freed_anon_pages_by_system_under_hierarchy 0
|
||||
freed_file_pages_by_system_under_hierarchy 0
|
||||
elapsed_ns_by_system_under_hierarchy 0
|
||||
|
||||
5.3 swappiness
|
||||
|
||||
Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only.
|
||||
|
|
|
@ -35,13 +35,6 @@ the Out-Of-Spec bit. Following table summarizes the exported sysfs files:
|
|||
All Sysfs entries are named with their core_id (represented here by 'X').
|
||||
tempX_input - Core temperature (in millidegrees Celsius).
|
||||
tempX_max - All cooling devices should be turned on (on Core2).
|
||||
Initialized with IA32_THERM_INTERRUPT. When the CPU
|
||||
temperature reaches this temperature, an interrupt is
|
||||
generated and tempX_max_alarm is set.
|
||||
tempX_max_hyst - If the CPU temperature falls below than temperature,
|
||||
an interrupt is generated and tempX_max_alarm is reset.
|
||||
tempX_max_alarm - Set if the temperature reaches or exceeds tempX_max.
|
||||
Reset if the temperature drops to or below tempX_max_hyst.
|
||||
tempX_crit - Maximum junction temperature (in millidegrees Celsius).
|
||||
tempX_crit_alarm - Set when Out-of-spec bit is set, never clears.
|
||||
Correct CPU operation is no longer guaranteed.
|
||||
|
@ -49,9 +42,10 @@ tempX_label - Contains string "Core X", where X is processor
|
|||
number. For Package temp, this will be "Physical id Y",
|
||||
where Y is the package number.
|
||||
|
||||
The TjMax temperature is set to 85 degrees C if undocumented model specific
|
||||
register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as
|
||||
(sometimes) documented in processor datasheet.
|
||||
On CPU models which support it, TjMax is read from a model-specific register.
|
||||
On other models, it is set to an arbitrary value based on weak heuristics.
|
||||
If these heuristics don't work for you, you can pass the correct TjMax value
|
||||
as a module parameter (tjmax).
|
||||
|
||||
Appendix A. Known TjMax lists (TBD):
|
||||
Some information comes from ark.intel.com
|
||||
|
|
|
@ -2086,9 +2086,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
Override pmtimer IOPort with a hex value.
|
||||
e.g. pmtmr=0x508
|
||||
|
||||
pnp.debug [PNP]
|
||||
Enable PNP debug messages. This depends on the
|
||||
CONFIG_PNP_DEBUG_MESSAGES option.
|
||||
pnp.debug=1 [PNP]
|
||||
Enable PNP debug messages (depends on the
|
||||
CONFIG_PNP_DEBUG_MESSAGES option). Change at run-time
|
||||
via /sys/module/pnp/parameters/debug. We always show
|
||||
current resource usage; turning this on also shows
|
||||
possible settings and some assignment information.
|
||||
|
||||
pnpacpi= [ACPI]
|
||||
{ off }
|
||||
|
|
|
@ -1,3 +1,5 @@
|
|||
Note: This driver doesn't have a maintainer.
|
||||
|
||||
Davicom DM9102(A)/DM9132/DM9801 fast ethernet driver for Linux.
|
||||
|
||||
This program is free software; you can redistribute it and/or
|
||||
|
@ -55,7 +57,6 @@ Test and make sure PCI latency is now correct for all cases.
|
|||
Authors:
|
||||
|
||||
Sten Wang <sten_wang@davicom.com.tw > : Original Author
|
||||
Tobias Ringstrom <tori@unhappy.mine.nu> : Current Maintainer
|
||||
|
||||
Contributors:
|
||||
|
||||
|
|
|
@ -1042,7 +1042,7 @@ conf/interface/*:
|
|||
The functional behaviour for certain settings is different
|
||||
depending on whether local forwarding is enabled or not.
|
||||
|
||||
accept_ra - BOOLEAN
|
||||
accept_ra - INTEGER
|
||||
Accept Router Advertisements; autoconfigure using them.
|
||||
|
||||
Possible values are:
|
||||
|
@ -1106,7 +1106,7 @@ dad_transmits - INTEGER
|
|||
The amount of Duplicate Address Detection probes to send.
|
||||
Default: 1
|
||||
|
||||
forwarding - BOOLEAN
|
||||
forwarding - INTEGER
|
||||
Configure interface-specific Host/Router behaviour.
|
||||
|
||||
Note: It is recommended to have the same setting on all
|
||||
|
|
|
@ -243,7 +243,7 @@ configured. The number of entries in the global flow table is set through:
|
|||
|
||||
The number of entries in the per-queue flow table are set through:
|
||||
|
||||
/sys/class/net/<dev>/queues/tx-<n>/rps_flow_cnt
|
||||
/sys/class/net/<dev>/queues/rx-<n>/rps_flow_cnt
|
||||
|
||||
== Suggested Configuration
|
||||
|
||||
|
|
|
@ -123,10 +123,11 @@ be automatically shutdown if it's set to "never".
|
|||
khugepaged runs usually at low frequency so while one may not want to
|
||||
invoke defrag algorithms synchronously during the page faults, it
|
||||
should be worth invoking defrag at least in khugepaged. However it's
|
||||
also possible to disable defrag in khugepaged:
|
||||
also possible to disable defrag in khugepaged by writing 0 or enable
|
||||
defrag in khugepaged by writing 1:
|
||||
|
||||
echo yes >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag
|
||||
echo no >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag
|
||||
echo 0 >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag
|
||||
echo 1 >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag
|
||||
|
||||
You can also control how many pages khugepaged should scan at each
|
||||
pass:
|
||||
|
|
24
MAINTAINERS
24
MAINTAINERS
|
@ -1278,7 +1278,6 @@ F: drivers/input/misc/ati_remote2.c
|
|||
ATLX ETHERNET DRIVERS
|
||||
M: Jay Cliburn <jcliburn@gmail.com>
|
||||
M: Chris Snook <chris.snook@gmail.com>
|
||||
M: Jie Yang <jie.yang@atheros.com>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://sourceforge.net/projects/atl1
|
||||
W: http://atl1.sourceforge.net
|
||||
|
@ -1574,7 +1573,6 @@ F: drivers/scsi/bfa/
|
|||
|
||||
BROCADE BNA 10 GIGABIT ETHERNET DRIVER
|
||||
M: Rasesh Mody <rmody@brocade.com>
|
||||
M: Debashis Dutt <ddutt@brocade.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/bna/
|
||||
|
@ -1758,7 +1756,6 @@ F: Documentation/zh_CN/
|
|||
|
||||
CISCO VIC ETHERNET NIC DRIVER
|
||||
M: Christian Benvenuti <benve@cisco.com>
|
||||
M: Vasanthy Kolluri <vkolluri@cisco.com>
|
||||
M: Roopa Prabhu <roprabhu@cisco.com>
|
||||
M: David Wang <dwang2@cisco.com>
|
||||
S: Supported
|
||||
|
@ -3262,6 +3259,17 @@ F: Documentation/input/multi-touch-protocol.txt
|
|||
F: drivers/input/input-mt.c
|
||||
K: \b(ABS|SYN)_MT_
|
||||
|
||||
INTEL C600 SERIES SAS CONTROLLER DRIVER
|
||||
M: Intel SCU Linux support <intel-linux-scu@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
M: Ed Nadolski <edmund.nadolski@intel.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git
|
||||
S: Maintained
|
||||
F: drivers/scsi/isci/
|
||||
F: firmware/isci/
|
||||
|
||||
INTEL IDLE DRIVER
|
||||
M: Len Brown <lenb@kernel.org>
|
||||
L: linux-pm@lists.linux-foundation.org
|
||||
|
@ -4404,7 +4412,8 @@ L: netfilter@vger.kernel.org
|
|||
L: coreteam@netfilter.org
|
||||
W: http://www.netfilter.org/
|
||||
W: http://www.iptables.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kaber/nf-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-next-2.6.git
|
||||
S: Supported
|
||||
F: include/linux/netfilter*
|
||||
F: include/linux/netfilter/
|
||||
|
@ -4774,7 +4783,7 @@ F: drivers/net/wireless/orinoco/
|
|||
|
||||
OSD LIBRARY and FILESYSTEM
|
||||
M: Boaz Harrosh <bharrosh@panasas.com>
|
||||
M: Benny Halevy <bhalevy@panasas.com>
|
||||
M: Benny Halevy <bhalevy@tonian.com>
|
||||
L: osd-dev@open-osd.org
|
||||
W: http://open-osd.org
|
||||
T: git git://git.open-osd.org/open-osd.git
|
||||
|
@ -6365,7 +6374,6 @@ S: Supported
|
|||
F: arch/arm/mach-tegra
|
||||
|
||||
TEHUTI ETHERNET DRIVER
|
||||
M: Alexander Indenbaum <baum@tehutinetworks.net>
|
||||
M: Andy Gospodarek <andy@greyhouse.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
@ -7200,6 +7208,9 @@ W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
|
|||
S: Supported
|
||||
F: Documentation/hwmon/wm83??
|
||||
F: drivers/leds/leds-wm83*.c
|
||||
F: drivers/input/misc/wm831x-on.c
|
||||
F: drivers/input/touchscreen/wm831x-ts.c
|
||||
F: drivers/input/touchscreen/wm97*.c
|
||||
F: drivers/mfd/wm8*.c
|
||||
F: drivers/power/wm83*.c
|
||||
F: drivers/rtc/rtc-wm83*.c
|
||||
|
@ -7209,6 +7220,7 @@ F: drivers/watchdog/wm83*_wdt.c
|
|||
F: include/linux/mfd/wm831x/
|
||||
F: include/linux/mfd/wm8350/
|
||||
F: include/linux/mfd/wm8400*
|
||||
F: include/linux/wm97xx.h
|
||||
F: include/sound/wm????.h
|
||||
F: sound/soc/codecs/wm*
|
||||
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 1
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION = -rc9
|
||||
NAME = "Divemaster Edition"
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -51,7 +51,7 @@ config GENERIC_CMOS_UPDATE
|
|||
def_bool y
|
||||
|
||||
config GENERIC_GPIO
|
||||
def_bool y
|
||||
bool
|
||||
|
||||
config ZONE_DMA
|
||||
bool
|
||||
|
|
|
@ -1284,6 +1284,20 @@ config ARM_ERRATA_364296
|
|||
processor into full low interrupt latency mode. ARM11MPCore
|
||||
is not affected.
|
||||
|
||||
config ARM_ERRATA_764369
|
||||
bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
|
||||
depends on CPU_V7 && SMP
|
||||
help
|
||||
This option enables the workaround for erratum 764369
|
||||
affecting Cortex-A9 MPCore with two or more processors (all
|
||||
current revisions). Under certain timing circumstances, a data
|
||||
cache line maintenance operation by MVA targeting an Inner
|
||||
Shareable memory region may fail to proceed up to either the
|
||||
Point of Coherency or to the Point of Unification of the
|
||||
system. This workaround adds a DSB instruction before the
|
||||
relevant cache maintenance functions and sets a specific bit
|
||||
in the diagnostic control register of the SCU.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/arm/common/Kconfig"
|
||||
|
|
|
@ -57,14 +57,14 @@
|
|||
};
|
||||
|
||||
sdhci@c8000200 {
|
||||
gpios = <&gpio 69 0>, /* cd, gpio PI5 */
|
||||
<&gpio 57 0>, /* wp, gpio PH1 */
|
||||
<&gpio 155 0>; /* power, gpio PT3 */
|
||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
||||
};
|
||||
|
||||
sdhci@c8000600 {
|
||||
gpios = <&gpio 58 0>, /* cd, gpio PH2 */
|
||||
<&gpio 59 0>, /* wp, gpio PH3 */
|
||||
<&gpio 70 0>; /* power, gpio PI6 */
|
||||
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
|
||||
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
|
||||
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
||||
};
|
||||
};
|
||||
|
|
|
@ -21,8 +21,8 @@
|
|||
};
|
||||
|
||||
sdhci@c8000400 {
|
||||
gpios = <&gpio 69 0>, /* cd, gpio PI5 */
|
||||
<&gpio 57 0>, /* wp, gpio PH1 */
|
||||
<&gpio 70 0>; /* power, gpio PI6 */
|
||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
||||
};
|
||||
};
|
||||
|
|
|
@ -26,6 +26,7 @@ CONFIG_MACH_MX23EVK=y
|
|||
CONFIG_MACH_MX28EVK=y
|
||||
CONFIG_MACH_STMP378X_DEVB=y
|
||||
CONFIG_MACH_TX28=y
|
||||
CONFIG_MACH_M28EVK=y
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
|
|
|
@ -25,17 +25,17 @@
|
|||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
|
||||
#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
|
||||
smp_mb(); \
|
||||
__asm__ __volatile__( \
|
||||
"1: ldrex %1, [%2]\n" \
|
||||
"1: ldrex %1, [%3]\n" \
|
||||
" " insn "\n" \
|
||||
"2: strex %1, %0, [%2]\n" \
|
||||
" teq %1, #0\n" \
|
||||
"2: strex %2, %0, [%3]\n" \
|
||||
" teq %2, #0\n" \
|
||||
" bne 1b\n" \
|
||||
" mov %0, #0\n" \
|
||||
__futex_atomic_ex_table("%4") \
|
||||
: "=&r" (ret), "=&r" (oldval) \
|
||||
__futex_atomic_ex_table("%5") \
|
||||
: "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
|
||||
: "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
|
||||
: "cc", "memory")
|
||||
|
||||
|
@ -73,14 +73,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
#include <linux/preempt.h>
|
||||
#include <asm/domain.h>
|
||||
|
||||
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
|
||||
#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
|
||||
__asm__ __volatile__( \
|
||||
"1: " T(ldr) " %1, [%2]\n" \
|
||||
"1: " T(ldr) " %1, [%3]\n" \
|
||||
" " insn "\n" \
|
||||
"2: " T(str) " %0, [%2]\n" \
|
||||
"2: " T(str) " %0, [%3]\n" \
|
||||
" mov %0, #0\n" \
|
||||
__futex_atomic_ex_table("%4") \
|
||||
: "=&r" (ret), "=&r" (oldval) \
|
||||
__futex_atomic_ex_table("%5") \
|
||||
: "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \
|
||||
: "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
|
||||
: "cc", "memory")
|
||||
|
||||
|
@ -117,7 +117,7 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
|
|||
int cmp = (encoded_op >> 24) & 15;
|
||||
int oparg = (encoded_op << 8) >> 20;
|
||||
int cmparg = (encoded_op << 20) >> 20;
|
||||
int oldval = 0, ret;
|
||||
int oldval = 0, ret, tmp;
|
||||
|
||||
if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
|
||||
oparg = 1 << oparg;
|
||||
|
@ -129,19 +129,19 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
|
|||
|
||||
switch (op) {
|
||||
case FUTEX_OP_SET:
|
||||
__futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);
|
||||
__futex_atomic_op("mov %0, %4", ret, oldval, tmp, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_ADD:
|
||||
__futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);
|
||||
__futex_atomic_op("add %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_OR:
|
||||
__futex_atomic_op("orr %0, %1, %3", ret, oldval, uaddr, oparg);
|
||||
__futex_atomic_op("orr %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_ANDN:
|
||||
__futex_atomic_op("and %0, %1, %3", ret, oldval, uaddr, ~oparg);
|
||||
__futex_atomic_op("and %0, %1, %4", ret, oldval, tmp, uaddr, ~oparg);
|
||||
break;
|
||||
case FUTEX_OP_XOR:
|
||||
__futex_atomic_op("eor %0, %1, %3", ret, oldval, uaddr, oparg);
|
||||
__futex_atomic_op("eor %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
|
||||
break;
|
||||
default:
|
||||
ret = -ENOSYS;
|
||||
|
|
|
@ -478,8 +478,8 @@
|
|||
/*
|
||||
* Unimplemented (or alternatively implemented) syscalls
|
||||
*/
|
||||
#define __IGNORE_fadvise64_64 1
|
||||
#define __IGNORE_migrate_pages 1
|
||||
#define __IGNORE_fadvise64_64
|
||||
#define __IGNORE_migrate_pages
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_ARM_UNISTD_H */
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
|
||||
#include <asm/smp_scu.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/cputype.h>
|
||||
|
||||
#define SCU_CTRL 0x00
|
||||
#define SCU_CONFIG 0x04
|
||||
|
@ -37,6 +38,15 @@ void __init scu_enable(void __iomem *scu_base)
|
|||
{
|
||||
u32 scu_ctrl;
|
||||
|
||||
#ifdef CONFIG_ARM_ERRATA_764369
|
||||
/* Cortex-A9 only */
|
||||
if ((read_cpuid(CPUID_ID) & 0xff0ffff0) == 0x410fc090) {
|
||||
scu_ctrl = __raw_readl(scu_base + 0x30);
|
||||
if (!(scu_ctrl & 1))
|
||||
__raw_writel(scu_ctrl | 0x1, scu_base + 0x30);
|
||||
}
|
||||
#endif
|
||||
|
||||
scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
|
||||
/* already enabled? */
|
||||
if (scu_ctrl & 1)
|
||||
|
|
|
@ -23,8 +23,10 @@
|
|||
|
||||
#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)
|
||||
#define ARM_EXIT_KEEP(x) x
|
||||
#define ARM_EXIT_DISCARD(x)
|
||||
#else
|
||||
#define ARM_EXIT_KEEP(x)
|
||||
#define ARM_EXIT_DISCARD(x) x
|
||||
#endif
|
||||
|
||||
OUTPUT_ARCH(arm)
|
||||
|
@ -39,6 +41,11 @@ jiffies = jiffies_64 + 4;
|
|||
SECTIONS
|
||||
{
|
||||
/*
|
||||
* XXX: The linker does not define how output sections are
|
||||
* assigned to input sections when there are multiple statements
|
||||
* matching the same input section name. There is no documented
|
||||
* order of matching.
|
||||
*
|
||||
* unwind exit sections must be discarded before the rest of the
|
||||
* unwind sections get included.
|
||||
*/
|
||||
|
@ -47,6 +54,9 @@ SECTIONS
|
|||
*(.ARM.extab.exit.text)
|
||||
ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text))
|
||||
ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text))
|
||||
ARM_EXIT_DISCARD(EXIT_TEXT)
|
||||
ARM_EXIT_DISCARD(EXIT_DATA)
|
||||
EXIT_CALL
|
||||
#ifndef CONFIG_HOTPLUG
|
||||
*(.ARM.exidx.devexit.text)
|
||||
*(.ARM.extab.devexit.text)
|
||||
|
@ -58,6 +68,8 @@ SECTIONS
|
|||
#ifndef CONFIG_SMP_ON_UP
|
||||
*(.alt.smp.init)
|
||||
#endif
|
||||
*(.discard)
|
||||
*(.discard.*)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_XIP_KERNEL
|
||||
|
@ -279,9 +291,6 @@ SECTIONS
|
|||
|
||||
STABS_DEBUG
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* Default discards */
|
||||
DISCARDS
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -158,7 +158,7 @@ void __init dove_spi0_init(void)
|
|||
|
||||
void __init dove_spi1_init(void)
|
||||
{
|
||||
orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
|
||||
orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
|
|
|
@ -899,8 +899,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
.reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 28, .size = 4 },
|
||||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_cam",
|
||||
.devname = "exynos4-fimc.0",
|
||||
.name = "sclk_cam0",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 16),
|
||||
},
|
||||
|
@ -909,8 +908,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
.reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 16, .size = 4 },
|
||||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_cam",
|
||||
.devname = "exynos4-fimc.1",
|
||||
.name = "sclk_cam1",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 20),
|
||||
},
|
||||
|
@ -1160,7 +1158,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
|
|||
|
||||
vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
|
||||
vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
|
||||
__raw_readl(S5P_VPLL_CON1), pll_4650);
|
||||
__raw_readl(S5P_VPLL_CON1), pll_4650c);
|
||||
|
||||
clk_fout_apll.ops = &exynos4_fout_apll_ops;
|
||||
clk_fout_mpll.rate = mpll;
|
||||
|
|
|
@ -132,12 +132,18 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
|
|||
return ((cycle_t)hi << 32) | lo;
|
||||
}
|
||||
|
||||
static void exynos4_frc_resume(struct clocksource *cs)
|
||||
{
|
||||
exynos4_mct_frc_start(0, 0);
|
||||
}
|
||||
|
||||
struct clocksource mct_frc = {
|
||||
.name = "mct-frc",
|
||||
.rating = 400,
|
||||
.read = exynos4_frc_read,
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
.resume = exynos4_frc_resume,
|
||||
};
|
||||
|
||||
static void __init exynos4_clocksource_init(void)
|
||||
|
@ -389,9 +395,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt)
|
|||
}
|
||||
|
||||
/* Setup the local clock events for a CPU */
|
||||
void __cpuinit local_timer_setup(struct clock_event_device *evt)
|
||||
int __cpuinit local_timer_setup(struct clock_event_device *evt)
|
||||
{
|
||||
exynos4_mct_tick_init(evt);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int local_timer_ack(void)
|
||||
|
|
|
@ -106,6 +106,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
|
|||
*/
|
||||
spin_lock(&boot_lock);
|
||||
spin_unlock(&boot_lock);
|
||||
|
||||
set_cpu_online(cpu, true);
|
||||
}
|
||||
|
||||
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||
|
|
|
@ -19,15 +19,16 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
|
|||
|
||||
if (rows > 8) {
|
||||
/* Set all the necessary GPX2 pins: KP_ROW[0~7] */
|
||||
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3));
|
||||
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
|
||||
S3C_GPIO_PULL_UP);
|
||||
|
||||
/* Set all the necessary GPX3 pins: KP_ROW[8~] */
|
||||
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8),
|
||||
S3C_GPIO_SFN(3));
|
||||
s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
|
||||
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
|
||||
} else {
|
||||
/* Set all the necessary GPX2 pins: KP_ROW[x] */
|
||||
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows,
|
||||
S3C_GPIO_SFN(3));
|
||||
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
|
||||
S3C_GPIO_PULL_UP);
|
||||
}
|
||||
|
||||
/* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/platform.h>
|
||||
|
@ -154,6 +155,7 @@ static struct map_desc ap_io_desc[] __initdata = {
|
|||
static void __init ap_map_io(void)
|
||||
{
|
||||
iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
|
||||
vga_base = PCI_MEMORY_VADDR;
|
||||
}
|
||||
|
||||
#define INTEGRATOR_SC_VALID_INT 0x003fffff
|
||||
|
|
|
@ -27,7 +27,6 @@
|
|||
#include <linux/spinlock.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/platform.h>
|
||||
|
@ -505,7 +504,6 @@ void __init pci_v3_preinit(void)
|
|||
|
||||
pcibios_min_io = 0x6000;
|
||||
pcibios_min_mem = 0x00100000;
|
||||
vga_base = PCI_MEMORY_VADDR;
|
||||
|
||||
/*
|
||||
* Hook in our fault handler for PCI errors
|
||||
|
|
|
@ -234,6 +234,7 @@ static void __init mx53_ard_board_init(void)
|
|||
imx53_add_imx_i2c(1, &mx53_ard_i2c2_data);
|
||||
imx53_add_imx_i2c(2, &mx53_ard_i2c3_data);
|
||||
imx_add_gpio_keys(&ard_button_data);
|
||||
imx53_add_ahci_imx();
|
||||
}
|
||||
|
||||
static void __init mx53_ard_timer_init(void)
|
||||
|
|
|
@ -293,6 +293,7 @@ static void __init mx53_loco_board_init(void)
|
|||
imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data);
|
||||
imx_add_gpio_keys(&loco_button_data);
|
||||
gpio_led_register_device(-1, &mx53loco_leds_data);
|
||||
imx53_add_ahci_imx();
|
||||
}
|
||||
|
||||
static void __init mx53_loco_timer_init(void)
|
||||
|
|
|
@ -35,6 +35,7 @@
|
|||
#include "devices-imx53.h"
|
||||
|
||||
#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6)
|
||||
#define MX53_SMD_SATA_PWR_EN IMX_GPIO_NR(3, 3)
|
||||
|
||||
static iomux_v3_cfg_t mx53_smd_pads[] = {
|
||||
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
|
||||
|
@ -111,6 +112,19 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = {
|
|||
.bitrate = 100000,
|
||||
};
|
||||
|
||||
static inline void mx53_smd_ahci_pwr_on(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Enable SATA PWR */
|
||||
ret = gpio_request_one(MX53_SMD_SATA_PWR_EN,
|
||||
GPIOF_DIR_OUT | GPIOF_INIT_HIGH, "ahci-sata-pwr");
|
||||
if (ret) {
|
||||
pr_err("failed to enable SATA_PWR_EN: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static void __init mx53_smd_board_init(void)
|
||||
{
|
||||
imx53_soc_init();
|
||||
|
@ -125,6 +139,8 @@ static void __init mx53_smd_board_init(void)
|
|||
imx53_add_sdhci_esdhc_imx(0, NULL);
|
||||
imx53_add_sdhci_esdhc_imx(1, NULL);
|
||||
imx53_add_sdhci_esdhc_imx(2, NULL);
|
||||
mx53_smd_ahci_pwr_on();
|
||||
imx53_add_ahci_imx();
|
||||
}
|
||||
|
||||
static void __init mx53_smd_timer_init(void)
|
||||
|
|
|
@ -1401,6 +1401,22 @@ static struct clk esdhc4_mx53_clk = {
|
|||
.secondary = &esdhc4_ipg_clk,
|
||||
};
|
||||
|
||||
static struct clk sata_clk = {
|
||||
.parent = &ipg_clk,
|
||||
.enable = _clk_max_enable,
|
||||
.enable_reg = MXC_CCM_CCGR4,
|
||||
.enable_shift = MXC_CCM_CCGRx_CG1_OFFSET,
|
||||
.disable = _clk_max_disable,
|
||||
};
|
||||
|
||||
static struct clk ahci_phy_clk = {
|
||||
.parent = &usb_phy1_clk,
|
||||
};
|
||||
|
||||
static struct clk ahci_dma_clk = {
|
||||
.parent = &ahb_clk,
|
||||
};
|
||||
|
||||
DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &pll2_sw_clk);
|
||||
DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &mipi_esc_clk, &pll2_sw_clk);
|
||||
DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &mipi_hsc2_clk, &pll2_sw_clk);
|
||||
|
@ -1513,6 +1529,9 @@ static struct clk_lookup mx53_lookups[] = {
|
|||
_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
|
||||
_REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
|
||||
_REGISTER_CLOCK("pata_imx", NULL, pata_clk)
|
||||
_REGISTER_CLOCK("imx53-ahci.0", "ahci", sata_clk)
|
||||
_REGISTER_CLOCK("imx53-ahci.0", "ahci_phy", ahci_phy_clk)
|
||||
_REGISTER_CLOCK("imx53-ahci.0", "ahci_dma", ahci_dma_clk)
|
||||
};
|
||||
|
||||
static void clk_tree_init(void)
|
||||
|
|
|
@ -44,3 +44,5 @@ extern const struct imx_imx_keypad_data imx53_imx_keypad_data;
|
|||
extern const struct imx_pata_imx_data imx53_pata_imx_data;
|
||||
#define imx53_add_pata_imx() \
|
||||
imx_add_pata_imx(&imx53_pata_imx_data)
|
||||
|
||||
extern struct platform_device *__init imx53_add_ahci_imx(void);
|
||||
|
|
|
@ -70,8 +70,25 @@ config MODULE_TX28
|
|||
select MXS_HAVE_PLATFORM_MXS_PWM
|
||||
select MXS_HAVE_PLATFORM_RTC_STMP3XXX
|
||||
|
||||
config MODULE_M28
|
||||
bool
|
||||
select SOC_IMX28
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MXS_HAVE_AMBA_DUART
|
||||
select MXS_HAVE_PLATFORM_AUART
|
||||
select MXS_HAVE_PLATFORM_FEC
|
||||
select MXS_HAVE_PLATFORM_FLEXCAN
|
||||
select MXS_HAVE_PLATFORM_MXS_I2C
|
||||
select MXS_HAVE_PLATFORM_MXS_MMC
|
||||
select MXS_HAVE_PLATFORM_MXSFB
|
||||
select MXS_OCOTP
|
||||
|
||||
config MACH_TX28
|
||||
bool "Ka-Ro TX28 module"
|
||||
select MODULE_TX28
|
||||
|
||||
config MACH_M28EVK
|
||||
bool "Support DENX M28EVK Platform"
|
||||
select MODULE_M28
|
||||
|
||||
endif
|
||||
|
|
|
@ -10,6 +10,7 @@ obj-$(CONFIG_SOC_IMX28) += clock-mx28.o
|
|||
obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o
|
||||
obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o
|
||||
obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o
|
||||
obj-$(CONFIG_MACH_M28EVK) += mach-m28evk.o
|
||||
obj-$(CONFIG_MODULE_TX28) += module-tx28.o
|
||||
obj-$(CONFIG_MACH_TX28) += mach-tx28.o
|
||||
|
||||
|
|
|
@ -740,11 +740,17 @@ static int clk_misc_init(void)
|
|||
__raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,
|
||||
CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);
|
||||
|
||||
/* Extra fec clock setting */
|
||||
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
|
||||
reg &= ~BM_CLKCTRL_ENET_SLEEP;
|
||||
reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
|
||||
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
|
||||
/*
|
||||
* Extra fec clock setting
|
||||
* The DENX M28 uses an external clock source
|
||||
* and the clock output must not be enabled
|
||||
*/
|
||||
if (!machine_is_m28evk()) {
|
||||
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
|
||||
reg &= ~BM_CLKCTRL_ENET_SLEEP;
|
||||
reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
|
||||
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
|
||||
}
|
||||
|
||||
/*
|
||||
* 480 MHz seems too high to be ssp clock source directly,
|
||||
|
|
|
@ -33,6 +33,7 @@
|
|||
0)
|
||||
#define cpu_is_mx28() ( \
|
||||
machine_is_mx28evk() || \
|
||||
machine_is_m28evk() || \
|
||||
machine_is_tx28() || \
|
||||
0)
|
||||
|
||||
|
|
|
@ -63,6 +63,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
|
|||
mxs_duart_base = MX23_DUART_BASE_ADDR;
|
||||
break;
|
||||
case MACH_TYPE_MX28EVK:
|
||||
case MACH_TYPE_M28EVK:
|
||||
case MACH_TYPE_TX28:
|
||||
mxs_duart_base = MX28_DUART_BASE_ADDR;
|
||||
break;
|
||||
|
|
|
@ -0,0 +1,366 @@
|
|||
/*
|
||||
* Copyright (C) 2011
|
||||
* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
|
||||
*
|
||||
* based on: mach-mx28_evk.c
|
||||
* Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/at24.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include <mach/iomux-mx28.h>
|
||||
|
||||
#include "devices-mx28.h"
|
||||
|
||||
#define M28EVK_GPIO_USERLED1 MXS_GPIO_NR(3, 16)
|
||||
#define M28EVK_GPIO_USERLED2 MXS_GPIO_NR(3, 17)
|
||||
|
||||
#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
|
||||
#define M28EVK_LCD_ENABLE MXS_GPIO_NR(3, 28)
|
||||
|
||||
#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
|
||||
#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
|
||||
|
||||
static const iomux_cfg_t m28evk_pads[] __initconst = {
|
||||
/* duart */
|
||||
MX28_PAD_AUART0_CTS__DUART_RX | MXS_PAD_CTRL,
|
||||
MX28_PAD_AUART0_RTS__DUART_TX | MXS_PAD_CTRL,
|
||||
|
||||
/* auart0 */
|
||||
MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
|
||||
MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
|
||||
|
||||
/* auart3 */
|
||||
MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
|
||||
MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
|
||||
MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
|
||||
MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
|
||||
|
||||
#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
|
||||
/* fec0 */
|
||||
MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
|
||||
/* fec1 */
|
||||
MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
|
||||
MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
|
||||
|
||||
/* flexcan0 */
|
||||
MX28_PAD_GPMI_RDY2__CAN0_TX,
|
||||
MX28_PAD_GPMI_RDY3__CAN0_RX,
|
||||
|
||||
/* flexcan1 */
|
||||
MX28_PAD_GPMI_CE2N__CAN1_TX,
|
||||
MX28_PAD_GPMI_CE3N__CAN1_RX,
|
||||
|
||||
/* I2C */
|
||||
MX28_PAD_I2C0_SCL__I2C0_SCL,
|
||||
MX28_PAD_I2C0_SDA__I2C0_SDA,
|
||||
|
||||
/* mxsfb (lcdif) */
|
||||
MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
|
||||
|
||||
MX28_PAD_LCD_ENABLE__LCD_ENABLE | MXS_PAD_CTRL,
|
||||
MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MXS_PAD_CTRL,
|
||||
|
||||
/* mmc0 */
|
||||
MX28_PAD_SSP0_DATA0__SSP0_D0 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA1__SSP0_D1 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA2__SSP0_D2 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA3__SSP0_D3 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA4__SSP0_D4 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA5__SSP0_D5 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA6__SSP0_D6 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DATA7__SSP0_D7 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_CMD__SSP0_CMD |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_SSP0_SCK__SSP0_SCK |
|
||||
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
|
||||
/* mmc1 */
|
||||
MX28_PAD_GPMI_D00__SSP1_D0 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D01__SSP1_D1 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D02__SSP1_D2 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D03__SSP1_D3 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D04__SSP1_D4 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D05__SSP1_D5 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D06__SSP1_D6 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_D07__SSP1_D7 |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_RDY1__SSP1_CMD |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
|
||||
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_WRN__SSP1_SCK |
|
||||
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
/* write protect */
|
||||
MX28_PAD_GPMI_RESETN__GPIO_0_28 |
|
||||
(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
/* slot power enable */
|
||||
MX28_PAD_PWM4__GPIO_3_29 |
|
||||
(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
|
||||
/* led */
|
||||
MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
|
||||
MX28_PAD_PWM1__GPIO_3_17 | MXS_PAD_CTRL,
|
||||
|
||||
/* nand */
|
||||
MX28_PAD_GPMI_D00__GPMI_D0 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D01__GPMI_D1 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D02__GPMI_D2 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D03__GPMI_D3 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D04__GPMI_D4 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D05__GPMI_D5 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D06__GPMI_D6 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_D07__GPMI_D7 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_CE0N__GPMI_CE0N |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_RDY0__GPMI_READY0 |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
|
||||
MX28_PAD_GPMI_RDN__GPMI_RDN |
|
||||
(MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_WRN__GPMI_WRN |
|
||||
(MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_ALE__GPMI_ALE |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_CLE__GPMI_CLE |
|
||||
(MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
|
||||
MX28_PAD_GPMI_RESETN__GPMI_RESETN |
|
||||
(MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
|
||||
|
||||
/* Backlight */
|
||||
MX28_PAD_PWM3__GPIO_3_28 | MXS_PAD_CTRL,
|
||||
};
|
||||
|
||||
/* led */
|
||||
static const struct gpio_led m28evk_leds[] __initconst = {
|
||||
{
|
||||
.name = "user-led1",
|
||||
.default_trigger = "heartbeat",
|
||||
.gpio = M28EVK_GPIO_USERLED1,
|
||||
},
|
||||
{
|
||||
.name = "user-led2",
|
||||
.default_trigger = "heartbeat",
|
||||
.gpio = M28EVK_GPIO_USERLED2,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct gpio_led_platform_data m28evk_led_data __initconst = {
|
||||
.leds = m28evk_leds,
|
||||
.num_leds = ARRAY_SIZE(m28evk_leds),
|
||||
};
|
||||
|
||||
static struct fec_platform_data mx28_fec_pdata[] __initdata = {
|
||||
{
|
||||
/* fec0 */
|
||||
.phy = PHY_INTERFACE_MODE_RMII,
|
||||
}, {
|
||||
/* fec1 */
|
||||
.phy = PHY_INTERFACE_MODE_RMII,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init m28evk_fec_get_mac(void)
|
||||
{
|
||||
int i;
|
||||
u32 val;
|
||||
const u32 *ocotp = mxs_get_ocotp();
|
||||
|
||||
if (!ocotp) {
|
||||
pr_err("%s: timeout when reading fec mac from OCOTP\n",
|
||||
__func__);
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
/*
|
||||
* OCOTP only stores the last 4 octets for each mac address,
|
||||
* so hard-code DENX OUI (C0:E5:4E) here.
|
||||
*/
|
||||
for (i = 0; i < 2; i++) {
|
||||
val = ocotp[i * 4];
|
||||
mx28_fec_pdata[i].mac[0] = 0xC0;
|
||||
mx28_fec_pdata[i].mac[1] = 0xE5;
|
||||
mx28_fec_pdata[i].mac[2] = 0x4E;
|
||||
mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
|
||||
mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
|
||||
mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* mxsfb (lcdif) */
|
||||
static struct fb_videomode m28evk_video_modes[] = {
|
||||
{
|
||||
.name = "Ampire AM-800480R2TMQW-T01H",
|
||||
.refresh = 60,
|
||||
.xres = 800,
|
||||
.yres = 480,
|
||||
.pixclock = 30066, /* picosecond (33.26 MHz) */
|
||||
.left_margin = 0,
|
||||
.right_margin = 256,
|
||||
.upper_margin = 0,
|
||||
.lower_margin = 45,
|
||||
.hsync_len = 1,
|
||||
.vsync_len = 1,
|
||||
.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct mxsfb_platform_data m28evk_mxsfb_pdata __initconst = {
|
||||
.mode_list = m28evk_video_modes,
|
||||
.mode_count = ARRAY_SIZE(m28evk_video_modes),
|
||||
.default_bpp = 16,
|
||||
.ld_intf_width = STMLCDIF_18BIT,
|
||||
};
|
||||
|
||||
static struct at24_platform_data m28evk_eeprom = {
|
||||
.byte_len = 16384,
|
||||
.page_size = 32,
|
||||
.flags = AT24_FLAG_ADDR16,
|
||||
};
|
||||
|
||||
static struct i2c_board_info m28_stk5v3_i2c_boardinfo[] __initdata = {
|
||||
{
|
||||
I2C_BOARD_INFO("at24", 0x51), /* E0=1, E1=0, E2=0 */
|
||||
.platform_data = &m28evk_eeprom,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mxs_mmc_platform_data m28evk_mmc_pdata[] __initdata = {
|
||||
{
|
||||
/* mmc0 */
|
||||
.wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
|
||||
.flags = SLOTF_8_BIT_CAPABLE,
|
||||
}, {
|
||||
/* mmc1 */
|
||||
.wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
|
||||
.flags = SLOTF_8_BIT_CAPABLE,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init m28evk_init(void)
|
||||
{
|
||||
mxs_iomux_setup_multiple_pads(m28evk_pads, ARRAY_SIZE(m28evk_pads));
|
||||
|
||||
mx28_add_duart();
|
||||
mx28_add_auart0();
|
||||
mx28_add_auart3();
|
||||
|
||||
if (!m28evk_fec_get_mac()) {
|
||||
mx28_add_fec(0, &mx28_fec_pdata[0]);
|
||||
mx28_add_fec(1, &mx28_fec_pdata[1]);
|
||||
}
|
||||
|
||||
mx28_add_flexcan(0, NULL);
|
||||
mx28_add_flexcan(1, NULL);
|
||||
|
||||
mx28_add_mxsfb(&m28evk_mxsfb_pdata);
|
||||
|
||||
mx28_add_mxs_mmc(0, &m28evk_mmc_pdata[0]);
|
||||
mx28_add_mxs_mmc(1, &m28evk_mmc_pdata[1]);
|
||||
|
||||
gpio_led_register_device(0, &m28evk_led_data);
|
||||
|
||||
/* I2C */
|
||||
mx28_add_mxs_i2c(0);
|
||||
i2c_register_board_info(0, m28_stk5v3_i2c_boardinfo,
|
||||
ARRAY_SIZE(m28_stk5v3_i2c_boardinfo));
|
||||
}
|
||||
|
||||
static void __init m28evk_timer_init(void)
|
||||
{
|
||||
mx28_clocks_init();
|
||||
}
|
||||
|
||||
static struct sys_timer m28evk_timer = {
|
||||
.init = m28evk_timer_init,
|
||||
};
|
||||
|
||||
MACHINE_START(M28EVK, "DENX M28 EVK")
|
||||
.map_io = mx28_map_io,
|
||||
.init_irq = mx28_init_irq,
|
||||
.init_machine = m28evk_init,
|
||||
.timer = &m28evk_timer,
|
||||
MACHINE_END
|
|
@ -128,7 +128,7 @@ static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
|
|||
unsigned long clkcon0;
|
||||
|
||||
clkcon0 = __raw_readl(S3C2443_CLKDIV0);
|
||||
clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
|
||||
clkcon0 &= ~S3C2443_CLKDIV0_ARMDIV_MASK;
|
||||
clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
|
||||
__raw_writel(clkcon0, S3C2443_CLKDIV0);
|
||||
}
|
||||
|
|
|
@ -262,45 +262,6 @@ static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
|
|||
.cols = 8,
|
||||
};
|
||||
|
||||
static int smdk6410_backlight_init(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = gpio_request(S3C64XX_GPF(15), "Backlight");
|
||||
if (ret) {
|
||||
printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */
|
||||
s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void smdk6410_backlight_exit(struct device *dev)
|
||||
{
|
||||
s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT);
|
||||
gpio_free(S3C64XX_GPF(15));
|
||||
}
|
||||
|
||||
static struct platform_pwm_backlight_data smdk6410_backlight_data = {
|
||||
.pwm_id = 1,
|
||||
.max_brightness = 255,
|
||||
.dft_brightness = 255,
|
||||
.pwm_period_ns = 78770,
|
||||
.init = smdk6410_backlight_init,
|
||||
.exit = smdk6410_backlight_exit,
|
||||
};
|
||||
|
||||
static struct platform_device smdk6410_backlight_device = {
|
||||
.name = "pwm-backlight",
|
||||
.dev = {
|
||||
.parent = &s3c_device_timer[1].dev,
|
||||
.platform_data = &smdk6410_backlight_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct map_desc smdk6410_iodesc[] = {};
|
||||
|
||||
static struct platform_device *smdk6410_devices[] __initdata = {
|
||||
|
|
|
@ -815,8 +815,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 },
|
||||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_cam",
|
||||
.devname = "s5pv210-fimc.0",
|
||||
.name = "sclk_cam0",
|
||||
.enable = s5pv210_clk_mask0_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
},
|
||||
|
@ -825,8 +824,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
.reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
|
||||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_cam",
|
||||
.devname = "s5pv210-fimc.1",
|
||||
.name = "sclk_cam1",
|
||||
.enable = s5pv210_clk_mask0_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
},
|
||||
|
|
|
@ -174,6 +174,10 @@ ENTRY(v7_coherent_user_range)
|
|||
dcache_line_size r2, r3
|
||||
sub r3, r2, #1
|
||||
bic r12, r0, r3
|
||||
#ifdef CONFIG_ARM_ERRATA_764369
|
||||
ALT_SMP(W(dsb))
|
||||
ALT_UP(W(nop))
|
||||
#endif
|
||||
1:
|
||||
USER( mcr p15, 0, r12, c7, c11, 1 ) @ clean D line to the point of unification
|
||||
add r12, r12, r2
|
||||
|
@ -223,6 +227,10 @@ ENTRY(v7_flush_kern_dcache_area)
|
|||
add r1, r0, r1
|
||||
sub r3, r2, #1
|
||||
bic r0, r0, r3
|
||||
#ifdef CONFIG_ARM_ERRATA_764369
|
||||
ALT_SMP(W(dsb))
|
||||
ALT_UP(W(nop))
|
||||
#endif
|
||||
1:
|
||||
mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line
|
||||
add r0, r0, r2
|
||||
|
@ -247,6 +255,10 @@ v7_dma_inv_range:
|
|||
sub r3, r2, #1
|
||||
tst r0, r3
|
||||
bic r0, r0, r3
|
||||
#ifdef CONFIG_ARM_ERRATA_764369
|
||||
ALT_SMP(W(dsb))
|
||||
ALT_UP(W(nop))
|
||||
#endif
|
||||
mcrne p15, 0, r0, c7, c14, 1 @ clean & invalidate D / U line
|
||||
|
||||
tst r1, r3
|
||||
|
@ -270,6 +282,10 @@ v7_dma_clean_range:
|
|||
dcache_line_size r2, r3
|
||||
sub r3, r2, #1
|
||||
bic r0, r0, r3
|
||||
#ifdef CONFIG_ARM_ERRATA_764369
|
||||
ALT_SMP(W(dsb))
|
||||
ALT_UP(W(nop))
|
||||
#endif
|
||||
1:
|
||||
mcr p15, 0, r0, c7, c10, 1 @ clean D / U line
|
||||
add r0, r0, r2
|
||||
|
@ -288,6 +304,10 @@ ENTRY(v7_dma_flush_range)
|
|||
dcache_line_size r2, r3
|
||||
sub r3, r2, #1
|
||||
bic r0, r0, r3
|
||||
#ifdef CONFIG_ARM_ERRATA_764369
|
||||
ALT_SMP(W(dsb))
|
||||
ALT_UP(W(nop))
|
||||
#endif
|
||||
1:
|
||||
mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D / U line
|
||||
add r0, r0, r2
|
||||
|
|
|
@ -324,6 +324,8 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
|
|||
|
||||
if (addr)
|
||||
*handle = pfn_to_dma(dev, page_to_pfn(page));
|
||||
else
|
||||
__dma_free_buffer(page, size);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
|
|
@ -79,3 +79,7 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
|||
|
||||
config IMX_HAVE_PLATFORM_SPI_IMX
|
||||
bool
|
||||
|
||||
config IMX_HAVE_PLATFORM_AHCI
|
||||
bool
|
||||
default y if ARCH_MX53
|
||||
|
|
|
@ -26,3 +26,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RTC) += platform-mxc_rtc.o
|
|||
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
|
||||
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
|
||||
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
|
||||
obj-$(CONFIG_IMX_HAVE_PLATFORM_AHCI) += platform-ahci-imx.o
|
||||
|
|
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#define imx_ahci_imx_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _SATA_BASE_ADDR, \
|
||||
.irq = soc ## _INT_SATA, \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_IMX53
|
||||
const struct imx_ahci_imx_data imx53_ahci_imx_data __initconst =
|
||||
imx_ahci_imx_data_entry_single(MX53, "imx53-ahci");
|
||||
#endif
|
||||
|
||||
enum {
|
||||
HOST_CAP = 0x00,
|
||||
HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
|
||||
HOST_PORTS_IMPL = 0x0c,
|
||||
HOST_TIMER1MS = 0xe0, /* Timer 1-ms */
|
||||
};
|
||||
|
||||
static struct clk *sata_clk, *sata_ref_clk;
|
||||
|
||||
/* AHCI module Initialization, if return 0, initialization is successful. */
|
||||
static int imx_sata_init(struct device *dev, void __iomem *addr)
|
||||
{
|
||||
u32 tmpdata;
|
||||
int ret = 0;
|
||||
struct clk *clk;
|
||||
|
||||
sata_clk = clk_get(dev, "ahci");
|
||||
if (IS_ERR(sata_clk)) {
|
||||
dev_err(dev, "no sata clock.\n");
|
||||
return PTR_ERR(sata_clk);
|
||||
}
|
||||
ret = clk_enable(sata_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "can't enable sata clock.\n");
|
||||
goto put_sata_clk;
|
||||
}
|
||||
|
||||
/* Get the AHCI SATA PHY CLK */
|
||||
sata_ref_clk = clk_get(dev, "ahci_phy");
|
||||
if (IS_ERR(sata_ref_clk)) {
|
||||
dev_err(dev, "no sata ref clock.\n");
|
||||
ret = PTR_ERR(sata_ref_clk);
|
||||
goto release_sata_clk;
|
||||
}
|
||||
ret = clk_enable(sata_ref_clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "can't enable sata ref clock.\n");
|
||||
goto put_sata_ref_clk;
|
||||
}
|
||||
|
||||
/* Get the AHB clock rate, and configure the TIMER1MS reg later */
|
||||
clk = clk_get(dev, "ahci_dma");
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(dev, "no dma clock.\n");
|
||||
ret = PTR_ERR(clk);
|
||||
goto release_sata_ref_clk;
|
||||
}
|
||||
tmpdata = clk_get_rate(clk) / 1000;
|
||||
clk_put(clk);
|
||||
|
||||
writel(tmpdata, addr + HOST_TIMER1MS);
|
||||
|
||||
tmpdata = readl(addr + HOST_CAP);
|
||||
if (!(tmpdata & HOST_CAP_SSS)) {
|
||||
tmpdata |= HOST_CAP_SSS;
|
||||
writel(tmpdata, addr + HOST_CAP);
|
||||
}
|
||||
|
||||
if (!(readl(addr + HOST_PORTS_IMPL) & 0x1))
|
||||
writel((readl(addr + HOST_PORTS_IMPL) | 0x1),
|
||||
addr + HOST_PORTS_IMPL);
|
||||
|
||||
return 0;
|
||||
|
||||
release_sata_ref_clk:
|
||||
clk_disable(sata_ref_clk);
|
||||
put_sata_ref_clk:
|
||||
clk_put(sata_ref_clk);
|
||||
release_sata_clk:
|
||||
clk_disable(sata_clk);
|
||||
put_sata_clk:
|
||||
clk_put(sata_clk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void imx_sata_exit(struct device *dev)
|
||||
{
|
||||
clk_disable(sata_ref_clk);
|
||||
clk_put(sata_ref_clk);
|
||||
|
||||
clk_disable(sata_clk);
|
||||
clk_put(sata_clk);
|
||||
|
||||
}
|
||||
struct platform_device *__init imx_add_ahci_imx(
|
||||
const struct imx_ahci_imx_data *data,
|
||||
const struct ahci_platform_data *pdata)
|
||||
{
|
||||
struct resource res[] = {
|
||||
{
|
||||
.start = data->iobase,
|
||||
.end = data->iobase + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = data->irq,
|
||||
.end = data->irq,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
return imx_add_platform_device_dmamask(data->devid, 0,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
||||
struct platform_device *__init imx53_add_ahci_imx(void)
|
||||
{
|
||||
struct ahci_platform_data pdata = {
|
||||
.init = imx_sata_init,
|
||||
.exit = imx_sata_exit,
|
||||
};
|
||||
|
||||
return imx_add_ahci_imx(&imx53_ahci_imx_data, &pdata);
|
||||
}
|
|
@ -309,3 +309,13 @@ struct platform_device *__init imx_add_spi_imx(
|
|||
struct platform_device *imx_add_imx_dma(void);
|
||||
struct platform_device *imx_add_imx_sdma(char *name,
|
||||
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
|
||||
|
||||
#include <linux/ahci_platform.h>
|
||||
struct imx_ahci_imx_data {
|
||||
const char *devid;
|
||||
resource_size_t iobase;
|
||||
resource_size_t irq;
|
||||
};
|
||||
struct platform_device *__init imx_add_ahci_imx(
|
||||
const struct imx_ahci_imx_data *data,
|
||||
const struct ahci_platform_data *pdata);
|
||||
|
|
|
@ -114,17 +114,18 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
|
|||
{
|
||||
static int used_gpioint_groups = 0;
|
||||
int group = chip->group;
|
||||
struct s5p_gpioint_bank *bank = NULL;
|
||||
struct s5p_gpioint_bank *b, *bank = NULL;
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
|
||||
if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
|
||||
return -ENOMEM;
|
||||
|
||||
list_for_each_entry(bank, &banks, list) {
|
||||
if (group >= bank->start &&
|
||||
group < bank->start + bank->nr_groups)
|
||||
list_for_each_entry(b, &banks, list) {
|
||||
if (group >= b->start && group < b->start + b->nr_groups) {
|
||||
bank = b;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (!bank)
|
||||
return -EINVAL;
|
||||
|
|
|
@ -64,6 +64,17 @@ static LIST_HEAD(clocks);
|
|||
*/
|
||||
DEFINE_SPINLOCK(clocks_lock);
|
||||
|
||||
/* Global watchdog clock used by arch_wtd_reset() callback */
|
||||
struct clk *s3c2410_wdtclk;
|
||||
static int __init s3c_wdt_reset_init(void)
|
||||
{
|
||||
s3c2410_wdtclk = clk_get(NULL, "watchdog");
|
||||
if (IS_ERR(s3c2410_wdtclk))
|
||||
printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(s3c_wdt_reset_init);
|
||||
|
||||
/* enable and disable calls for use with the clk struct */
|
||||
|
||||
static int clk_null_enable(struct clk *clk, int enable)
|
||||
|
|
|
@ -9,6 +9,9 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_PLAT_CLOCK_H
|
||||
#define __ASM_PLAT_CLOCK_H __FILE__
|
||||
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/clkdev.h>
|
||||
|
||||
|
@ -121,3 +124,8 @@ extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
|
|||
|
||||
extern void s3c_pwmclk_init(void);
|
||||
|
||||
/* Global watchdog clock used by arch_wtd_reset() callback */
|
||||
|
||||
extern struct clk *s3c2410_wdtclk;
|
||||
|
||||
#endif /* __ASM_PLAT_CLOCK_H */
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <plat/clock.h>
|
||||
#include <plat/regs-watchdog.h>
|
||||
#include <mach/map.h>
|
||||
|
||||
|
@ -19,17 +20,12 @@
|
|||
|
||||
static inline void arch_wdt_reset(void)
|
||||
{
|
||||
struct clk *wdtclk;
|
||||
|
||||
printk("arch_reset: attempting watchdog reset\n");
|
||||
|
||||
__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
|
||||
|
||||
wdtclk = clk_get(NULL, "watchdog");
|
||||
if (!IS_ERR(wdtclk)) {
|
||||
clk_enable(wdtclk);
|
||||
} else
|
||||
printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
|
||||
if (s3c2410_wdtclk)
|
||||
clk_enable(s3c2410_wdtclk);
|
||||
|
||||
/* put initial values into count and data */
|
||||
__raw_writel(0x80, S3C2410_WTCNT);
|
||||
|
|
|
@ -561,6 +561,20 @@ static struct pci_ops u4_pcie_pci_ops =
|
|||
.write = u4_pcie_write_config,
|
||||
};
|
||||
|
||||
static void __devinit pmac_pci_fixup_u4_of_node(struct pci_dev *dev)
|
||||
{
|
||||
/* Apple's device-tree "hides" the root complex virtual P2P bridge
|
||||
* on U4. However, Linux sees it, causing the PCI <-> OF matching
|
||||
* code to fail to properly match devices below it. This works around
|
||||
* it by setting the node of the bridge to point to the PHB node,
|
||||
* which is not entirely correct but fixes the matching code and
|
||||
* doesn't break anything else. It's also the simplest possible fix.
|
||||
*/
|
||||
if (dev->dev.of_node == NULL)
|
||||
dev->dev.of_node = pcibios_get_phb_of_node(dev->bus);
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, 0x5b, pmac_pci_fixup_u4_of_node);
|
||||
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
|
|
|
@ -188,7 +188,8 @@ extern char elf_platform[];
|
|||
#define SET_PERSONALITY(ex) \
|
||||
do { \
|
||||
if (personality(current->personality) != PER_LINUX32) \
|
||||
set_personality(PER_LINUX); \
|
||||
set_personality(PER_LINUX | \
|
||||
(current->personality & ~PER_MASK)); \
|
||||
if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
|
||||
set_thread_flag(TIF_31BIT); \
|
||||
else \
|
||||
|
|
|
@ -658,12 +658,14 @@ static inline void pgste_set_pte(pte_t *ptep, pgste_t pgste)
|
|||
* struct gmap_struct - guest address space
|
||||
* @mm: pointer to the parent mm_struct
|
||||
* @table: pointer to the page directory
|
||||
* @asce: address space control element for gmap page table
|
||||
* @crst_list: list of all crst tables used in the guest address space
|
||||
*/
|
||||
struct gmap {
|
||||
struct list_head list;
|
||||
struct mm_struct *mm;
|
||||
unsigned long *table;
|
||||
unsigned long asce;
|
||||
struct list_head crst_list;
|
||||
};
|
||||
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include <linux/sched.h>
|
||||
#include <asm/vdso.h>
|
||||
#include <asm/sigp.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
/*
|
||||
* Make sure that the compiler is new enough. We want a compiler that
|
||||
|
@ -126,6 +127,7 @@ int main(void)
|
|||
DEFINE(__LC_KERNEL_STACK, offsetof(struct _lowcore, kernel_stack));
|
||||
DEFINE(__LC_ASYNC_STACK, offsetof(struct _lowcore, async_stack));
|
||||
DEFINE(__LC_PANIC_STACK, offsetof(struct _lowcore, panic_stack));
|
||||
DEFINE(__LC_USER_ASCE, offsetof(struct _lowcore, user_asce));
|
||||
DEFINE(__LC_INT_CLOCK, offsetof(struct _lowcore, int_clock));
|
||||
DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock));
|
||||
DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags));
|
||||
|
@ -151,6 +153,7 @@ int main(void)
|
|||
DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data));
|
||||
DEFINE(__LC_GMAP, offsetof(struct _lowcore, gmap));
|
||||
DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp));
|
||||
DEFINE(__GMAP_ASCE, offsetof(struct gmap, asce));
|
||||
#endif /* CONFIG_32BIT */
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -1076,6 +1076,11 @@ sie_loop:
|
|||
lg %r14,__LC_THREAD_INFO # pointer thread_info struct
|
||||
tm __TI_flags+7(%r14),_TIF_EXIT_SIE
|
||||
jnz sie_exit
|
||||
lg %r14,__LC_GMAP # get gmap pointer
|
||||
ltgr %r14,%r14
|
||||
jz sie_gmap
|
||||
lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
|
||||
sie_gmap:
|
||||
lg %r14,__SF_EMPTY(%r15) # get control block pointer
|
||||
SPP __SF_EMPTY(%r15) # set guest id
|
||||
sie 0(%r14)
|
||||
|
@ -1083,6 +1088,7 @@ sie_done:
|
|||
SPP __LC_CMF_HPP # set host id
|
||||
lg %r14,__LC_THREAD_INFO # pointer thread_info struct
|
||||
sie_exit:
|
||||
lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
|
||||
ni __TI_flags+6(%r14),255-(_TIF_SIE>>8)
|
||||
lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
|
||||
stmg %r0,%r13,0(%r14) # save guest gprs 0-13
|
||||
|
|
|
@ -123,6 +123,7 @@ int kvm_dev_ioctl_check_extension(long ext)
|
|||
|
||||
switch (ext) {
|
||||
case KVM_CAP_S390_PSW:
|
||||
case KVM_CAP_S390_GMAP:
|
||||
r = 1;
|
||||
break;
|
||||
default:
|
||||
|
@ -263,10 +264,12 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|||
vcpu->arch.guest_fpregs.fpc &= FPC_VALID_MASK;
|
||||
restore_fp_regs(&vcpu->arch.guest_fpregs);
|
||||
restore_access_regs(vcpu->arch.guest_acrs);
|
||||
gmap_enable(vcpu->arch.gmap);
|
||||
}
|
||||
|
||||
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
gmap_disable(vcpu->arch.gmap);
|
||||
save_fp_regs(&vcpu->arch.guest_fpregs);
|
||||
save_access_regs(vcpu->arch.guest_acrs);
|
||||
restore_fp_regs(&vcpu->arch.host_fpregs);
|
||||
|
@ -461,7 +464,6 @@ static void __vcpu_run(struct kvm_vcpu *vcpu)
|
|||
local_irq_disable();
|
||||
kvm_guest_enter();
|
||||
local_irq_enable();
|
||||
gmap_enable(vcpu->arch.gmap);
|
||||
VCPU_EVENT(vcpu, 6, "entering sie flags %x",
|
||||
atomic_read(&vcpu->arch.sie_block->cpuflags));
|
||||
if (sie64a(vcpu->arch.sie_block, vcpu->arch.guest_gprs)) {
|
||||
|
@ -470,7 +472,6 @@ static void __vcpu_run(struct kvm_vcpu *vcpu)
|
|||
}
|
||||
VCPU_EVENT(vcpu, 6, "exit sie icptcode %d",
|
||||
vcpu->arch.sie_block->icptcode);
|
||||
gmap_disable(vcpu->arch.gmap);
|
||||
local_irq_disable();
|
||||
kvm_guest_exit();
|
||||
local_irq_enable();
|
||||
|
|
|
@ -160,6 +160,8 @@ struct gmap *gmap_alloc(struct mm_struct *mm)
|
|||
table = (unsigned long *) page_to_phys(page);
|
||||
crst_table_init(table, _REGION1_ENTRY_EMPTY);
|
||||
gmap->table = table;
|
||||
gmap->asce = _ASCE_TYPE_REGION1 | _ASCE_TABLE_LENGTH |
|
||||
_ASCE_USER_BITS | __pa(table);
|
||||
list_add(&gmap->list, &mm->context.gmap_list);
|
||||
return gmap;
|
||||
|
||||
|
@ -240,10 +242,6 @@ EXPORT_SYMBOL_GPL(gmap_free);
|
|||
*/
|
||||
void gmap_enable(struct gmap *gmap)
|
||||
{
|
||||
/* Load primary space page table origin. */
|
||||
S390_lowcore.user_asce = _ASCE_TYPE_REGION1 | _ASCE_TABLE_LENGTH |
|
||||
_ASCE_USER_BITS | __pa(gmap->table);
|
||||
asm volatile("lctlg 1,1,%0\n" : : "m" (S390_lowcore.user_asce) );
|
||||
S390_lowcore.gmap = (unsigned long) gmap;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gmap_enable);
|
||||
|
@ -254,10 +252,6 @@ EXPORT_SYMBOL_GPL(gmap_enable);
|
|||
*/
|
||||
void gmap_disable(struct gmap *gmap)
|
||||
{
|
||||
/* Load primary space page table origin. */
|
||||
S390_lowcore.user_asce =
|
||||
gmap->mm->context.asce_bits | __pa(gmap->mm->pgd);
|
||||
asm volatile("lctlg 1,1,%0\n" : : "m" (S390_lowcore.user_asce) );
|
||||
S390_lowcore.gmap = 0UL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gmap_disable);
|
||||
|
@ -309,15 +303,15 @@ int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len)
|
|||
/* Walk the guest addr space page table */
|
||||
table = gmap->table + (((to + off) >> 53) & 0x7ff);
|
||||
if (*table & _REGION_ENTRY_INV)
|
||||
return 0;
|
||||
goto out;
|
||||
table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
|
||||
table = table + (((to + off) >> 42) & 0x7ff);
|
||||
if (*table & _REGION_ENTRY_INV)
|
||||
return 0;
|
||||
goto out;
|
||||
table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
|
||||
table = table + (((to + off) >> 31) & 0x7ff);
|
||||
if (*table & _REGION_ENTRY_INV)
|
||||
return 0;
|
||||
goto out;
|
||||
table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
|
||||
table = table + (((to + off) >> 20) & 0x7ff);
|
||||
|
||||
|
@ -325,6 +319,7 @@ int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len)
|
|||
flush |= gmap_unlink_segment(gmap, table);
|
||||
*table = _SEGMENT_ENTRY_INV;
|
||||
}
|
||||
out:
|
||||
up_read(&gmap->mm->mmap_sem);
|
||||
if (flush)
|
||||
gmap_flush_tlb(gmap);
|
||||
|
|
|
@ -43,6 +43,8 @@
|
|||
#define SUN4V_CHIP_NIAGARA1 0x01
|
||||
#define SUN4V_CHIP_NIAGARA2 0x02
|
||||
#define SUN4V_CHIP_NIAGARA3 0x03
|
||||
#define SUN4V_CHIP_NIAGARA4 0x04
|
||||
#define SUN4V_CHIP_NIAGARA5 0x05
|
||||
#define SUN4V_CHIP_UNKNOWN 0xff
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
@ -66,6 +66,8 @@ static struct xor_block_template xor_block_niagara = {
|
|||
((tlb_type == hypervisor && \
|
||||
(sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA2 || \
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)) ? \
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || \
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || \
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA5)) ? \
|
||||
&xor_block_niagara : \
|
||||
&xor_block_VIS)
|
||||
|
|
|
@ -481,6 +481,18 @@ static void __init sun4v_cpu_probe(void)
|
|||
sparc_pmu_type = "niagara3";
|
||||
break;
|
||||
|
||||
case SUN4V_CHIP_NIAGARA4:
|
||||
sparc_cpu_type = "UltraSparc T4 (Niagara4)";
|
||||
sparc_fpu_type = "UltraSparc T4 integrated FPU";
|
||||
sparc_pmu_type = "niagara4";
|
||||
break;
|
||||
|
||||
case SUN4V_CHIP_NIAGARA5:
|
||||
sparc_cpu_type = "UltraSparc T5 (Niagara5)";
|
||||
sparc_fpu_type = "UltraSparc T5 integrated FPU";
|
||||
sparc_pmu_type = "niagara5";
|
||||
break;
|
||||
|
||||
default:
|
||||
printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n",
|
||||
prom_cpu_compatible);
|
||||
|
|
|
@ -325,6 +325,8 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index)
|
|||
case SUN4V_CHIP_NIAGARA1:
|
||||
case SUN4V_CHIP_NIAGARA2:
|
||||
case SUN4V_CHIP_NIAGARA3:
|
||||
case SUN4V_CHIP_NIAGARA4:
|
||||
case SUN4V_CHIP_NIAGARA5:
|
||||
rover_inc_table = niagara_iterate_method;
|
||||
break;
|
||||
default:
|
||||
|
|
|
@ -133,7 +133,7 @@ prom_sun4v_name:
|
|||
prom_niagara_prefix:
|
||||
.asciz "SUNW,UltraSPARC-T"
|
||||
prom_sparc_prefix:
|
||||
.asciz "SPARC-T"
|
||||
.asciz "SPARC-"
|
||||
.align 4
|
||||
prom_root_compatible:
|
||||
.skip 64
|
||||
|
@ -396,7 +396,7 @@ sun4v_chip_type:
|
|||
or %g1, %lo(prom_cpu_compatible), %g1
|
||||
sethi %hi(prom_sparc_prefix), %g7
|
||||
or %g7, %lo(prom_sparc_prefix), %g7
|
||||
mov 7, %g3
|
||||
mov 6, %g3
|
||||
90: ldub [%g7], %g2
|
||||
ldub [%g1], %g4
|
||||
cmp %g2, %g4
|
||||
|
@ -408,10 +408,23 @@ sun4v_chip_type:
|
|||
|
||||
sethi %hi(prom_cpu_compatible), %g1
|
||||
or %g1, %lo(prom_cpu_compatible), %g1
|
||||
ldub [%g1 + 7], %g2
|
||||
ldub [%g1 + 6], %g2
|
||||
cmp %g2, 'T'
|
||||
be,pt %xcc, 70f
|
||||
cmp %g2, 'M'
|
||||
bne,pn %xcc, 4f
|
||||
nop
|
||||
|
||||
70: ldub [%g1 + 7], %g2
|
||||
cmp %g2, '3'
|
||||
be,pt %xcc, 5f
|
||||
mov SUN4V_CHIP_NIAGARA3, %g4
|
||||
cmp %g2, '4'
|
||||
be,pt %xcc, 5f
|
||||
mov SUN4V_CHIP_NIAGARA4, %g4
|
||||
cmp %g2, '5'
|
||||
be,pt %xcc, 5f
|
||||
mov SUN4V_CHIP_NIAGARA5, %g4
|
||||
ba,pt %xcc, 4f
|
||||
nop
|
||||
|
||||
|
@ -543,6 +556,12 @@ niagara_tlb_fixup:
|
|||
be,pt %xcc, niagara2_patch
|
||||
nop
|
||||
cmp %g1, SUN4V_CHIP_NIAGARA3
|
||||
be,pt %xcc, niagara2_patch
|
||||
nop
|
||||
cmp %g1, SUN4V_CHIP_NIAGARA4
|
||||
be,pt %xcc, niagara2_patch
|
||||
nop
|
||||
cmp %g1, SUN4V_CHIP_NIAGARA5
|
||||
be,pt %xcc, niagara2_patch
|
||||
nop
|
||||
|
||||
|
|
|
@ -380,8 +380,7 @@ void flush_thread(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
/* Now, this task is no longer a kernel thread. */
|
||||
current->thread.current_ds = USER_DS;
|
||||
/* This task is no longer a kernel thread. */
|
||||
if (current->thread.flags & SPARC_FLAG_KTHREAD) {
|
||||
current->thread.flags &= ~SPARC_FLAG_KTHREAD;
|
||||
|
||||
|
|
|
@ -368,9 +368,6 @@ void flush_thread(void)
|
|||
|
||||
/* Clear FPU register state. */
|
||||
t->fpsaved[0] = 0;
|
||||
|
||||
if (get_thread_current_ds() != ASI_AIUS)
|
||||
set_fs(USER_DS);
|
||||
}
|
||||
|
||||
/* It's a bit more tricky when 64-bit tasks are involved... */
|
||||
|
|
|
@ -137,7 +137,7 @@ static void __init process_switch(char c)
|
|||
prom_halt();
|
||||
break;
|
||||
case 'p':
|
||||
/* Just ignore, this behavior is now the default. */
|
||||
prom_early_console.flags &= ~CON_BOOT;
|
||||
break;
|
||||
default:
|
||||
printk("Unknown boot switch (-%c)\n", c);
|
||||
|
|
|
@ -106,7 +106,7 @@ static void __init process_switch(char c)
|
|||
prom_halt();
|
||||
break;
|
||||
case 'p':
|
||||
/* Just ignore, this behavior is now the default. */
|
||||
prom_early_console.flags &= ~CON_BOOT;
|
||||
break;
|
||||
case 'P':
|
||||
/* Force UltraSPARC-III P-Cache on. */
|
||||
|
@ -425,10 +425,14 @@ static void __init init_sparc64_elf_hwcap(void)
|
|||
else if (tlb_type == hypervisor) {
|
||||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA5)
|
||||
cap |= HWCAP_SPARC_BLKINIT;
|
||||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA5)
|
||||
cap |= HWCAP_SPARC_N2;
|
||||
}
|
||||
|
||||
|
@ -452,11 +456,15 @@ static void __init init_sparc64_elf_hwcap(void)
|
|||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1)
|
||||
cap |= AV_SPARC_ASI_BLK_INIT;
|
||||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA5)
|
||||
cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
|
||||
AV_SPARC_ASI_BLK_INIT |
|
||||
AV_SPARC_POPC);
|
||||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
|
||||
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||
|
||||
sun4v_chip_type == SUN4V_CHIP_NIAGARA5)
|
||||
cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
|
||||
AV_SPARC_FMAF);
|
||||
}
|
||||
|
|
|
@ -511,6 +511,11 @@ static void __init read_obp_translations(void)
|
|||
for (i = 0; i < prom_trans_ents; i++)
|
||||
prom_trans[i].data &= ~0x0003fe0000000000UL;
|
||||
}
|
||||
|
||||
/* Force execute bit on. */
|
||||
for (i = 0; i < prom_trans_ents; i++)
|
||||
prom_trans[i].data |= (tlb_type == hypervisor ?
|
||||
_PAGE_EXEC_4V : _PAGE_EXEC_4U);
|
||||
}
|
||||
|
||||
static void __init hypervisor_tlb_lock(unsigned long vaddr,
|
||||
|
|
|
@ -10,6 +10,10 @@ config CMPXCHG_LOCAL
|
|||
bool
|
||||
default n
|
||||
|
||||
config CMPXCHG_DOUBLE
|
||||
bool
|
||||
default n
|
||||
|
||||
source "arch/x86/Kconfig.cpu"
|
||||
|
||||
endmenu
|
||||
|
|
|
@ -41,7 +41,7 @@ KBUILD_CPPFLAGS += -I$(srctree)/$(ARCH_DIR)/sys-$(SUBARCH)
|
|||
KBUILD_CFLAGS += $(CFLAGS) $(CFLAGS-y) -D__arch_um__ -DSUBARCH=\"$(SUBARCH)\" \
|
||||
$(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap \
|
||||
-Din6addr_loopback=kernel_in6addr_loopback \
|
||||
-Din6addr_any=kernel_in6addr_any
|
||||
-Din6addr_any=kernel_in6addr_any -Dstrrchr=kernel_strrchr
|
||||
|
||||
KBUILD_AFLAGS += $(ARCH_INCLUDE)
|
||||
|
||||
|
|
|
@ -399,8 +399,8 @@ int line_setup_irq(int fd, int input, int output, struct line *line, void *data)
|
|||
* is done under a spinlock. Checking whether the device is in use is
|
||||
* line->tty->count > 1, also under the spinlock.
|
||||
*
|
||||
* tty->count serves to decide whether the device should be enabled or
|
||||
* disabled on the host. If it's equal to 1, then we are doing the
|
||||
* line->count serves to decide whether the device should be enabled or
|
||||
* disabled on the host. If it's equal to 0, then we are doing the
|
||||
* first open or last close. Otherwise, open and close just return.
|
||||
*/
|
||||
|
||||
|
@ -414,16 +414,16 @@ int line_open(struct line *lines, struct tty_struct *tty)
|
|||
goto out_unlock;
|
||||
|
||||
err = 0;
|
||||
if (tty->count > 1)
|
||||
if (line->count++)
|
||||
goto out_unlock;
|
||||
|
||||
spin_unlock(&line->count_lock);
|
||||
|
||||
BUG_ON(tty->driver_data);
|
||||
tty->driver_data = line;
|
||||
line->tty = tty;
|
||||
|
||||
spin_unlock(&line->count_lock);
|
||||
err = enable_chan(line);
|
||||
if (err)
|
||||
if (err) /* line_close() will be called by our caller */
|
||||
return err;
|
||||
|
||||
INIT_DELAYED_WORK(&line->task, line_timer_cb);
|
||||
|
@ -436,7 +436,7 @@ int line_open(struct line *lines, struct tty_struct *tty)
|
|||
chan_window_size(&line->chan_list, &tty->winsize.ws_row,
|
||||
&tty->winsize.ws_col);
|
||||
|
||||
return err;
|
||||
return 0;
|
||||
|
||||
out_unlock:
|
||||
spin_unlock(&line->count_lock);
|
||||
|
@ -460,17 +460,16 @@ void line_close(struct tty_struct *tty, struct file * filp)
|
|||
flush_buffer(line);
|
||||
|
||||
spin_lock(&line->count_lock);
|
||||
if (!line->valid)
|
||||
goto out_unlock;
|
||||
BUG_ON(!line->valid);
|
||||
|
||||
if (tty->count > 1)
|
||||
if (--line->count)
|
||||
goto out_unlock;
|
||||
|
||||
spin_unlock(&line->count_lock);
|
||||
|
||||
line->tty = NULL;
|
||||
tty->driver_data = NULL;
|
||||
|
||||
spin_unlock(&line->count_lock);
|
||||
|
||||
if (line->sigio) {
|
||||
unregister_winch(tty);
|
||||
line->sigio = 0;
|
||||
|
@ -498,7 +497,7 @@ static int setup_one_line(struct line *lines, int n, char *init, int init_prio,
|
|||
|
||||
spin_lock(&line->count_lock);
|
||||
|
||||
if (line->tty != NULL) {
|
||||
if (line->count) {
|
||||
*error_out = "Device is already open";
|
||||
goto out;
|
||||
}
|
||||
|
@ -722,41 +721,53 @@ struct winch {
|
|||
int pid;
|
||||
struct tty_struct *tty;
|
||||
unsigned long stack;
|
||||
struct work_struct work;
|
||||
};
|
||||
|
||||
static void free_winch(struct winch *winch, int free_irq_ok)
|
||||
static void __free_winch(struct work_struct *work)
|
||||
{
|
||||
if (free_irq_ok)
|
||||
free_irq(WINCH_IRQ, winch);
|
||||
|
||||
list_del(&winch->list);
|
||||
struct winch *winch = container_of(work, struct winch, work);
|
||||
free_irq(WINCH_IRQ, winch);
|
||||
|
||||
if (winch->pid != -1)
|
||||
os_kill_process(winch->pid, 1);
|
||||
if (winch->fd != -1)
|
||||
os_close_file(winch->fd);
|
||||
if (winch->stack != 0)
|
||||
free_stack(winch->stack, 0);
|
||||
kfree(winch);
|
||||
}
|
||||
|
||||
static void free_winch(struct winch *winch)
|
||||
{
|
||||
int fd = winch->fd;
|
||||
winch->fd = -1;
|
||||
if (fd != -1)
|
||||
os_close_file(fd);
|
||||
list_del(&winch->list);
|
||||
__free_winch(&winch->work);
|
||||
}
|
||||
|
||||
static irqreturn_t winch_interrupt(int irq, void *data)
|
||||
{
|
||||
struct winch *winch = data;
|
||||
struct tty_struct *tty;
|
||||
struct line *line;
|
||||
int fd = winch->fd;
|
||||
int err;
|
||||
char c;
|
||||
|
||||
if (winch->fd != -1) {
|
||||
err = generic_read(winch->fd, &c, NULL);
|
||||
if (fd != -1) {
|
||||
err = generic_read(fd, &c, NULL);
|
||||
if (err < 0) {
|
||||
if (err != -EAGAIN) {
|
||||
winch->fd = -1;
|
||||
list_del(&winch->list);
|
||||
os_close_file(fd);
|
||||
printk(KERN_ERR "winch_interrupt : "
|
||||
"read failed, errno = %d\n", -err);
|
||||
printk(KERN_ERR "fd %d is losing SIGWINCH "
|
||||
"support\n", winch->tty_fd);
|
||||
free_winch(winch, 0);
|
||||
INIT_WORK(&winch->work, __free_winch);
|
||||
schedule_work(&winch->work);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
goto out;
|
||||
|
@ -828,7 +839,7 @@ static void unregister_winch(struct tty_struct *tty)
|
|||
list_for_each_safe(ele, next, &winch_handlers) {
|
||||
winch = list_entry(ele, struct winch, list);
|
||||
if (winch->tty == tty) {
|
||||
free_winch(winch, 1);
|
||||
free_winch(winch);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -844,7 +855,7 @@ static void winch_cleanup(void)
|
|||
|
||||
list_for_each_safe(ele, next, &winch_handlers) {
|
||||
winch = list_entry(ele, struct winch, list);
|
||||
free_winch(winch, 1);
|
||||
free_winch(winch);
|
||||
}
|
||||
|
||||
spin_unlock(&winch_handler_lock);
|
||||
|
|
|
@ -123,6 +123,7 @@ static int xterm_open(int input, int output, int primary, void *d,
|
|||
err = -errno;
|
||||
printk(UM_KERN_ERR "xterm_open : unlink failed, errno = %d\n",
|
||||
errno);
|
||||
close(fd);
|
||||
return err;
|
||||
}
|
||||
close(fd);
|
||||
|
|
|
@ -42,10 +42,6 @@ extern long subarch_ptrace(struct task_struct *child, long request,
|
|||
unsigned long addr, unsigned long data);
|
||||
extern unsigned long getreg(struct task_struct *child, int regno);
|
||||
extern int putreg(struct task_struct *child, int regno, unsigned long value);
|
||||
extern int get_fpregs(struct user_i387_struct __user *buf,
|
||||
struct task_struct *child);
|
||||
extern int set_fpregs(struct user_i387_struct __user *buf,
|
||||
struct task_struct *child);
|
||||
|
||||
extern int arch_copy_tls(struct task_struct *new);
|
||||
extern void clear_flushed_tls(struct task_struct *task);
|
||||
|
|
|
@ -33,6 +33,7 @@ struct line_driver {
|
|||
struct line {
|
||||
struct tty_struct *tty;
|
||||
spinlock_t count_lock;
|
||||
unsigned long count;
|
||||
int valid;
|
||||
|
||||
char *init_str;
|
||||
|
|
|
@ -16,7 +16,7 @@ extern int restore_fpx_registers(int pid, unsigned long *fp_regs);
|
|||
extern int save_registers(int pid, struct uml_pt_regs *regs);
|
||||
extern int restore_registers(int pid, struct uml_pt_regs *regs);
|
||||
extern int init_registers(int pid);
|
||||
extern void get_safe_registers(unsigned long *regs);
|
||||
extern void get_safe_registers(unsigned long *regs, unsigned long *fp_regs);
|
||||
extern unsigned long get_thread_reg(int reg, jmp_buf *buf);
|
||||
extern int get_fp_registers(int pid, unsigned long *regs);
|
||||
extern int put_fp_registers(int pid, unsigned long *regs);
|
||||
|
|
|
@ -202,7 +202,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
|
|||
arch_copy_thread(¤t->thread.arch, &p->thread.arch);
|
||||
}
|
||||
else {
|
||||
get_safe_registers(p->thread.regs.regs.gp);
|
||||
get_safe_registers(p->thread.regs.regs.gp, p->thread.regs.regs.fp);
|
||||
p->thread.request.u.thread = current->thread.request.u.thread;
|
||||
handler = new_thread_handler;
|
||||
}
|
||||
|
|
|
@ -50,23 +50,11 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
void __user *vp = p;
|
||||
|
||||
switch (request) {
|
||||
/* read word at location addr. */
|
||||
case PTRACE_PEEKTEXT:
|
||||
case PTRACE_PEEKDATA:
|
||||
ret = generic_ptrace_peekdata(child, addr, data);
|
||||
break;
|
||||
|
||||
/* read the word at location addr in the USER area. */
|
||||
case PTRACE_PEEKUSR:
|
||||
ret = peek_user(child, addr, data);
|
||||
break;
|
||||
|
||||
/* write the word at location addr. */
|
||||
case PTRACE_POKETEXT:
|
||||
case PTRACE_POKEDATA:
|
||||
ret = generic_ptrace_pokedata(child, addr, data);
|
||||
break;
|
||||
|
||||
/* write the word at location addr in the USER area */
|
||||
case PTRACE_POKEUSR:
|
||||
ret = poke_user(child, addr, data);
|
||||
|
@ -106,16 +94,6 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
ret = 0;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
#ifdef PTRACE_GETFPREGS
|
||||
case PTRACE_GETFPREGS: /* Get the child FPU state. */
|
||||
ret = get_fpregs(vp, child);
|
||||
break;
|
||||
#endif
|
||||
#ifdef PTRACE_SETFPREGS
|
||||
case PTRACE_SETFPREGS: /* Set the child FPU state. */
|
||||
ret = set_fpregs(vp, child);
|
||||
break;
|
||||
#endif
|
||||
case PTRACE_GET_THREAD_AREA:
|
||||
ret = ptrace_get_thread_area(child, addr, vp);
|
||||
|
@ -153,12 +131,6 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
ret = -EIO;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
#ifdef PTRACE_ARCH_PRCTL
|
||||
case PTRACE_ARCH_PRCTL:
|
||||
/* XXX Calls ptrace on the host - needs some SMP thinking */
|
||||
ret = arch_prctl(child, data, (void __user *) addr);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
ret = ptrace_request(child, request, addr, data);
|
||||
|
|
|
@ -8,6 +8,8 @@
|
|||
#include <string.h>
|
||||
#include <sys/ptrace.h>
|
||||
#include "sysdep/ptrace.h"
|
||||
#include "sysdep/ptrace_user.h"
|
||||
#include "registers.h"
|
||||
|
||||
int save_registers(int pid, struct uml_pt_regs *regs)
|
||||
{
|
||||
|
@ -32,6 +34,7 @@ int restore_registers(int pid, struct uml_pt_regs *regs)
|
|||
/* This is set once at boot time and not changed thereafter */
|
||||
|
||||
static unsigned long exec_regs[MAX_REG_NR];
|
||||
static unsigned long exec_fp_regs[FP_SIZE];
|
||||
|
||||
int init_registers(int pid)
|
||||
{
|
||||
|
@ -42,10 +45,14 @@ int init_registers(int pid)
|
|||
return -errno;
|
||||
|
||||
arch_init_registers(pid);
|
||||
get_fp_registers(pid, exec_fp_regs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void get_safe_registers(unsigned long *regs)
|
||||
void get_safe_registers(unsigned long *regs, unsigned long *fp_regs)
|
||||
{
|
||||
memcpy(regs, exec_regs, sizeof(exec_regs));
|
||||
|
||||
if (fp_regs)
|
||||
memcpy(fp_regs, exec_fp_regs, sizeof(exec_fp_regs));
|
||||
}
|
||||
|
|
|
@ -39,7 +39,7 @@ static unsigned long syscall_regs[MAX_REG_NR];
|
|||
|
||||
static int __init init_syscall_regs(void)
|
||||
{
|
||||
get_safe_registers(syscall_regs);
|
||||
get_safe_registers(syscall_regs, NULL);
|
||||
syscall_regs[REGS_IP_INDEX] = STUB_CODE +
|
||||
((unsigned long) &batch_syscall_stub -
|
||||
(unsigned long) &__syscall_stub_start);
|
||||
|
|
|
@ -373,6 +373,9 @@ void userspace(struct uml_pt_regs *regs)
|
|||
if (ptrace(PTRACE_SETREGS, pid, 0, regs->gp))
|
||||
fatal_sigsegv();
|
||||
|
||||
if (put_fp_registers(pid, regs->fp))
|
||||
fatal_sigsegv();
|
||||
|
||||
/* Now we set local_using_sysemu to be used for one loop */
|
||||
local_using_sysemu = get_using_sysemu();
|
||||
|
||||
|
@ -399,6 +402,12 @@ void userspace(struct uml_pt_regs *regs)
|
|||
fatal_sigsegv();
|
||||
}
|
||||
|
||||
if (get_fp_registers(pid, regs->fp)) {
|
||||
printk(UM_KERN_ERR "userspace - get_fp_registers failed, "
|
||||
"errno = %d\n", errno);
|
||||
fatal_sigsegv();
|
||||
}
|
||||
|
||||
UPT_SYSCALL_NR(regs) = -1; /* Assume: It's not a syscall */
|
||||
|
||||
if (WIFSTOPPED(status)) {
|
||||
|
@ -457,10 +466,11 @@ void userspace(struct uml_pt_regs *regs)
|
|||
}
|
||||
|
||||
static unsigned long thread_regs[MAX_REG_NR];
|
||||
static unsigned long thread_fp_regs[FP_SIZE];
|
||||
|
||||
static int __init init_thread_regs(void)
|
||||
{
|
||||
get_safe_registers(thread_regs);
|
||||
get_safe_registers(thread_regs, thread_fp_regs);
|
||||
/* Set parent's instruction pointer to start of clone-stub */
|
||||
thread_regs[REGS_IP_INDEX] = STUB_CODE +
|
||||
(unsigned long) stub_clone_handler -
|
||||
|
@ -503,6 +513,13 @@ int copy_context_skas0(unsigned long new_stack, int pid)
|
|||
return err;
|
||||
}
|
||||
|
||||
err = put_fp_registers(pid, thread_fp_regs);
|
||||
if (err < 0) {
|
||||
printk(UM_KERN_ERR "copy_context_skas0 : put_fp_registers "
|
||||
"failed, pid = %d, err = %d\n", pid, err);
|
||||
return err;
|
||||
}
|
||||
|
||||
/* set a well known return code for detection of child write failure */
|
||||
child_data->err = 12345678;
|
||||
|
||||
|
|
|
@ -42,11 +42,6 @@
|
|||
*/
|
||||
struct user_desc;
|
||||
|
||||
extern int get_fpxregs(struct user_fxsr_struct __user *buf,
|
||||
struct task_struct *child);
|
||||
extern int set_fpxregs(struct user_fxsr_struct __user *buf,
|
||||
struct task_struct *tsk);
|
||||
|
||||
extern int ptrace_get_thread_area(struct task_struct *child, int idx,
|
||||
struct user_desc __user *user_desc);
|
||||
|
||||
|
|
|
@ -145,7 +145,7 @@ int peek_user(struct task_struct *child, long addr, long data)
|
|||
return put_user(tmp, (unsigned long __user *) data);
|
||||
}
|
||||
|
||||
int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
static int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
{
|
||||
int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
|
||||
struct user_i387_struct fpregs;
|
||||
|
@ -161,7 +161,7 @@ int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
|||
return n;
|
||||
}
|
||||
|
||||
int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
static int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
{
|
||||
int n, cpu = ((struct thread_info *) child->stack)->cpu;
|
||||
struct user_i387_struct fpregs;
|
||||
|
@ -174,7 +174,7 @@ int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
|||
(unsigned long *) &fpregs);
|
||||
}
|
||||
|
||||
int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
|
||||
static int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
|
||||
{
|
||||
int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
|
||||
struct user_fxsr_struct fpregs;
|
||||
|
@ -190,7 +190,7 @@ int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
|
|||
return n;
|
||||
}
|
||||
|
||||
int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
|
||||
static int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
|
||||
{
|
||||
int n, cpu = ((struct thread_info *) child->stack)->cpu;
|
||||
struct user_fxsr_struct fpregs;
|
||||
|
@ -206,5 +206,23 @@ int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
|
|||
long subarch_ptrace(struct task_struct *child, long request,
|
||||
unsigned long addr, unsigned long data)
|
||||
{
|
||||
return -EIO;
|
||||
int ret = -EIO;
|
||||
void __user *datap = (void __user *) data;
|
||||
switch (request) {
|
||||
case PTRACE_GETFPREGS: /* Get the child FPU state. */
|
||||
ret = get_fpregs(datap, child);
|
||||
break;
|
||||
case PTRACE_SETFPREGS: /* Set the child FPU state. */
|
||||
ret = set_fpregs(datap, child);
|
||||
break;
|
||||
case PTRACE_GETFPXREGS: /* Get the child FPU state. */
|
||||
ret = get_fpxregs(datap, child);
|
||||
break;
|
||||
case PTRACE_SETFPXREGS: /* Set the child FPU state. */
|
||||
ret = set_fpxregs(datap, child);
|
||||
break;
|
||||
default:
|
||||
ret = -EIO;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -53,6 +53,7 @@ extern int sysemu_supported;
|
|||
|
||||
struct uml_pt_regs {
|
||||
unsigned long gp[MAX_REG_NR];
|
||||
unsigned long fp[HOST_FPX_SIZE];
|
||||
struct faultinfo faultinfo;
|
||||
long syscall;
|
||||
int is_user;
|
||||
|
|
|
@ -145,7 +145,7 @@ int is_syscall(unsigned long addr)
|
|||
return instr == 0x050f;
|
||||
}
|
||||
|
||||
int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
static int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
{
|
||||
int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
|
||||
long fpregs[HOST_FP_SIZE];
|
||||
|
@ -162,7 +162,7 @@ int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
|||
return n;
|
||||
}
|
||||
|
||||
int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
static int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
|
||||
{
|
||||
int n, cpu = ((struct thread_info *) child->stack)->cpu;
|
||||
long fpregs[HOST_FP_SIZE];
|
||||
|
@ -182,12 +182,16 @@ long subarch_ptrace(struct task_struct *child, long request,
|
|||
void __user *datap = (void __user *) data;
|
||||
|
||||
switch (request) {
|
||||
case PTRACE_GETFPXREGS: /* Get the child FPU state. */
|
||||
case PTRACE_GETFPREGS: /* Get the child FPU state. */
|
||||
ret = get_fpregs(datap, child);
|
||||
break;
|
||||
case PTRACE_SETFPXREGS: /* Set the child FPU state. */
|
||||
case PTRACE_SETFPREGS: /* Set the child FPU state. */
|
||||
ret = set_fpregs(datap, child);
|
||||
break;
|
||||
case PTRACE_ARCH_PRCTL:
|
||||
/* XXX Calls ptrace on the host - needs some SMP thinking */
|
||||
ret = arch_prctl(child, data, (void __user *) addr);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -85,6 +85,7 @@
|
|||
|
||||
struct uml_pt_regs {
|
||||
unsigned long gp[MAX_REG_NR];
|
||||
unsigned long fp[HOST_FP_SIZE];
|
||||
struct faultinfo faultinfo;
|
||||
long syscall;
|
||||
int is_user;
|
||||
|
|
|
@ -16,7 +16,6 @@
|
|||
#endif
|
||||
|
||||
.macro altinstruction_entry orig alt feature orig_len alt_len
|
||||
.align 8
|
||||
.long \orig - .
|
||||
.long \alt - .
|
||||
.word \feature
|
||||
|
|
|
@ -48,9 +48,6 @@ struct alt_instr {
|
|||
u16 cpuid; /* cpuid bit set for replacement */
|
||||
u8 instrlen; /* length of original instruction */
|
||||
u8 replacementlen; /* length of new instruction, <= instrlen */
|
||||
#ifdef CONFIG_X86_64
|
||||
u32 pad2;
|
||||
#endif
|
||||
};
|
||||
|
||||
extern void alternative_instructions(void);
|
||||
|
@ -83,7 +80,6 @@ static inline int alternatives_text_reserved(void *start, void *end)
|
|||
\
|
||||
"661:\n\t" oldinstr "\n662:\n" \
|
||||
".section .altinstructions,\"a\"\n" \
|
||||
_ASM_ALIGN "\n" \
|
||||
" .long 661b - .\n" /* label */ \
|
||||
" .long 663f - .\n" /* new instruction */ \
|
||||
" .word " __stringify(feature) "\n" /* feature bit */ \
|
||||
|
|
|
@ -332,7 +332,6 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
|
|||
asm goto("1: jmp %l[t_no]\n"
|
||||
"2:\n"
|
||||
".section .altinstructions,\"a\"\n"
|
||||
_ASM_ALIGN "\n"
|
||||
" .long 1b - .\n"
|
||||
" .long 0\n" /* no replacement */
|
||||
" .word %P0\n" /* feature bit */
|
||||
|
@ -350,7 +349,6 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
|
|||
asm volatile("1: movb $0,%0\n"
|
||||
"2:\n"
|
||||
".section .altinstructions,\"a\"\n"
|
||||
_ASM_ALIGN "\n"
|
||||
" .long 1b - .\n"
|
||||
" .long 3f - .\n"
|
||||
" .word %P1\n" /* feature bit */
|
||||
|
|
|
@ -42,8 +42,11 @@ int mach_set_rtc_mmss(unsigned long nowtime)
|
|||
{
|
||||
int real_seconds, real_minutes, cmos_minutes;
|
||||
unsigned char save_control, save_freq_select;
|
||||
unsigned long flags;
|
||||
int retval = 0;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
|
||||
/* tell the clock it's being set */
|
||||
save_control = CMOS_READ(RTC_CONTROL);
|
||||
CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
|
||||
|
@ -93,12 +96,17 @@ int mach_set_rtc_mmss(unsigned long nowtime)
|
|||
CMOS_WRITE(save_control, RTC_CONTROL);
|
||||
CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
|
||||
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
unsigned long mach_get_cmos_time(void)
|
||||
{
|
||||
unsigned int status, year, mon, day, hour, min, sec, century = 0;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
|
||||
/*
|
||||
* If UIP is clear, then we have >= 244 microseconds before
|
||||
|
@ -125,6 +133,8 @@ unsigned long mach_get_cmos_time(void)
|
|||
status = CMOS_READ(RTC_CONTROL);
|
||||
WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY));
|
||||
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) {
|
||||
sec = bcd2bin(sec);
|
||||
min = bcd2bin(min);
|
||||
|
@ -169,24 +179,15 @@ EXPORT_SYMBOL(rtc_cmos_write);
|
|||
|
||||
int update_persistent_clock(struct timespec now)
|
||||
{
|
||||
unsigned long flags;
|
||||
int retval;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
retval = x86_platform.set_wallclock(now.tv_sec);
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
return retval;
|
||||
return x86_platform.set_wallclock(now.tv_sec);
|
||||
}
|
||||
|
||||
/* not static: needed by APM */
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
unsigned long retval, flags;
|
||||
unsigned long retval;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
retval = x86_platform.get_wallclock();
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
ts->tv_sec = retval;
|
||||
ts->tv_nsec = 0;
|
||||
|
|
|
@ -3603,7 +3603,7 @@ done_prefixes:
|
|||
break;
|
||||
case Src2CL:
|
||||
ctxt->src2.bytes = 1;
|
||||
ctxt->src2.val = ctxt->regs[VCPU_REGS_RCX] & 0x8;
|
||||
ctxt->src2.val = ctxt->regs[VCPU_REGS_RCX] & 0xff;
|
||||
break;
|
||||
case Src2ImmByte:
|
||||
rc = decode_imm(ctxt, &ctxt->src2, 1, true);
|
||||
|
|
|
@ -400,7 +400,8 @@ static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
|
|||
|
||||
/* xchg acts as a barrier before the setting of the high bits */
|
||||
orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
|
||||
orig.spte_high = ssptep->spte_high = sspte.spte_high;
|
||||
orig.spte_high = ssptep->spte_high;
|
||||
ssptep->spte_high = sspte.spte_high;
|
||||
count_spte_clear(sptep, spte);
|
||||
|
||||
return orig.spte;
|
||||
|
|
|
@ -58,8 +58,11 @@ EXPORT_SYMBOL_GPL(vrtc_cmos_write);
|
|||
unsigned long vrtc_get_time(void)
|
||||
{
|
||||
u8 sec, min, hour, mday, mon;
|
||||
unsigned long flags;
|
||||
u32 year;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
|
||||
while ((vrtc_cmos_read(RTC_FREQ_SELECT) & RTC_UIP))
|
||||
cpu_relax();
|
||||
|
||||
|
@ -70,6 +73,8 @@ unsigned long vrtc_get_time(void)
|
|||
mon = vrtc_cmos_read(RTC_MONTH);
|
||||
year = vrtc_cmos_read(RTC_YEAR);
|
||||
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
/* vRTC YEAR reg contains the offset to 1960 */
|
||||
year += 1960;
|
||||
|
||||
|
@ -83,8 +88,10 @@ unsigned long vrtc_get_time(void)
|
|||
int vrtc_set_mmss(unsigned long nowtime)
|
||||
{
|
||||
int real_sec, real_min;
|
||||
unsigned long flags;
|
||||
int vrtc_min;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
vrtc_min = vrtc_cmos_read(RTC_MINUTES);
|
||||
|
||||
real_sec = nowtime % 60;
|
||||
|
@ -95,6 +102,8 @@ int vrtc_set_mmss(unsigned long nowtime)
|
|||
|
||||
vrtc_cmos_write(real_sec, RTC_SECONDS);
|
||||
vrtc_cmos_write(real_min, RTC_MINUTES);
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -1721,10 +1721,8 @@ void __init xen_setup_machphys_mapping(void)
|
|||
machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
|
||||
}
|
||||
#ifdef CONFIG_X86_32
|
||||
if ((machine_to_phys_mapping + machine_to_phys_nr)
|
||||
< machine_to_phys_mapping)
|
||||
machine_to_phys_nr = (unsigned long *)NULL
|
||||
- machine_to_phys_mapping;
|
||||
WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
|
||||
< machine_to_phys_mapping);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
@ -306,10 +306,12 @@ char * __init xen_memory_setup(void)
|
|||
sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
|
||||
|
||||
extra_limit = xen_get_max_pages();
|
||||
if (extra_limit >= max_pfn)
|
||||
extra_pages = extra_limit - max_pfn;
|
||||
else
|
||||
extra_pages = 0;
|
||||
if (max_pfn + extra_pages > extra_limit) {
|
||||
if (extra_limit > max_pfn)
|
||||
extra_pages = extra_limit - max_pfn;
|
||||
else
|
||||
extra_pages = 0;
|
||||
}
|
||||
|
||||
extra_pages += xen_return_unused_memory(xen_start_info->nr_pages, &e820);
|
||||
|
||||
|
|
|
@ -532,7 +532,6 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus)
|
|||
WARN_ON(xen_smp_intr_init(0));
|
||||
|
||||
xen_init_lock_cpu(0);
|
||||
xen_init_spinlocks();
|
||||
}
|
||||
|
||||
static int __cpuinit xen_hvm_cpu_up(unsigned int cpu)
|
||||
|
|
|
@ -168,9 +168,10 @@ cycle_t xen_clocksource_read(void)
|
|||
struct pvclock_vcpu_time_info *src;
|
||||
cycle_t ret;
|
||||
|
||||
src = &get_cpu_var(xen_vcpu)->time;
|
||||
preempt_disable_notrace();
|
||||
src = &__get_cpu_var(xen_vcpu)->time;
|
||||
ret = pvclock_clocksource_read(src);
|
||||
put_cpu_var(xen_vcpu);
|
||||
preempt_enable_notrace();
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -785,10 +785,10 @@ static int blkio_policy_parse_and_set(char *buf,
|
|||
{
|
||||
char *s[4], *p, *major_s = NULL, *minor_s = NULL;
|
||||
int ret;
|
||||
unsigned long major, minor, temp;
|
||||
unsigned long major, minor;
|
||||
int i = 0;
|
||||
dev_t dev;
|
||||
u64 bps, iops;
|
||||
u64 temp;
|
||||
|
||||
memset(s, 0, sizeof(s));
|
||||
|
||||
|
@ -826,20 +826,23 @@ static int blkio_policy_parse_and_set(char *buf,
|
|||
|
||||
dev = MKDEV(major, minor);
|
||||
|
||||
ret = blkio_check_dev_num(dev);
|
||||
ret = strict_strtoull(s[1], 10, &temp);
|
||||
if (ret)
|
||||
return ret;
|
||||
return -EINVAL;
|
||||
|
||||
/* For rule removal, do not check for device presence. */
|
||||
if (temp) {
|
||||
ret = blkio_check_dev_num(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
newpn->dev = dev;
|
||||
|
||||
if (s[1] == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (plid) {
|
||||
case BLKIO_POLICY_PROP:
|
||||
ret = strict_strtoul(s[1], 10, &temp);
|
||||
if (ret || (temp < BLKIO_WEIGHT_MIN && temp > 0) ||
|
||||
temp > BLKIO_WEIGHT_MAX)
|
||||
if ((temp < BLKIO_WEIGHT_MIN && temp > 0) ||
|
||||
temp > BLKIO_WEIGHT_MAX)
|
||||
return -EINVAL;
|
||||
|
||||
newpn->plid = plid;
|
||||
|
@ -850,26 +853,18 @@ static int blkio_policy_parse_and_set(char *buf,
|
|||
switch(fileid) {
|
||||
case BLKIO_THROTL_read_bps_device:
|
||||
case BLKIO_THROTL_write_bps_device:
|
||||
ret = strict_strtoull(s[1], 10, &bps);
|
||||
if (ret)
|
||||
return -EINVAL;
|
||||
|
||||
newpn->plid = plid;
|
||||
newpn->fileid = fileid;
|
||||
newpn->val.bps = bps;
|
||||
newpn->val.bps = temp;
|
||||
break;
|
||||
case BLKIO_THROTL_read_iops_device:
|
||||
case BLKIO_THROTL_write_iops_device:
|
||||
ret = strict_strtoull(s[1], 10, &iops);
|
||||
if (ret)
|
||||
return -EINVAL;
|
||||
|
||||
if (iops > THROTL_IOPS_MAX)
|
||||
if (temp > THROTL_IOPS_MAX)
|
||||
return -EINVAL;
|
||||
|
||||
newpn->plid = plid;
|
||||
newpn->fileid = fileid;
|
||||
newpn->val.iops = (unsigned int)iops;
|
||||
newpn->val.iops = (unsigned int)temp;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
|
|
@ -348,9 +348,10 @@ void blk_put_queue(struct request_queue *q)
|
|||
EXPORT_SYMBOL(blk_put_queue);
|
||||
|
||||
/*
|
||||
* Note: If a driver supplied the queue lock, it should not zap that lock
|
||||
* unexpectedly as some queue cleanup components like elevator_exit() and
|
||||
* blk_throtl_exit() need queue lock.
|
||||
* Note: If a driver supplied the queue lock, it is disconnected
|
||||
* by this function. The actual state of the lock doesn't matter
|
||||
* here as the request_queue isn't accessible after this point
|
||||
* (QUEUE_FLAG_DEAD is set) and no other requests will be queued.
|
||||
*/
|
||||
void blk_cleanup_queue(struct request_queue *q)
|
||||
{
|
||||
|
@ -367,10 +368,8 @@ void blk_cleanup_queue(struct request_queue *q)
|
|||
queue_flag_set_unlocked(QUEUE_FLAG_DEAD, q);
|
||||
mutex_unlock(&q->sysfs_lock);
|
||||
|
||||
if (q->elevator)
|
||||
elevator_exit(q->elevator);
|
||||
|
||||
blk_throtl_exit(q);
|
||||
if (q->queue_lock != &q->__queue_lock)
|
||||
q->queue_lock = &q->__queue_lock;
|
||||
|
||||
blk_put_queue(q);
|
||||
}
|
||||
|
@ -1167,7 +1166,7 @@ static bool bio_attempt_front_merge(struct request_queue *q,
|
|||
* true if merge was successful, otherwise false.
|
||||
*/
|
||||
static bool attempt_plug_merge(struct task_struct *tsk, struct request_queue *q,
|
||||
struct bio *bio)
|
||||
struct bio *bio, unsigned int *request_count)
|
||||
{
|
||||
struct blk_plug *plug;
|
||||
struct request *rq;
|
||||
|
@ -1176,10 +1175,13 @@ static bool attempt_plug_merge(struct task_struct *tsk, struct request_queue *q,
|
|||
plug = tsk->plug;
|
||||
if (!plug)
|
||||
goto out;
|
||||
*request_count = 0;
|
||||
|
||||
list_for_each_entry_reverse(rq, &plug->list, queuelist) {
|
||||
int el_ret;
|
||||
|
||||
(*request_count)++;
|
||||
|
||||
if (rq->q != q)
|
||||
continue;
|
||||
|
||||
|
@ -1219,6 +1221,7 @@ static int __make_request(struct request_queue *q, struct bio *bio)
|
|||
struct blk_plug *plug;
|
||||
int el_ret, rw_flags, where = ELEVATOR_INSERT_SORT;
|
||||
struct request *req;
|
||||
unsigned int request_count = 0;
|
||||
|
||||
/*
|
||||
* low level driver can indicate that it wants pages above a
|
||||
|
@ -1237,7 +1240,7 @@ static int __make_request(struct request_queue *q, struct bio *bio)
|
|||
* Check if we can merge with the plugged list before grabbing
|
||||
* any locks.
|
||||
*/
|
||||
if (attempt_plug_merge(current, q, bio))
|
||||
if (attempt_plug_merge(current, q, bio, &request_count))
|
||||
goto out;
|
||||
|
||||
spin_lock_irq(q->queue_lock);
|
||||
|
@ -1302,11 +1305,10 @@ get_rq:
|
|||
if (__rq->q != q)
|
||||
plug->should_sort = 1;
|
||||
}
|
||||
list_add_tail(&req->queuelist, &plug->list);
|
||||
plug->count++;
|
||||
drive_stat_acct(req, 1);
|
||||
if (plug->count >= BLK_MAX_REQUEST_COUNT)
|
||||
if (request_count >= BLK_MAX_REQUEST_COUNT)
|
||||
blk_flush_plug_list(plug, false);
|
||||
list_add_tail(&req->queuelist, &plug->list);
|
||||
drive_stat_acct(req, 1);
|
||||
} else {
|
||||
spin_lock_irq(q->queue_lock);
|
||||
add_acct_request(q, req, where);
|
||||
|
@ -2634,7 +2636,6 @@ void blk_start_plug(struct blk_plug *plug)
|
|||
INIT_LIST_HEAD(&plug->list);
|
||||
INIT_LIST_HEAD(&plug->cb_list);
|
||||
plug->should_sort = 0;
|
||||
plug->count = 0;
|
||||
|
||||
/*
|
||||
* If this is a nested plug, don't actually assign it. It will be
|
||||
|
@ -2718,7 +2719,6 @@ void blk_flush_plug_list(struct blk_plug *plug, bool from_schedule)
|
|||
return;
|
||||
|
||||
list_splice_init(&plug->list, &list);
|
||||
plug->count = 0;
|
||||
|
||||
if (plug->should_sort) {
|
||||
list_sort(NULL, &list, plug_rq_cmp);
|
||||
|
|
|
@ -115,7 +115,7 @@ void __blk_complete_request(struct request *req)
|
|||
/*
|
||||
* Select completion CPU
|
||||
*/
|
||||
if (test_bit(QUEUE_FLAG_SAME_COMP, &q->queue_flags) && req->cpu != -1) {
|
||||
if (req->cpu != -1) {
|
||||
ccpu = req->cpu;
|
||||
if (!test_bit(QUEUE_FLAG_SAME_FORCE, &q->queue_flags)) {
|
||||
ccpu = blk_cpu_to_group(ccpu);
|
||||
|
|
|
@ -258,11 +258,13 @@ queue_rq_affinity_store(struct request_queue *q, const char *page, size_t count)
|
|||
|
||||
ret = queue_var_store(&val, page, count);
|
||||
spin_lock_irq(q->queue_lock);
|
||||
if (val) {
|
||||
if (val == 2) {
|
||||
queue_flag_set(QUEUE_FLAG_SAME_COMP, q);
|
||||
if (val == 2)
|
||||
queue_flag_set(QUEUE_FLAG_SAME_FORCE, q);
|
||||
} else {
|
||||
queue_flag_set(QUEUE_FLAG_SAME_FORCE, q);
|
||||
} else if (val == 1) {
|
||||
queue_flag_set(QUEUE_FLAG_SAME_COMP, q);
|
||||
queue_flag_clear(QUEUE_FLAG_SAME_FORCE, q);
|
||||
} else if (val == 0) {
|
||||
queue_flag_clear(QUEUE_FLAG_SAME_COMP, q);
|
||||
queue_flag_clear(QUEUE_FLAG_SAME_FORCE, q);
|
||||
}
|
||||
|
@ -477,6 +479,11 @@ static void blk_release_queue(struct kobject *kobj)
|
|||
|
||||
blk_sync_queue(q);
|
||||
|
||||
if (q->elevator)
|
||||
elevator_exit(q->elevator);
|
||||
|
||||
blk_throtl_exit(q);
|
||||
|
||||
if (rl->rq_pool)
|
||||
mempool_destroy(rl->rq_pool);
|
||||
|
||||
|
|
|
@ -130,8 +130,8 @@ struct cfq_queue {
|
|||
unsigned long slice_end;
|
||||
long slice_resid;
|
||||
|
||||
/* pending metadata requests */
|
||||
int meta_pending;
|
||||
/* pending priority requests */
|
||||
int prio_pending;
|
||||
/* number of requests that are on the dispatch list or inside driver */
|
||||
int dispatched;
|
||||
|
||||
|
@ -684,8 +684,8 @@ cfq_choose_req(struct cfq_data *cfqd, struct request *rq1, struct request *rq2,
|
|||
if (rq_is_sync(rq1) != rq_is_sync(rq2))
|
||||
return rq_is_sync(rq1) ? rq1 : rq2;
|
||||
|
||||
if ((rq1->cmd_flags ^ rq2->cmd_flags) & REQ_META)
|
||||
return rq1->cmd_flags & REQ_META ? rq1 : rq2;
|
||||
if ((rq1->cmd_flags ^ rq2->cmd_flags) & REQ_PRIO)
|
||||
return rq1->cmd_flags & REQ_PRIO ? rq1 : rq2;
|
||||
|
||||
s1 = blk_rq_pos(rq1);
|
||||
s2 = blk_rq_pos(rq2);
|
||||
|
@ -1612,9 +1612,9 @@ static void cfq_remove_request(struct request *rq)
|
|||
cfqq->cfqd->rq_queued--;
|
||||
cfq_blkiocg_update_io_remove_stats(&(RQ_CFQG(rq))->blkg,
|
||||
rq_data_dir(rq), rq_is_sync(rq));
|
||||
if (rq->cmd_flags & REQ_META) {
|
||||
WARN_ON(!cfqq->meta_pending);
|
||||
cfqq->meta_pending--;
|
||||
if (rq->cmd_flags & REQ_PRIO) {
|
||||
WARN_ON(!cfqq->prio_pending);
|
||||
cfqq->prio_pending--;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -3372,7 +3372,7 @@ cfq_should_preempt(struct cfq_data *cfqd, struct cfq_queue *new_cfqq,
|
|||
* So both queues are sync. Let the new request get disk time if
|
||||
* it's a metadata request and the current queue is doing regular IO.
|
||||
*/
|
||||
if ((rq->cmd_flags & REQ_META) && !cfqq->meta_pending)
|
||||
if ((rq->cmd_flags & REQ_PRIO) && !cfqq->prio_pending)
|
||||
return true;
|
||||
|
||||
/*
|
||||
|
@ -3439,8 +3439,8 @@ cfq_rq_enqueued(struct cfq_data *cfqd, struct cfq_queue *cfqq,
|
|||
struct cfq_io_context *cic = RQ_CIC(rq);
|
||||
|
||||
cfqd->rq_queued++;
|
||||
if (rq->cmd_flags & REQ_META)
|
||||
cfqq->meta_pending++;
|
||||
if (rq->cmd_flags & REQ_PRIO)
|
||||
cfqq->prio_pending++;
|
||||
|
||||
cfq_update_io_thinktime(cfqd, cfqq, cic);
|
||||
cfq_update_io_seektime(cfqd, cfqq, rq);
|
||||
|
|
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