ACPI, x86: expose some IO-APIC routines when CONFIG_ACPI=n
Some IO-APIC routines are ACPI specific now, but need to be exposed when CONFIG_ACPI=n for the benefit of SFI. Remove #ifdef ACPI around these routines: io_apic_get_unique_id(int ioapic, int apic_id); io_apic_get_version(int ioapic); io_apic_get_redir_entries(int ioapic); Move these routines from ACPI-specific boot.c to io_apic.c: uniq_ioapic_id(u8 id) mp_find_ioapic() mp_find_ioapic_pin() mp_register_ioapic() Also, since uniq_ioapic_id() is now no longer static, re-name it to io_apic_unique_id() for consistency with the other public io_apic routines. For simplicity, do not #ifdef the resulting code ACPI || SFI, thought that could be done in the future if it is important to optimize the !ACPI !SFI IO-APIC x86 kernel for size. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com> Cc: x86@kernel.org
This commit is contained in:
Feng Tang
Len Brown
Родитель
326ba5010a
Коммит
2a4ab640d3
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@ -150,11 +150,10 @@ extern int timer_through_8259;
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#define io_apic_assign_pci_irqs \
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(mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
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#ifdef CONFIG_ACPI
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extern u8 io_apic_unique_id(u8 id);
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extern int io_apic_get_unique_id(int ioapic, int apic_id);
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extern int io_apic_get_version(int ioapic);
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extern int io_apic_get_redir_entries(int ioapic);
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#endif /* CONFIG_ACPI */
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struct io_apic_irq_attr;
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extern int io_apic_set_pci_routing(struct device *dev, int irq,
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@ -177,6 +176,16 @@ extern int setup_ioapic_entry(int apic, int irq,
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int polarity, int vector, int pin);
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extern void ioapic_write_entry(int apic, int pin,
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struct IO_APIC_route_entry e);
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struct mp_ioapic_gsi{
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int gsi_base;
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int gsi_end;
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};
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extern struct mp_ioapic_gsi mp_gsi_routing[];
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int mp_find_ioapic(int gsi);
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int mp_find_ioapic_pin(int ioapic, int gsi);
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void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
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#else /* !CONFIG_X86_IO_APIC */
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#define io_apic_assign_pci_irqs 0
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static const int timer_through_8259 = 0;
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@ -833,106 +833,6 @@ static int __init acpi_parse_madt_lapic_entries(void)
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extern int es7000_plat;
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#endif
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static struct {
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int gsi_base;
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int gsi_end;
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} mp_ioapic_routing[MAX_IO_APICS];
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int mp_find_ioapic(int gsi)
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{
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int i = 0;
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/* Find the IOAPIC that manages this GSI. */
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for (i = 0; i < nr_ioapics; i++) {
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if ((gsi >= mp_ioapic_routing[i].gsi_base)
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&& (gsi <= mp_ioapic_routing[i].gsi_end))
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return i;
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}
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printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
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return -1;
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}
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int mp_find_ioapic_pin(int ioapic, int gsi)
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{
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if (WARN_ON(ioapic == -1))
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return -1;
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if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))
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return -1;
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return gsi - mp_ioapic_routing[ioapic].gsi_base;
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}
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static u8 __init uniq_ioapic_id(u8 id)
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{
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#ifdef CONFIG_X86_32
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if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
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!APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
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return io_apic_get_unique_id(nr_ioapics, id);
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else
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return id;
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#else
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int i;
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DECLARE_BITMAP(used, 256);
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bitmap_zero(used, 256);
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for (i = 0; i < nr_ioapics; i++) {
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struct mpc_ioapic *ia = &mp_ioapics[i];
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__set_bit(ia->apicid, used);
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}
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if (!test_bit(id, used))
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return id;
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return find_first_zero_bit(used, 256);
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#endif
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}
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static int bad_ioapic(unsigned long address)
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{
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if (nr_ioapics >= MAX_IO_APICS) {
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printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
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"(found %d)\n", MAX_IO_APICS, nr_ioapics);
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panic("Recompile kernel with bigger MAX_IO_APICS!\n");
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}
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if (!address) {
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printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
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" found in table, skipping!\n");
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return 1;
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}
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return 0;
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}
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void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
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{
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int idx = 0;
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if (bad_ioapic(address))
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return;
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idx = nr_ioapics;
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mp_ioapics[idx].type = MP_IOAPIC;
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mp_ioapics[idx].flags = MPC_APIC_USABLE;
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mp_ioapics[idx].apicaddr = address;
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set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
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mp_ioapics[idx].apicid = uniq_ioapic_id(id);
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mp_ioapics[idx].apicver = io_apic_get_version(idx);
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/*
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* Build basic GSI lookup table to facilitate gsi->io_apic lookups
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* and to prevent reprogramming of IOAPIC pins (PCI GSIs).
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*/
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mp_ioapic_routing[idx].gsi_base = gsi_base;
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mp_ioapic_routing[idx].gsi_end = gsi_base +
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io_apic_get_redir_entries(idx);
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printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
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"GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
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mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr,
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mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
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nr_ioapics++;
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}
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int __init acpi_probe_gsi(void)
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{
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int idx;
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@ -947,7 +847,7 @@ int __init acpi_probe_gsi(void)
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max_gsi = 0;
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for (idx = 0; idx < nr_ioapics; idx++) {
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gsi = mp_ioapic_routing[idx].gsi_end;
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gsi = mp_gsi_routing[idx].gsi_end;
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if (gsi > max_gsi)
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max_gsi = gsi;
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@ -85,6 +85,9 @@ int nr_ioapic_registers[MAX_IO_APICS];
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struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
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int nr_ioapics;
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/* IO APIC gsi routing info */
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struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
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/* MP IRQ source entries */
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struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
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@ -3941,11 +3944,28 @@ int io_apic_set_pci_routing(struct device *dev, int irq,
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return __io_apic_set_pci_routing(dev, irq, irq_attr);
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}
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/* --------------------------------------------------------------------------
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ACPI-based IOAPIC Configuration
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-------------------------------------------------------------------------- */
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u8 __init io_apic_unique_id(u8 id)
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{
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#ifdef CONFIG_X86_32
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if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
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!APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
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return io_apic_get_unique_id(nr_ioapics, id);
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else
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return id;
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#else
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int i;
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DECLARE_BITMAP(used, 256);
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#ifdef CONFIG_ACPI
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bitmap_zero(used, 256);
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for (i = 0; i < nr_ioapics; i++) {
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struct mpc_ioapic *ia = &mp_ioapics[i];
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__set_bit(ia->apicid, used);
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}
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if (!test_bit(id, used))
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return id;
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return find_first_zero_bit(used, 256);
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#endif
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}
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#ifdef CONFIG_X86_32
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int __init io_apic_get_unique_id(int ioapic, int apic_id)
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@ -4054,8 +4074,6 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
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return 0;
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}
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#endif /* CONFIG_ACPI */
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/*
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* This function currently is only a helper for the i386 smp boot process where
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* we need to reprogram the ioredtbls to cater for the cpus which have come online
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@ -4201,3 +4219,76 @@ void __init ioapic_insert_resources(void)
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r++;
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}
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}
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int mp_find_ioapic(int gsi)
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{
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int i = 0;
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/* Find the IOAPIC that manages this GSI. */
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for (i = 0; i < nr_ioapics; i++) {
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if ((gsi >= mp_gsi_routing[i].gsi_base)
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&& (gsi <= mp_gsi_routing[i].gsi_end))
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return i;
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}
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printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
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return -1;
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}
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int mp_find_ioapic_pin(int ioapic, int gsi)
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{
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if (WARN_ON(ioapic == -1))
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return -1;
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if (WARN_ON(gsi > mp_gsi_routing[ioapic].gsi_end))
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return -1;
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return gsi - mp_gsi_routing[ioapic].gsi_base;
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}
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static int bad_ioapic(unsigned long address)
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{
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if (nr_ioapics >= MAX_IO_APICS) {
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printk(KERN_WARNING "WARING: Max # of I/O APICs (%d) exceeded "
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"(found %d), skipping\n", MAX_IO_APICS, nr_ioapics);
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return 1;
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}
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if (!address) {
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printk(KERN_WARNING "WARNING: Bogus (zero) I/O APIC address"
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" found in table, skipping!\n");
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return 1;
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}
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return 0;
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}
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void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
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{
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int idx = 0;
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if (bad_ioapic(address))
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return;
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idx = nr_ioapics;
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mp_ioapics[idx].type = MP_IOAPIC;
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mp_ioapics[idx].flags = MPC_APIC_USABLE;
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mp_ioapics[idx].apicaddr = address;
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set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
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mp_ioapics[idx].apicid = io_apic_unique_id(id);
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mp_ioapics[idx].apicver = io_apic_get_version(idx);
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/*
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* Build basic GSI lookup table to facilitate gsi->io_apic lookups
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* and to prevent reprogramming of IOAPIC pins (PCI GSIs).
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*/
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mp_gsi_routing[idx].gsi_base = gsi_base;
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mp_gsi_routing[idx].gsi_end = gsi_base +
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io_apic_get_redir_entries(idx);
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printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
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"GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
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mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr,
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mp_gsi_routing[idx].gsi_base, mp_gsi_routing[idx].gsi_end);
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nr_ioapics++;
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}
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