MIPS: lib: csum_partial: Merge EXC and load/store macros
Each load/store macro always adds an entry to the __ex_table using the EXC macro. There are cases where a load instruction may never fail such as when we are sure the load happens in the kernel address space. Therefore, we merge these the EXC and LOADX/STOREX macros into a single one. We also expand the argument list in the EXC macro to make the macro more flexible. The extra 'type' argument is not used by this commit, but it will be used when EVA support is added to memcpy. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
Markos Chandras
Ralf Baechle
Родитель
ac85227f76
Коммит
2ab82e6648
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@ -328,20 +328,39 @@ LEAF(csum_partial)
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* These handlers do not need to overwrite any data.
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*/
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#define EXC(inst_reg,addr,handler) \
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9: inst_reg, addr; \
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/* Instruction type */
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#define LD_INSN 1
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#define ST_INSN 2
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/*
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* Wrapper to add an entry in the exception table
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* in case the insn causes a memory exception.
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* Arguments:
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* insn : Load/store instruction
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* type : Instruction type
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* reg : Register
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* addr : Address
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* handler : Exception handler
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*/
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#define EXC(insn, type, reg, addr, handler) \
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9: insn reg, addr; \
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.section __ex_table,"a"; \
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PTR 9b, handler; \
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.previous
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#undef LOAD
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#ifdef USE_DOUBLE
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#define LOAD ld
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#define LOADL ldl
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#define LOADR ldr
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#define STOREL sdl
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#define STORER sdr
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#define STORE sd
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#define LOADK ld /* No exception */
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#define LOAD(reg, addr, handler) EXC(ld, LD_INSN, reg, addr, handler)
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#define LOADBU(reg, addr, handler) EXC(lbu, LD_INSN, reg, addr, handler)
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#define LOADL(reg, addr, handler) EXC(ldl, LD_INSN, reg, addr, handler)
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#define LOADR(reg, addr, handler) EXC(ldr, LD_INSN, reg, addr, handler)
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#define STOREB(reg, addr, handler) EXC(sb, ST_INSN, reg, addr, handler)
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#define STOREL(reg, addr, handler) EXC(sdl, ST_INSN, reg, addr, handler)
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#define STORER(reg, addr, handler) EXC(sdr, ST_INSN, reg, addr, handler)
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#define STORE(reg, addr, handler) EXC(sd, ST_INSN, reg, addr, handler)
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#define ADD daddu
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#define SUB dsubu
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#define SRL dsrl
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@ -353,12 +372,15 @@ LEAF(csum_partial)
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#else
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#define LOAD lw
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#define LOADL lwl
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#define LOADR lwr
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#define STOREL swl
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#define STORER swr
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#define STORE sw
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#define LOADK lw /* No exception */
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#define LOAD(reg, addr, handler) EXC(lw, LD_INSN, reg, addr, handler)
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#define LOADBU(reg, addr, handler) EXC(lbu, LD_INSN, reg, addr, handler)
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#define LOADL(reg, addr, handler) EXC(lwl, LD_INSN, reg, addr, handler)
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#define LOADR(reg, addr, handler) EXC(lwr, LD_INSN, reg, addr, handler)
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#define STOREB(reg, addr, handler) EXC(sb, ST_INSN, reg, addr, handler)
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#define STOREL(reg, addr, handler) EXC(swl, ST_INSN, reg, addr, handler)
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#define STORER(reg, addr, handler) EXC(swr, ST_INSN, reg, addr, handler)
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#define STORE(reg, addr, handler) EXC(sw, ST_INSN, reg, addr, handler)
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#define ADD addu
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#define SUB subu
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#define SRL srl
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@ -439,31 +461,31 @@ FEXPORT(csum_partial_copy_nocheck)
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SUB len, 8*NBYTES # subtract here for bgez loop
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.align 4
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1:
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EXC( LOAD t0, UNIT(0)(src), .Ll_exc)
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EXC( LOAD t1, UNIT(1)(src), .Ll_exc_copy)
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EXC( LOAD t2, UNIT(2)(src), .Ll_exc_copy)
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EXC( LOAD t3, UNIT(3)(src), .Ll_exc_copy)
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EXC( LOAD t4, UNIT(4)(src), .Ll_exc_copy)
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EXC( LOAD t5, UNIT(5)(src), .Ll_exc_copy)
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EXC( LOAD t6, UNIT(6)(src), .Ll_exc_copy)
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EXC( LOAD t7, UNIT(7)(src), .Ll_exc_copy)
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LOAD(t0, UNIT(0)(src), .Ll_exc)
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LOAD(t1, UNIT(1)(src), .Ll_exc_copy)
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LOAD(t2, UNIT(2)(src), .Ll_exc_copy)
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LOAD(t3, UNIT(3)(src), .Ll_exc_copy)
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LOAD(t4, UNIT(4)(src), .Ll_exc_copy)
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LOAD(t5, UNIT(5)(src), .Ll_exc_copy)
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LOAD(t6, UNIT(6)(src), .Ll_exc_copy)
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LOAD(t7, UNIT(7)(src), .Ll_exc_copy)
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SUB len, len, 8*NBYTES
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ADD src, src, 8*NBYTES
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EXC( STORE t0, UNIT(0)(dst), .Ls_exc)
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STORE(t0, UNIT(0)(dst), .Ls_exc)
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ADDC(sum, t0)
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EXC( STORE t1, UNIT(1)(dst), .Ls_exc)
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STORE(t1, UNIT(1)(dst), .Ls_exc)
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ADDC(sum, t1)
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EXC( STORE t2, UNIT(2)(dst), .Ls_exc)
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STORE(t2, UNIT(2)(dst), .Ls_exc)
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ADDC(sum, t2)
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EXC( STORE t3, UNIT(3)(dst), .Ls_exc)
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STORE(t3, UNIT(3)(dst), .Ls_exc)
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ADDC(sum, t3)
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EXC( STORE t4, UNIT(4)(dst), .Ls_exc)
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STORE(t4, UNIT(4)(dst), .Ls_exc)
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ADDC(sum, t4)
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EXC( STORE t5, UNIT(5)(dst), .Ls_exc)
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STORE(t5, UNIT(5)(dst), .Ls_exc)
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ADDC(sum, t5)
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EXC( STORE t6, UNIT(6)(dst), .Ls_exc)
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STORE(t6, UNIT(6)(dst), .Ls_exc)
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ADDC(sum, t6)
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EXC( STORE t7, UNIT(7)(dst), .Ls_exc)
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STORE(t7, UNIT(7)(dst), .Ls_exc)
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ADDC(sum, t7)
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.set reorder /* DADDI_WAR */
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ADD dst, dst, 8*NBYTES
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@ -483,19 +505,19 @@ EXC( STORE t7, UNIT(7)(dst), .Ls_exc)
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/*
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* len >= 4*NBYTES
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*/
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EXC( LOAD t0, UNIT(0)(src), .Ll_exc)
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EXC( LOAD t1, UNIT(1)(src), .Ll_exc_copy)
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EXC( LOAD t2, UNIT(2)(src), .Ll_exc_copy)
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EXC( LOAD t3, UNIT(3)(src), .Ll_exc_copy)
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LOAD(t0, UNIT(0)(src), .Ll_exc)
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LOAD(t1, UNIT(1)(src), .Ll_exc_copy)
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LOAD(t2, UNIT(2)(src), .Ll_exc_copy)
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LOAD(t3, UNIT(3)(src), .Ll_exc_copy)
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SUB len, len, 4*NBYTES
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ADD src, src, 4*NBYTES
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EXC( STORE t0, UNIT(0)(dst), .Ls_exc)
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STORE(t0, UNIT(0)(dst), .Ls_exc)
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ADDC(sum, t0)
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EXC( STORE t1, UNIT(1)(dst), .Ls_exc)
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STORE(t1, UNIT(1)(dst), .Ls_exc)
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ADDC(sum, t1)
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EXC( STORE t2, UNIT(2)(dst), .Ls_exc)
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STORE(t2, UNIT(2)(dst), .Ls_exc)
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ADDC(sum, t2)
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EXC( STORE t3, UNIT(3)(dst), .Ls_exc)
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STORE(t3, UNIT(3)(dst), .Ls_exc)
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ADDC(sum, t3)
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.set reorder /* DADDI_WAR */
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ADD dst, dst, 4*NBYTES
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@ -508,10 +530,10 @@ EXC( STORE t3, UNIT(3)(dst), .Ls_exc)
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beq rem, len, .Lcopy_bytes
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nop
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1:
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EXC( LOAD t0, 0(src), .Ll_exc)
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LOAD(t0, 0(src), .Ll_exc)
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ADD src, src, NBYTES
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SUB len, len, NBYTES
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EXC( STORE t0, 0(dst), .Ls_exc)
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STORE(t0, 0(dst), .Ls_exc)
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ADDC(sum, t0)
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.set reorder /* DADDI_WAR */
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ADD dst, dst, NBYTES
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@ -534,10 +556,10 @@ EXC( STORE t0, 0(dst), .Ls_exc)
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ADD t1, dst, len # t1 is just past last byte of dst
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li bits, 8*NBYTES
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SLL rem, len, 3 # rem = number of bits to keep
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EXC( LOAD t0, 0(src), .Ll_exc)
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LOAD(t0, 0(src), .Ll_exc)
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SUB bits, bits, rem # bits = number of bits to discard
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SHIFT_DISCARD t0, t0, bits
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EXC( STREST t0, -1(t1), .Ls_exc)
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STREST(t0, -1(t1), .Ls_exc)
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SHIFT_DISCARD_REVERT t0, t0, bits
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.set reorder
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ADDC(sum, t0)
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@ -554,12 +576,12 @@ EXC( STREST t0, -1(t1), .Ls_exc)
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* Set match = (src and dst have same alignment)
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*/
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#define match rem
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EXC( LDFIRST t3, FIRST(0)(src), .Ll_exc)
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LDFIRST(t3, FIRST(0)(src), .Ll_exc)
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ADD t2, zero, NBYTES
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EXC( LDREST t3, REST(0)(src), .Ll_exc_copy)
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LDREST(t3, REST(0)(src), .Ll_exc_copy)
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SUB t2, t2, t1 # t2 = number of bytes copied
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xor match, t0, t1
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EXC( STFIRST t3, FIRST(0)(dst), .Ls_exc)
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STFIRST(t3, FIRST(0)(dst), .Ls_exc)
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SLL t4, t1, 3 # t4 = number of bits to discard
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SHIFT_DISCARD t3, t3, t4
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/* no SHIFT_DISCARD_REVERT to handle odd buffer properly */
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@ -581,26 +603,26 @@ EXC( STFIRST t3, FIRST(0)(dst), .Ls_exc)
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* It's OK to load FIRST(N+1) before REST(N) because the two addresses
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* are to the same unit (unless src is aligned, but it's not).
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*/
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EXC( LDFIRST t0, FIRST(0)(src), .Ll_exc)
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EXC( LDFIRST t1, FIRST(1)(src), .Ll_exc_copy)
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LDFIRST(t0, FIRST(0)(src), .Ll_exc)
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LDFIRST(t1, FIRST(1)(src), .Ll_exc_copy)
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SUB len, len, 4*NBYTES
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EXC( LDREST t0, REST(0)(src), .Ll_exc_copy)
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EXC( LDREST t1, REST(1)(src), .Ll_exc_copy)
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EXC( LDFIRST t2, FIRST(2)(src), .Ll_exc_copy)
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EXC( LDFIRST t3, FIRST(3)(src), .Ll_exc_copy)
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EXC( LDREST t2, REST(2)(src), .Ll_exc_copy)
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EXC( LDREST t3, REST(3)(src), .Ll_exc_copy)
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LDREST(t0, REST(0)(src), .Ll_exc_copy)
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LDREST(t1, REST(1)(src), .Ll_exc_copy)
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LDFIRST(t2, FIRST(2)(src), .Ll_exc_copy)
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LDFIRST(t3, FIRST(3)(src), .Ll_exc_copy)
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LDREST(t2, REST(2)(src), .Ll_exc_copy)
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LDREST(t3, REST(3)(src), .Ll_exc_copy)
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ADD src, src, 4*NBYTES
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#ifdef CONFIG_CPU_SB1
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nop # improves slotting
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#endif
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EXC( STORE t0, UNIT(0)(dst), .Ls_exc)
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STORE(t0, UNIT(0)(dst), .Ls_exc)
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ADDC(sum, t0)
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EXC( STORE t1, UNIT(1)(dst), .Ls_exc)
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STORE(t1, UNIT(1)(dst), .Ls_exc)
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ADDC(sum, t1)
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EXC( STORE t2, UNIT(2)(dst), .Ls_exc)
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STORE(t2, UNIT(2)(dst), .Ls_exc)
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ADDC(sum, t2)
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EXC( STORE t3, UNIT(3)(dst), .Ls_exc)
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STORE(t3, UNIT(3)(dst), .Ls_exc)
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ADDC(sum, t3)
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.set reorder /* DADDI_WAR */
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ADD dst, dst, 4*NBYTES
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@ -613,11 +635,11 @@ EXC( STORE t3, UNIT(3)(dst), .Ls_exc)
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beq rem, len, .Lcopy_bytes
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nop
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1:
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EXC( LDFIRST t0, FIRST(0)(src), .Ll_exc)
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EXC( LDREST t0, REST(0)(src), .Ll_exc_copy)
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LDFIRST(t0, FIRST(0)(src), .Ll_exc)
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LDREST(t0, REST(0)(src), .Ll_exc_copy)
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ADD src, src, NBYTES
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SUB len, len, NBYTES
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EXC( STORE t0, 0(dst), .Ls_exc)
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STORE(t0, 0(dst), .Ls_exc)
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ADDC(sum, t0)
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.set reorder /* DADDI_WAR */
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ADD dst, dst, NBYTES
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@ -640,9 +662,9 @@ EXC( STORE t0, 0(dst), .Ls_exc)
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li t3, SHIFT_START # shift
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/* use .Ll_exc_copy here to return correct sum on fault */
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#define COPY_BYTE(N) \
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EXC( lbu t0, N(src), .Ll_exc_copy); \
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LOADBU(t0, N(src), .Ll_exc_copy); \
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SUB len, len, 1; \
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EXC( sb t0, N(dst), .Ls_exc); \
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STOREB(t0, N(dst), .Ls_exc); \
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SLLV t0, t0, t3; \
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addu t3, SHIFT_INC; \
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beqz len, .Lcopy_bytes_done; \
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@ -656,9 +678,9 @@ EXC( sb t0, N(dst), .Ls_exc); \
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COPY_BYTE(4)
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COPY_BYTE(5)
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#endif
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EXC( lbu t0, NBYTES-2(src), .Ll_exc_copy)
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LOADBU(t0, NBYTES-2(src), .Ll_exc_copy)
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SUB len, len, 1
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EXC( sb t0, NBYTES-2(dst), .Ls_exc)
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STOREB(t0, NBYTES-2(dst), .Ls_exc)
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SLLV t0, t0, t3
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or t2, t0
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.Lcopy_bytes_done:
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@ -703,11 +725,11 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc)
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*
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* Assumes src < THREAD_BUADDR($28)
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*/
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LOAD t0, TI_TASK($28)
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LOADK t0, TI_TASK($28)
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li t2, SHIFT_START
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LOAD t0, THREAD_BUADDR(t0)
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LOADK t0, THREAD_BUADDR(t0)
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1:
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EXC( lbu t1, 0(src), .Ll_exc)
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LOADBU(t1, 0(src), .Ll_exc)
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ADD src, src, 1
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sb t1, 0(dst) # can't fault -- we're copy_from_user
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SLLV t1, t1, t2
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@ -718,9 +740,9 @@ EXC( lbu t1, 0(src), .Ll_exc)
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bne src, t0, 1b
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.set noreorder
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.Ll_exc:
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LOAD t0, TI_TASK($28)
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LOADK t0, TI_TASK($28)
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nop
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LOAD t0, THREAD_BUADDR(t0) # t0 is just past last good address
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LOADK t0, THREAD_BUADDR(t0) # t0 is just past last good address
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nop
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SUB len, AT, t0 # len number of uncopied bytes
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/*
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