KVM: VMX: Enable XSAVE/XRSTOR for guest
This patch enable guest to use XSAVE/XRSTOR instructions. We assume that host_xcr0 would use all possible bits that OS supported. And we loaded xcr0 in the same way we handled fpu - do it as late as we can. Signed-off-by: Dexuan Cui <dexuan.cui@intel.com> Signed-off-by: Sheng Yang <sheng@linux.intel.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Dexuan Cui
Avi Kivity
Родитель
f495c6e5e8
Коммит
2acf923e38
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@ -302,6 +302,7 @@ struct kvm_vcpu_arch {
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} update_pte;
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struct fpu guest_fpu;
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u64 xcr0;
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gva_t mmio_fault_cr2;
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struct kvm_pio_request pio;
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@ -605,6 +606,7 @@ int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
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unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
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void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
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void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
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int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
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int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
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int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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@ -267,6 +267,7 @@ enum vmcs_field {
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#define EXIT_REASON_EPT_VIOLATION 48
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#define EXIT_REASON_EPT_MISCONFIG 49
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#define EXIT_REASON_WBINVD 54
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#define EXIT_REASON_XSETBV 55
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/*
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* Interruption-information format
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@ -71,4 +71,10 @@ static inline ulong kvm_read_cr4(struct kvm_vcpu *vcpu)
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return kvm_read_cr4_bits(vcpu, ~0UL);
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}
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static inline u64 kvm_read_edx_eax(struct kvm_vcpu *vcpu)
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{
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return (kvm_register_read(vcpu, VCPU_REGS_RAX) & -1u)
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| ((u64)(kvm_register_read(vcpu, VCPU_REGS_RDX) & -1u) << 32);
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}
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#endif
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@ -37,6 +37,8 @@
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#include <asm/vmx.h>
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#include <asm/virtext.h>
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#include <asm/mce.h>
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#include <asm/i387.h>
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#include <asm/xcr.h>
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#include "trace.h"
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@ -3390,6 +3392,16 @@ static int handle_wbinvd(struct kvm_vcpu *vcpu)
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return 1;
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}
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static int handle_xsetbv(struct kvm_vcpu *vcpu)
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{
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u64 new_bv = kvm_read_edx_eax(vcpu);
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u32 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
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if (kvm_set_xcr(vcpu, index, new_bv) == 0)
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skip_emulated_instruction(vcpu);
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return 1;
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}
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static int handle_apic_access(struct kvm_vcpu *vcpu)
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{
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return emulate_instruction(vcpu, 0, 0, 0) == EMULATE_DONE;
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@ -3668,6 +3680,7 @@ static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = {
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[EXIT_REASON_TPR_BELOW_THRESHOLD] = handle_tpr_below_threshold,
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[EXIT_REASON_APIC_ACCESS] = handle_apic_access,
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[EXIT_REASON_WBINVD] = handle_wbinvd,
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[EXIT_REASON_XSETBV] = handle_xsetbv,
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[EXIT_REASON_TASK_SWITCH] = handle_task_switch,
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[EXIT_REASON_MCE_DURING_VMENTRY] = handle_machine_check,
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[EXIT_REASON_EPT_VIOLATION] = handle_ept_violation,
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@ -65,6 +65,7 @@
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXSAVE \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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@ -150,6 +151,13 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ NULL }
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};
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u64 __read_mostly host_xcr0;
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static inline u32 bit(int bitno)
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{
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return 1 << (bitno & 31);
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}
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static void kvm_on_user_return(struct user_return_notifier *urn)
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{
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unsigned slot;
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@ -474,6 +482,61 @@ void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
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}
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EXPORT_SYMBOL_GPL(kvm_lmsw);
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int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
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{
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u64 xcr0;
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/* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
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if (index != XCR_XFEATURE_ENABLED_MASK)
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return 1;
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xcr0 = xcr;
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if (kvm_x86_ops->get_cpl(vcpu) != 0)
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return 1;
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if (!(xcr0 & XSTATE_FP))
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return 1;
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if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
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return 1;
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if (xcr0 & ~host_xcr0)
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return 1;
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vcpu->arch.xcr0 = xcr0;
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vcpu->guest_xcr0_loaded = 0;
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return 0;
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}
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int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
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{
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if (__kvm_set_xcr(vcpu, index, xcr)) {
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kvm_inject_gp(vcpu, 0);
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return 1;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvm_set_xcr);
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static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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return best && (best->ecx & bit(X86_FEATURE_XSAVE));
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}
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static void update_cpuid(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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if (!best)
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return;
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/* Update OSXSAVE bit */
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if (cpu_has_xsave && best->function == 0x1) {
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best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
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if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
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best->ecx |= bit(X86_FEATURE_OSXSAVE);
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}
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}
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int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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unsigned long old_cr4 = kvm_read_cr4(vcpu);
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@ -482,6 +545,9 @@ int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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if (cr4 & CR4_RESERVED_BITS)
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return 1;
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if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
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return 1;
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if (is_long_mode(vcpu)) {
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if (!(cr4 & X86_CR4_PAE))
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return 1;
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@ -498,6 +564,9 @@ int __kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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if ((cr4 ^ old_cr4) & pdptr_bits)
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kvm_mmu_reset_context(vcpu);
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if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
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update_cpuid(vcpu);
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return 0;
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}
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@ -666,11 +735,6 @@ int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
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}
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EXPORT_SYMBOL_GPL(kvm_get_dr);
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static inline u32 bit(int bitno)
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{
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return 1 << (bitno & 31);
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}
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/*
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* List of msr numbers which we expose to userspace through KVM_GET_MSRS
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* and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
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@ -1814,6 +1878,7 @@ static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
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r = 0;
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kvm_apic_set_version(vcpu);
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kvm_x86_ops->cpuid_update(vcpu);
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update_cpuid(vcpu);
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out_free:
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vfree(cpuid_entries);
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@ -1837,6 +1902,7 @@ static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
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vcpu->arch.cpuid_nent = cpuid->nent;
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kvm_apic_set_version(vcpu);
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kvm_x86_ops->cpuid_update(vcpu);
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update_cpuid(vcpu);
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return 0;
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out:
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@ -1917,7 +1983,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
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0 /* Reserved, DCA */ | F(XMM4_1) |
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F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
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0 /* Reserved, XSAVE, OSXSAVE */;
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0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */;
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/* cpuid 0x80000001.ecx */
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const u32 kvm_supported_word6_x86_features =
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F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
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@ -1932,7 +1998,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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switch (function) {
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case 0:
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entry->eax = min(entry->eax, (u32)0xb);
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entry->eax = min(entry->eax, (u32)0xd);
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break;
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case 1:
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entry->edx &= kvm_supported_word0_x86_features;
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@ -1990,6 +2056,20 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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}
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break;
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}
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case 0xd: {
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int i;
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entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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for (i = 1; *nent < maxnent; ++i) {
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if (entry[i - 1].eax == 0 && i != 2)
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break;
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do_cpuid_1_ent(&entry[i], function, i);
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entry[i].flags |=
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KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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++*nent;
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}
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break;
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}
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case KVM_CPUID_SIGNATURE: {
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char signature[12] = "KVMKVMKVM\0\0";
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u32 *sigptr = (u32 *)signature;
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@ -4125,6 +4205,9 @@ int kvm_arch_init(void *opaque)
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perf_register_guest_info_callbacks(&kvm_guest_cbs);
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if (cpu_has_xsave)
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host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
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return 0;
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out:
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@ -4523,6 +4606,25 @@ static void inject_pending_event(struct kvm_vcpu *vcpu)
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}
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}
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static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
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{
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if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
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!vcpu->guest_xcr0_loaded) {
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/* kvm_set_xcr() also depends on this */
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xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
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vcpu->guest_xcr0_loaded = 1;
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}
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}
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static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
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{
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if (vcpu->guest_xcr0_loaded) {
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if (vcpu->arch.xcr0 != host_xcr0)
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xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
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vcpu->guest_xcr0_loaded = 0;
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}
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}
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static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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{
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int r;
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@ -4568,6 +4670,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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kvm_x86_ops->prepare_guest_switch(vcpu);
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if (vcpu->fpu_active)
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kvm_load_guest_fpu(vcpu);
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kvm_load_guest_xcr0(vcpu);
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atomic_set(&vcpu->guest_mode, 1);
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smp_wmb();
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@ -5124,6 +5227,11 @@ int fx_init(struct kvm_vcpu *vcpu)
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fpu_finit(&vcpu->arch.guest_fpu);
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/*
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* Ensure guest xcr0 is valid for loading
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*/
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vcpu->arch.xcr0 = XSTATE_FP;
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vcpu->arch.cr0 |= X86_CR0_ET;
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return 0;
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@ -5140,6 +5248,12 @@ void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
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if (vcpu->guest_fpu_loaded)
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return;
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/*
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* Restore all possible states in the guest,
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* and assume host would use all available bits.
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* Guest xcr0 would be loaded later.
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*/
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kvm_put_guest_xcr0(vcpu);
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vcpu->guest_fpu_loaded = 1;
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unlazy_fpu(current);
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fpu_restore_checking(&vcpu->arch.guest_fpu);
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@ -5148,6 +5262,8 @@ void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
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void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
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{
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kvm_put_guest_xcr0(vcpu);
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if (!vcpu->guest_fpu_loaded)
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return;
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@ -88,7 +88,7 @@ struct kvm_vcpu {
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int srcu_idx;
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int fpu_active;
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int guest_fpu_loaded;
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int guest_fpu_loaded, guest_xcr0_loaded;
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wait_queue_head_t wq;
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int sigset_active;
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sigset_t sigset;
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