ARM: omap2: fix am43xx dependency on l2x0 cache
Commit d941f86fad
("ARM: l2c: AM43x: add L2 cache support") enabled
the L2 cache support for the am43xx SoC, but caused a build regression
when the driver for that cache controller is disabled:
arch/arm/mach-omap2/built-in.o: In function `am43xx_init_early':
:(.init.text+0xb20): undefined reference to `omap_l2_cache_init'
This did not happen for OMAP4, which has the same call, but enables
the l2x0 driver unconditionally. We could do the same thing for
am43xx, but it seems better to allow turning it off and make the
code work in either case.
This adds an inline wrapper for omap_l2_cache_init for the disabled
case, and removes the 'select' from OMAP4 so it becomes a user
visible option.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
This commit is contained in:
Родитель
2dc24b0d06
Коммит
2ad501cc1d
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@ -32,6 +32,7 @@ CONFIG_SOC_OMAP5=y
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CONFIG_SOC_AM33XX=y
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CONFIG_SOC_AM43XX=y
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CONFIG_SOC_DRA7XX=y
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CONFIG_CACHE_L2X0=y
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CONFIG_ARM_THUMBEE=y
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CONFIG_ARM_ERRATA_411920=y
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CONFIG_SMP=y
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@ -28,7 +28,6 @@ config ARCH_OMAP4
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select ARM_CPU_SUSPEND if PM
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select ARM_ERRATA_720789
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select ARM_GIC
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select CACHE_L2X0
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select OMAP_INTERCONNECT
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@ -91,7 +91,14 @@ extern void omap3_sync32k_timer_init(void);
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extern void omap3_secure_sync32k_timer_init(void);
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extern void omap3_gptimer_timer_init(void);
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extern void omap4_local_timer_init(void);
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#ifdef CONFIG_CACHE_L2X0
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int omap_l2_cache_init(void);
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#else
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static inline int omap_l2_cache_init(void)
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{
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return 0;
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}
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#endif
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extern void omap5_realtime_timer_init(void);
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void omap2420_init_early(void);
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