i.MX DT bindings for 6.1:
- Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks GW7904 board, i.MX8DXL EVK Board. - Add add interconnect property for i.MX8MP various blk-ctrl devices. - Add i.MX8MP HDMI HDCP and HRV power domain DT IDs. - Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl. - A minor style fix on i.MX8MM clock binding header. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmMlhS4UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM6RGgf9EYZWreK87zuUb3F0ARa6Ac1uYS9R mWBz6WaVm5SQV/bIr6oSql7iIyrojAVb7FqusZ/d/YbP3WlhcCT5l7VhjjSE0LNi IZsyfl0fWEg+ro8MtwY/VnEcWH01eAgbqo6Hbu3oGKJqU5lwmhKD5gT1ctbtGWOA v6BlfB5iT/D+IexTeYz/NS2h6MZgVfLLVki82qjyokrUagVOmoPLjZhAlqJKJrHT khD1rfdeq56vGprd6juSvFQcNh5SvoKj8TqMlRSOA4peSPLChRSmRyRAYiNN6v8d HhHAeRc3XhDQlVxt9zWar981JxDDXHWooo2NIeNKB0bYiKjBGJtEeJ27qw== =7xMQ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtubAACgkQmmx57+YA GNk4IxAArqCHIy7vCDjx+SiQV8aiJNQzTlPIv6CRnnh/GpbAk0VwOFzd1q2zQPZl 3RJQF/r9y76V/1Nqvam3Bldly9lHl0BLXCSdJjJN7gDJ2HZLJFjLZr9PPd8lrq/F 1xCej6mDB1K/FgiQNVBhjjI+uw05PPF7eZgfpdgAYiWYXiSogk7IdR1LgiT5KzbB QSl19/BcrXc7G+wve5sFsJzCozQkn2aQo2phsYgbUZ5u1gTwLN3Y2Arq6iUjF0iR opnqEuWalBTUYvGZonrvBwg/BW2z9uiTJ1WUEIKSst4W7I2qYMSFG73KLR/KJela qflPNJ9y7Qy4TzQ7e3vWouXzIVZVfbp8IiIoWatFd907ii1omhnVkvSe/cVIpPvz eKlPVXQB7QKEH1ITmDIUy9dzYlZYbVKyx76E478yrRnzXDFIXvTbooqHZ2eiU2aY dSIttucqL/yeJZ28EZ9ZhMxLOYPjKkqwv+0DsmTwWSpEHEJAw0gGyOCPrmCdGdWr bK6CSKntPWiXgVMNstdgVdlyRJJr1udxUmYq5h2EBmE+bHBTkTf95ys4isxygXk7 edK+oc7iUeyVwQm4o7hnVuWEpLP97BCDaFV7Sa9+RkqJ2iKdLaVPD/VARjl/ypgZ u/DWpPFNOzabCPj0SD5osT/arXisEfatGTIgwO23swiJfDJlpiU= =D4U3 -----END PGP SIGNATURE----- Merge tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings for 6.1: - Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks GW7904 board, i.MX8DXL EVK Board. - Add add interconnect property for i.MX8MP various blk-ctrl devices. - Add i.MX8MP HDMI HDCP and HRV power domain DT IDs. - Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl. - A minor style fix on i.MX8MM clock binding header. * tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: imx: update fsl.yaml for imx8dxl dt-bindings: firmware: add missing resource IDs for imx8dxl dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board dt-bindings: soc: add i.MX93 mediamix blk ctrl dt-bindings: soc: add i.MX93 SRC dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV dt-bindings: arm: fsl: imx6ul-kontron: Update bindings dt-bindings: clk: imx8mm: don't use multiple blank lines dt-bindings: soc: imx: add interconnect property for i.MX8MP hsio blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MP hdmi blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MP media blk ctrl Link: https://lore.kernel.org/r/20220918092806.2152700-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Коммит
2b14d7da65
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@ -554,8 +554,7 @@ properties:
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|||
- engicam,imx6ul-isiot # Engicam Is.IoT MX6UL eMMC/NAND Starter kit
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- fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board
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- karo,imx6ul-tx6ul # Ka-Ro electronics TXUL-0010 Module
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- kontron,imx6ul-n6310-som # Kontron N6310 SOM
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- kontron,imx6ul-n6311-som # Kontron N6311 SOM
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- kontron,sl-imx6ul # Kontron SL i.MX6UL SoM
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- prt,prti6g # Protonic PRTI6G Board
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- technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf
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- technexion,imx6ul-pico-hobbit # TechNexion i.MX6UL Pico-Hobbit
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@ -591,23 +590,17 @@ properties:
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- const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL
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- const: fsl,imx6ul
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- description: Kontron N6310 S Board
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- description: Kontron BL i.MX6UL (N631X S) Board
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items:
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- const: kontron,imx6ul-n6310-s
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- const: kontron,imx6ul-n6310-som
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- const: kontron,bl-imx6ul # Kontron BL i.MX6UL Carrier Board
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- const: kontron,sl-imx6ul # Kontron SL i.MX6UL SoM
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- const: fsl,imx6ul
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- description: Kontron N6311 S Board
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- description: Kontron BL i.MX6UL 43 (N631X S 43) Board
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items:
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- const: kontron,imx6ul-n6311-s
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- const: kontron,imx6ul-n6311-som
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- const: fsl,imx6ul
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- description: Kontron N6310 S 43 Board
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items:
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- const: kontron,imx6ul-n6310-s-43
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- const: kontron,imx6ul-n6310-s
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- const: kontron,imx6ul-n6310-som
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- const: kontron,bl-imx6ul-43 # Kontron BL i.MX6UL Carrier Board with 4.3" Display
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- const: kontron,bl-imx6ul # Kontron BL i.MX6UL Carrier Board
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- const: kontron,sl-imx6ul # Kontron SL i.MX6UL SoM
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- const: fsl,imx6ul
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- description: TQ-Systems TQMa6UL1 SoM on MBa6ULx board
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@ -637,7 +630,7 @@ properties:
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- enum:
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- fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board
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- joz,jozacp # JOZ Access Point
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- kontron,imx6ull-n6411-som # Kontron N6411 SOM
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- kontron,sl-imx6ull # Kontron SL i.MX6ULL SoM
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- myir,imx6ull-mys-6ulx-eval # MYiR Tech iMX6ULL Evaluation Board
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- toradex,colibri-imx6ull # Colibri iMX6ULL Modules
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- toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module
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@ -698,10 +691,10 @@ properties:
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- const: toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Module
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- const: fsl,imx6ull
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- description: Kontron N6411 S Board
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- description: Kontron BL i.MX6ULL (N6411 S) Board
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items:
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- const: kontron,imx6ull-n6411-s
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- const: kontron,imx6ull-n6411-som
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- const: kontron,bl-imx6ull # Kontron BL i.MX6ULL Carrier Board
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- const: kontron,sl-imx6ull # Kontron SL i.MX6ULL SoM
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- const: fsl,imx6ull
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- description: TQ Systems TQMa6ULLx SoM on MBa6ULx board
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@ -825,13 +818,15 @@ properties:
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- emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base
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- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
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- fsl,imx8mm-evk # i.MX8MM EVK Board
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- gateworks,imx8mm-gw7904
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- gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
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- gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit
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- gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit
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- gw,imx8mm-gw7901 # i.MX8MM Gateworks Board
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- gw,imx8mm-gw7902 # i.MX8MM Gateworks Board
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- gw,imx8mm-gw7903 # i.MX8MM Gateworks Board
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- kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM
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- kontron,imx8mm-sl # i.MX8MM Kontron SL (N801X) SOM
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- kontron,imx8mm-osm-s # i.MX8MM Kontron OSM-S (N802X) SOM
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- menlo,mx8menlo # i.MX8MM Menlo board with Verdin SoM
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- toradex,verdin-imx8mm # Verdin iMX8M Mini Modules
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- toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT
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@ -850,8 +845,14 @@ properties:
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|||
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- description: Kontron BL i.MX8MM (N801X S) Board
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items:
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- const: kontron,imx8mm-n801x-s
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- const: kontron,imx8mm-n801x-som
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- const: kontron,imx8mm-bl
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- const: kontron,imx8mm-sl
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- const: fsl,imx8mm
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- description: Kontron BL i.MX8MM OSM-S (N802X S) Board
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items:
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- const: kontron,imx8mm-bl-osm-s
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- const: kontron,imx8mm-osm-s
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- const: fsl,imx8mm
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- description: Toradex Boards with Verdin iMX8M Mini Modules
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|
@ -936,6 +937,13 @@ properties:
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- toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules
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- const: fsl,imx8mp
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- description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules
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items:
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- const: avnet,sm2s-imx8mp-14N0600E-ep1 # SM2S-IMX8PLUS-14N0600E on SM2-MB-EP1 Carrier Board
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- const: avnet,sm2s-imx8mp-14N0600E # 14N0600E variant of SM2S-IMX8PLUS SoM
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- const: avnet,sm2s-imx8mp # SM2S-IMX8PLUS SoM
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- const: fsl,imx8mp
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- description: Engicam i.Core MX8M Plus SoM based boards
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items:
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- enum:
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|
@ -1034,6 +1042,12 @@ properties:
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- toradex,colibri-imx8x # Colibri iMX8X Modules
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- const: fsl,imx8qxp
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- description: i.MX8DXL based Boards
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items:
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- enum:
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- fsl,imx8dxl-evk # i.MX8DXL EVK Board
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- const: fsl,imx8dxl
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- description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules
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items:
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- enum:
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|
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@ -40,6 +40,8 @@ properties:
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- allwinner,sun50i-a64-system-controller
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- brcm,cru-clkset
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- freecom,fsg-cs2-system-controller
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- fsl,imx93-aonmix-ns-syscfg
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- fsl,imx93-wakeupmix-syscfg
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- hisilicon,dsa-subctrl
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- hisilicon,hi6220-sramctrl
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- hisilicon,pcie-sas-subctrl
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@ -27,9 +27,46 @@ properties:
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const: 1
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power-domains:
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minItems: 4
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maxItems: 4
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power-domain-names:
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maxItems: 4
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clocks:
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maxItems: 3
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clock-names:
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maxItems: 3
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interconnects:
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maxItems: 3
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interconnect-names:
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maxItems: 3
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required:
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- compatible
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- reg
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- power-domains
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- power-domain-names
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- clocks
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- clock-names
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: fsl,imx8mm-vpu-blk-ctrl
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then:
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properties:
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power-domains:
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items:
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- description: bus power domain
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- description: G1 decoder power domain
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- description: G2 decoder power domain
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- description: H1 encoder power domain
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power-domain-names:
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items:
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- const: bus
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@ -38,8 +75,10 @@ properties:
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- const: h1
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clocks:
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minItems: 3
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maxItems: 3
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items:
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- description: G1 decoder clk
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- description: G2 decoder clk
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- description: H1 encoder clk
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clock-names:
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items:
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@ -47,13 +86,62 @@ properties:
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- const: g2
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- const: h1
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required:
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- compatible
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- reg
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- power-domains
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- power-domain-names
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- clocks
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- clock-names
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interconnects:
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items:
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- description: G1 decoder interconnect
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- description: G2 decoder interconnect
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- description: H1 encoder power domain
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interconnect-names:
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items:
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- const: g1
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- const: g2
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- const: h1
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- if:
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properties:
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compatible:
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contains:
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const: fsl,imx8mp-vpu-blk-ctrl
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then:
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properties:
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power-domains:
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items:
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- description: bus power domain
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- description: G1 decoder power domain
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- description: G2 decoder power domain
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- description: VC8000E encoder power domain
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power-domain-names:
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items:
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- const: bus
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- const: g1
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- const: g2
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- const: vc8000e
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clocks:
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items:
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- description: G1 decoder clk
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||||
- description: G2 decoder clk
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||||
- description: VC8000E encoder clk
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||||
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clock-names:
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items:
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- const: g1
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||||
- const: g2
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||||
- const: vc8000e
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||||
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interconnects:
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||||
items:
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||||
- description: G1 decoder interconnect
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||||
- description: G2 decoder interconnect
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||||
- description: VC8000E encoder interconnect
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||||
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||||
interconnect-names:
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||||
items:
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- const: g1
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||||
- const: g2
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||||
- const: vc8000e
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||||
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||||
additionalProperties: false
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||||
|
||||
|
|
|
@ -52,6 +52,15 @@ properties:
|
|||
- const: ref_266m
|
||||
- const: ref_24m
|
||||
|
||||
interconnects:
|
||||
maxItems: 3
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: hrv
|
||||
- const: lcdif-hdmi
|
||||
- const: hdcp
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
@ -48,6 +48,16 @@ properties:
|
|||
- const: usb
|
||||
- const: pcie
|
||||
|
||||
interconnects:
|
||||
maxItems: 4
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: noc-pcie
|
||||
- const: usb1
|
||||
- const: usb2
|
||||
- const: pcie
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
@ -64,6 +64,20 @@ properties:
|
|||
- const: isp
|
||||
- const: phy
|
||||
|
||||
interconnects:
|
||||
maxItems: 8
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: lcdif-rd
|
||||
- const: lcdif-wr
|
||||
- const: isi0
|
||||
- const: isi1
|
||||
- const: isi2
|
||||
- const: isp0
|
||||
- const: isp1
|
||||
- const: dwe
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
@ -0,0 +1,80 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP i.MX93 Media blk-ctrl
|
||||
|
||||
maintainers:
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description:
|
||||
The i.MX93 MEDIAMIX domain contains control and status registers known
|
||||
as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include
|
||||
clocking, reset, and miscellaneous top-level controls for peripherals
|
||||
within the MEDIAMIX domain
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: fsl,imx93-media-blk-ctrl
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 10
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: apb
|
||||
- const: axi
|
||||
- const: nic
|
||||
- const: disp
|
||||
- const: cam
|
||||
- const: pxp
|
||||
- const: lcdif
|
||||
- const: isi
|
||||
- const: csi
|
||||
- const: dsi
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- power-domains
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx93-clock.h>
|
||||
#include <dt-bindings/power/fsl,imx93-power.h>
|
||||
|
||||
media_blk_ctrl: system-controller@4ac10000 {
|
||||
compatible = "fsl,imx93-media-blk-ctrl", "syscon";
|
||||
reg = <0x4ac10000 0x10000>;
|
||||
power-domains = <&mediamix>;
|
||||
clocks = <&clk IMX93_CLK_MEDIA_APB>,
|
||||
<&clk IMX93_CLK_MEDIA_AXI>,
|
||||
<&clk IMX93_CLK_NIC_MEDIA_GATE>,
|
||||
<&clk IMX93_CLK_MEDIA_DISP_PIX>,
|
||||
<&clk IMX93_CLK_CAM_PIX>,
|
||||
<&clk IMX93_CLK_PXP_GATE>,
|
||||
<&clk IMX93_CLK_LCDIF_GATE>,
|
||||
<&clk IMX93_CLK_ISI_GATE>,
|
||||
<&clk IMX93_CLK_MIPI_CSI_GATE>,
|
||||
<&clk IMX93_CLK_MIPI_DSI_GATE>;
|
||||
clock-names = "apb", "axi", "nic", "disp", "cam",
|
||||
"pxp", "lcdif", "isi", "csi", "dsi";
|
||||
#power-domain-cells = <1>;
|
||||
};
|
|
@ -0,0 +1,96 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP i.MX93 System Reset Controller
|
||||
|
||||
maintainers:
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description: |
|
||||
The System Reset Controller (SRC) is responsible for the generation of
|
||||
all the system reset signals and boot argument latching.
|
||||
|
||||
Its main functions are as follows,
|
||||
- Deals with all global system reset sources from other modules,
|
||||
and generates global system reset.
|
||||
- Responsible for power gating of MIXs (Slices) and their memory
|
||||
low power control.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: fsl,imx93-src
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
"power-domain@[0-9a-f]+$":
|
||||
|
||||
type: object
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: fsl,imx93-src-slice
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: mix slice register region
|
||||
- description: mem slice register region
|
||||
|
||||
clocks:
|
||||
description: |
|
||||
A number of phandles to clocks that need to be enabled
|
||||
during domain power-up sequencing to ensure reset
|
||||
propagation into devices located inside this power domain.
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#power-domain-cells'
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- ranges
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx93-clock.h>
|
||||
|
||||
system-controller@44460000 {
|
||||
compatible = "fsl,imx93-src", "syscon";
|
||||
reg = <0x44460000 0x10000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
mediamix: power-domain@0 {
|
||||
compatible = "fsl,imx93-src-slice";
|
||||
reg = <0x44462400 0x400>, <0x44465800 0x400>;
|
||||
#power-domain-cells = <0>;
|
||||
clocks = <&clk IMX93_CLK_MEDIA_AXI>,
|
||||
<&clk IMX93_CLK_MEDIA_APB>;
|
||||
};
|
||||
};
|
|
@ -281,7 +281,6 @@
|
|||
#define IMX8MM_CLK_CLKOUT2_DIV 256
|
||||
#define IMX8MM_CLK_CLKOUT2 257
|
||||
|
||||
|
||||
#define IMX8MM_CLK_END 258
|
||||
|
||||
#endif
|
||||
|
|
|
@ -37,10 +37,14 @@
|
|||
#define IMX_SC_R_DC_0_BLIT2 21
|
||||
#define IMX_SC_R_DC_0_BLIT_OUT 22
|
||||
#define IMX_SC_R_PERF 23
|
||||
#define IMX_SC_R_USB_1_PHY 24
|
||||
#define IMX_SC_R_DC_0_WARP 25
|
||||
#define IMX_SC_R_V2X_MU_0 26
|
||||
#define IMX_SC_R_V2X_MU_1 27
|
||||
#define IMX_SC_R_DC_0_VIDEO0 28
|
||||
#define IMX_SC_R_DC_0_VIDEO1 29
|
||||
#define IMX_SC_R_DC_0_FRAC0 30
|
||||
#define IMX_SC_R_V2X_MU_2 31
|
||||
#define IMX_SC_R_DC_0 32
|
||||
#define IMX_SC_R_GPU_2_PID0 33
|
||||
#define IMX_SC_R_DC_0_PLL_0 34
|
||||
|
@ -49,7 +53,10 @@
|
|||
#define IMX_SC_R_DC_1_BLIT1 37
|
||||
#define IMX_SC_R_DC_1_BLIT2 38
|
||||
#define IMX_SC_R_DC_1_BLIT_OUT 39
|
||||
#define IMX_SC_R_V2X_MU_3 40
|
||||
#define IMX_SC_R_V2X_MU_4 41
|
||||
#define IMX_SC_R_DC_1_WARP 42
|
||||
#define IMX_SC_R_SECVIO 44
|
||||
#define IMX_SC_R_DC_1_VIDEO0 45
|
||||
#define IMX_SC_R_DC_1_VIDEO1 46
|
||||
#define IMX_SC_R_DC_1_FRAC0 47
|
||||
|
|
|
@ -0,0 +1,15 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
|
||||
/*
|
||||
* Copyright 2022 NXP
|
||||
*/
|
||||
|
||||
#ifndef __DT_BINDINGS_IMX93_POWER_H__
|
||||
#define __DT_BINDINGS_IMX93_POWER_H__
|
||||
|
||||
#define IMX93_MEDIABLK_PD_MIPI_DSI 0
|
||||
#define IMX93_MEDIABLK_PD_MIPI_CSI 1
|
||||
#define IMX93_MEDIABLK_PD_PXP 2
|
||||
#define IMX93_MEDIABLK_PD_LCDIF 3
|
||||
#define IMX93_MEDIABLK_PD_ISI 4
|
||||
|
||||
#endif
|
|
@ -49,5 +49,11 @@
|
|||
#define IMX8MP_HDMIBLK_PD_TRNG 4
|
||||
#define IMX8MP_HDMIBLK_PD_HDMI_TX 5
|
||||
#define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY 6
|
||||
#define IMX8MP_HDMIBLK_PD_HDCP 7
|
||||
#define IMX8MP_HDMIBLK_PD_HRV 8
|
||||
|
||||
#define IMX8MP_VPUBLK_PD_G1 0
|
||||
#define IMX8MP_VPUBLK_PD_G2 1
|
||||
#define IMX8MP_VPUBLK_PD_VC8000E 2
|
||||
|
||||
#endif
|
||||
|
|
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