coresight tmc: Expose DBA and AXICTL
Expose DBALO,DBAHI and AXICTL registers Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -230,9 +230,11 @@ coresight_tmc_reg(ffsr, TMC_FFSR);
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coresight_tmc_reg(ffcr, TMC_FFCR);
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coresight_tmc_reg(mode, TMC_MODE);
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coresight_tmc_reg(pscr, TMC_PSCR);
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coresight_tmc_reg(axictl, TMC_AXICTL);
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coresight_tmc_reg(devid, CORESIGHT_DEVID);
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coresight_tmc_reg64(rrp, TMC_RRP, TMC_RRPHI);
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coresight_tmc_reg64(rwp, TMC_RWP, TMC_RWPHI);
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coresight_tmc_reg64(dba, TMC_DBALO, TMC_DBAHI);
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static struct attribute *coresight_tmc_mgmt_attrs[] = {
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&dev_attr_rsz.attr,
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@ -246,6 +248,8 @@ static struct attribute *coresight_tmc_mgmt_attrs[] = {
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&dev_attr_mode.attr,
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&dev_attr_pscr.attr,
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&dev_attr_devid.attr,
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&dev_attr_dba.attr,
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&dev_attr_axictl.attr,
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NULL,
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};
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