EDAC, sb_edac: Use cpu family/model in driver detection
Instead of picking a random PCI ID from the dozen or so we need to access, just use x86_match_cpu() to pick based on CPU model number. The choosing of PCI devices has been problematic in the past, see11249e7399("sb_edac: Fix detection on SNB machines") which fixed problems introduced byd0585cd815("sb_edac: Claim a different PCI device"). This is especially ugly if future hardware might not even have EDAC-relevant registers in PCI config space and we would still be required to choose some "random" PCI devices to scan for just so our driver loads. Is this cleaner/clearer? It deletes much more code than it adds. Only tested on Broadwell. The driver loads/unloads and loads again. Still decodes errors too. Signed-off-by: Tony Luck <tony.luck@intel.com> Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Tony Luck
Borislav Petkov
Родитель
5359534505
Коммит
2c1ea4c700
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@ -21,6 +21,8 @@
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#include <linux/smp.h>
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#include <linux/bitmap.h>
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#include <linux/math64.h>
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#include <linux/mod_devicetable.h>
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#include <asm/cpu_device_id.h>
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#include <asm/processor.h>
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#include <asm/mce.h>
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@ -28,8 +30,6 @@
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/* Static vars */
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static LIST_HEAD(sbridge_edac_list);
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static DEFINE_MUTEX(sbridge_edac_lock);
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static int probed;
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/*
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* Alter this version for the module when modifications are made
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@ -651,18 +651,6 @@ static const struct pci_id_table pci_dev_descr_broadwell_table[] = {
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{0,} /* 0 terminated list. */
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};
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/*
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* pci_device_id table for which devices we are looking for
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*/
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static const struct pci_device_id sbridge_pci_tbl[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA0_TA)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HASWELL_IMC_HA0)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROADWELL_IMC_HA0)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KNL_IMC_SAD0)},
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{0,} /* 0 terminated list. */
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};
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/****************************************************************************
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Ancillary status routines
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@ -3344,62 +3332,40 @@ fail0:
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return rc;
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}
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#define ICPU(model, table) \
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{ X86_VENDOR_INTEL, 6, model, 0, (unsigned long)&table }
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/* Order here must match "enum type" */
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static const struct x86_cpu_id sbridge_cpuids[] = {
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ICPU(0x2d, pci_dev_descr_sbridge_table), /* SANDY_BRIDGE */
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ICPU(0x3e, pci_dev_descr_ibridge_table), /* IVY_BRIDGE */
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ICPU(0x3f, pci_dev_descr_haswell_table), /* HASWELL */
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ICPU(0x4f, pci_dev_descr_broadwell_table), /* BROADWELL */
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ICPU(0x57, pci_dev_descr_knl_table), /* KNIGHTS_LANDING */
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{ }
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};
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MODULE_DEVICE_TABLE(x86cpu, sbridge_cpuids);
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/*
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* sbridge_probe Probe for ONE instance of device to see if it is
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* sbridge_probe Get all devices and register memory controllers
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* present.
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* return:
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* 0 for FOUND a device
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* < 0 for error code
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*/
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static int sbridge_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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static int sbridge_probe(const struct x86_cpu_id *id)
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{
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int rc = -ENODEV;
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u8 mc, num_mc = 0;
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struct sbridge_dev *sbridge_dev;
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enum type type = SANDY_BRIDGE;
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struct pci_id_table *ptable = (struct pci_id_table *)id->driver_data;
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/* get the pci devices we want to reserve for our use */
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mutex_lock(&sbridge_edac_lock);
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rc = sbridge_get_all_devices(&num_mc, ptable);
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/*
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* All memory controllers are allocated at the first pass.
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*/
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if (unlikely(probed >= 1)) {
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mutex_unlock(&sbridge_edac_lock);
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return -ENODEV;
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}
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probed++;
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA0_TA:
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rc = sbridge_get_all_devices(&num_mc,
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pci_dev_descr_ibridge_table);
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type = IVY_BRIDGE;
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break;
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case PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0:
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rc = sbridge_get_all_devices(&num_mc,
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pci_dev_descr_sbridge_table);
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type = SANDY_BRIDGE;
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break;
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case PCI_DEVICE_ID_INTEL_HASWELL_IMC_HA0:
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rc = sbridge_get_all_devices(&num_mc,
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pci_dev_descr_haswell_table);
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type = HASWELL;
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break;
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case PCI_DEVICE_ID_INTEL_BROADWELL_IMC_HA0:
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rc = sbridge_get_all_devices(&num_mc,
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pci_dev_descr_broadwell_table);
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type = BROADWELL;
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break;
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case PCI_DEVICE_ID_INTEL_KNL_IMC_SAD0:
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rc = sbridge_get_all_devices_knl(&num_mc,
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pci_dev_descr_knl_table);
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type = KNIGHTS_LANDING;
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break;
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}
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if (unlikely(rc < 0)) {
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edac_dbg(0, "couldn't get all devices for 0x%x\n", pdev->device);
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edac_dbg(0, "couldn't get all devices\n");
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goto fail0;
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}
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@ -3410,14 +3376,13 @@ static int sbridge_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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mc, mc + 1, num_mc);
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sbridge_dev->mc = mc++;
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rc = sbridge_register_mci(sbridge_dev, type);
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rc = sbridge_register_mci(sbridge_dev, id - sbridge_cpuids);
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if (unlikely(rc < 0))
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goto fail1;
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}
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sbridge_printk(KERN_INFO, "%s\n", SBRIDGE_REVISION);
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mutex_unlock(&sbridge_edac_lock);
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return 0;
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fail1:
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@ -3426,74 +3391,47 @@ fail1:
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sbridge_put_all_devices();
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fail0:
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mutex_unlock(&sbridge_edac_lock);
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return rc;
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}
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/*
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* sbridge_remove destructor for one instance of device
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* sbridge_remove cleanup
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*
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*/
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static void sbridge_remove(struct pci_dev *pdev)
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static void sbridge_remove(void)
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{
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struct sbridge_dev *sbridge_dev;
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edac_dbg(0, "\n");
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/*
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* we have a trouble here: pdev value for removal will be wrong, since
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* it will point to the X58 register used to detect that the machine
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* is a Nehalem or upper design. However, due to the way several PCI
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* devices are grouped together to provide MC functionality, we need
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* to use a different method for releasing the devices
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*/
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mutex_lock(&sbridge_edac_lock);
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if (unlikely(!probed)) {
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mutex_unlock(&sbridge_edac_lock);
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return;
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}
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list_for_each_entry(sbridge_dev, &sbridge_edac_list, list)
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sbridge_unregister_mci(sbridge_dev);
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/* Release PCI resources */
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sbridge_put_all_devices();
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probed--;
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mutex_unlock(&sbridge_edac_lock);
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}
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MODULE_DEVICE_TABLE(pci, sbridge_pci_tbl);
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/*
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* sbridge_driver pci_driver structure for this module
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*
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*/
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static struct pci_driver sbridge_driver = {
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.name = "sbridge_edac",
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.probe = sbridge_probe,
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.remove = sbridge_remove,
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.id_table = sbridge_pci_tbl,
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};
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/*
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* sbridge_init Module entry function
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* Try to initialize this module for its devices
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*/
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static int __init sbridge_init(void)
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{
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int pci_rc;
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const struct x86_cpu_id *id;
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int rc;
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edac_dbg(2, "\n");
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id = x86_match_cpu(sbridge_cpuids);
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if (!id)
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return -ENODEV;
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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pci_rc = pci_register_driver(&sbridge_driver);
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if (pci_rc >= 0) {
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rc = sbridge_probe(id);
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if (rc >= 0) {
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mce_register_decode_chain(&sbridge_mce_dec);
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if (get_edac_report_status() == EDAC_REPORTING_DISABLED)
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sbridge_printk(KERN_WARNING, "Loading driver, error reporting disabled.\n");
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@ -3501,9 +3439,9 @@ static int __init sbridge_init(void)
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}
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sbridge_printk(KERN_ERR, "Failed to register device with error %d.\n",
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pci_rc);
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rc);
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return pci_rc;
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return rc;
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}
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/*
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@ -3513,7 +3451,7 @@ static int __init sbridge_init(void)
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static void __exit sbridge_exit(void)
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{
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edac_dbg(2, "\n");
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pci_unregister_driver(&sbridge_driver);
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sbridge_remove();
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mce_unregister_decode_chain(&sbridge_mce_dec);
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}
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