ALSA: hda - Avoid tricky macros
The macros _snd_hdac_chip_read() and *_write() expand to different types (b,w,l) per their argument. They were thought to be used only internally for other snd_hdac_chip_*() macros, but in some situations we need to call these directly, and they are way too ugly. Instead of saving a few lines, we just write these macros explicitly with the types, so that they can be used in a saner way. Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -368,24 +368,32 @@ void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
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/*
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* macros for easy use
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*/
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#define _snd_hdac_chip_write(type, chip, reg, value) \
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((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_read(type, chip, reg) \
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((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_writeb(chip, reg, value) \
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((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_readb(chip, reg) \
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((chip)->io_ops->reg_readb((chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_writew(chip, reg, value) \
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((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_readw(chip, reg) \
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((chip)->io_ops->reg_readw((chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_writel(chip, reg, value) \
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((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg)))
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#define _snd_hdac_chip_readl(chip, reg) \
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((chip)->io_ops->reg_readl((chip)->remap_addr + (reg)))
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/* read/write a register, pass without AZX_REG_ prefix */
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#define snd_hdac_chip_writel(chip, reg, value) \
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_snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
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_snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
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#define snd_hdac_chip_writew(chip, reg, value) \
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_snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
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_snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
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#define snd_hdac_chip_writeb(chip, reg, value) \
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_snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
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_snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
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#define snd_hdac_chip_readl(chip, reg) \
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_snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
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_snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
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#define snd_hdac_chip_readw(chip, reg) \
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_snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
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_snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
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#define snd_hdac_chip_readb(chip, reg) \
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_snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
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_snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
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/* update a register, pass without AZX_REG_ prefix */
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#define snd_hdac_chip_updatel(chip, reg, mask, val) \
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@ -272,7 +272,7 @@ int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus)
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/* Lets walk the linked capabilities list */
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do {
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cur_cap = _snd_hdac_chip_read(l, bus, offset);
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cur_cap = _snd_hdac_chip_readl(bus, offset);
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dev_dbg(bus->dev, "Capability version: 0x%x\n",
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(cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF);
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@ -555,12 +555,12 @@ void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
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if (!reg)
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reg = AZX_REG_SSYNC;
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val = _snd_hdac_chip_read(l, bus, reg);
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val = _snd_hdac_chip_readl(bus, reg);
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if (set)
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val |= streams;
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else
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val &= ~streams;
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_snd_hdac_chip_write(l, bus, reg, val);
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_snd_hdac_chip_writel(bus, reg, val);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_stream_sync_trigger);
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