SPARC64: sg chaining support
This updates the sparc64 iommu/pci dma mappers to sg chaining. Acked-by: David S. Miller <davem@davemloft.net> Later updated to newer kernel with unified sparc64 iommu sg handling. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
This commit is contained in:
Jens Axboe
Родитель
0912a5db0e
Коммит
2c941a2040
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@ -10,6 +10,7 @@
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/errno.h>
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#include <linux/scatterlist.h>
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#ifdef CONFIG_PCI
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#include <linux/pci.h>
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@ -480,7 +481,7 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
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unsigned long iopte_protection)
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{
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struct scatterlist *dma_sg = sg;
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struct scatterlist *sg_end = sg + nelems;
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struct scatterlist *sg_end = sg_last(sg, nelems);
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int i;
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for (i = 0; i < nused; i++) {
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@ -515,7 +516,7 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
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len -= (IO_PAGE_SIZE - (tmp & (IO_PAGE_SIZE - 1UL)));
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break;
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}
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sg++;
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sg = sg_next(sg);
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}
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pteval = iopte_protection | (pteval & IOPTE_PAGE);
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@ -528,24 +529,24 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
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}
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pteval = (pteval & IOPTE_PAGE) + len;
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sg++;
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sg = sg_next(sg);
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/* Skip over any tail mappings we've fully mapped,
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* adjusting pteval along the way. Stop when we
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* detect a page crossing event.
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*/
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while (sg < sg_end &&
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while (sg != sg_end &&
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(pteval << (64 - IO_PAGE_SHIFT)) != 0UL &&
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(pteval == SG_ENT_PHYS_ADDRESS(sg)) &&
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((pteval ^
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(SG_ENT_PHYS_ADDRESS(sg) + sg->length - 1UL)) >> IO_PAGE_SHIFT) == 0UL) {
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pteval += sg->length;
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sg++;
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sg = sg_next(sg);
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}
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if ((pteval << (64 - IO_PAGE_SHIFT)) == 0UL)
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pteval = ~0UL;
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} while (dma_npages != 0);
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dma_sg++;
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dma_sg = sg_next(dma_sg);
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}
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}
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@ -606,7 +607,7 @@ static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist,
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sgtmp = sglist;
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while (used && sgtmp->dma_length) {
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sgtmp->dma_address += dma_base;
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sgtmp++;
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sgtmp = sg_next(sgtmp);
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used--;
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}
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used = nelems - used;
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@ -642,6 +643,7 @@ static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist,
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struct strbuf *strbuf;
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iopte_t *base;
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unsigned long flags, ctx, i, npages;
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struct scatterlist *sg, *sgprv;
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u32 bus_addr;
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if (unlikely(direction == DMA_NONE)) {
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@ -654,11 +656,14 @@ static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist,
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bus_addr = sglist->dma_address & IO_PAGE_MASK;
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for (i = 1; i < nelems; i++)
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if (sglist[i].dma_length == 0)
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sgprv = NULL;
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for_each_sg(sglist, sg, nelems, i) {
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if (sg->dma_length == 0)
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break;
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i--;
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npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) -
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sgprv = sg;
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}
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npages = (IO_PAGE_ALIGN(sgprv->dma_address + sgprv->dma_length) -
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bus_addr) >> IO_PAGE_SHIFT;
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base = iommu->page_table +
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@ -730,6 +735,7 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev,
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struct iommu *iommu;
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struct strbuf *strbuf;
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unsigned long flags, ctx, npages, i;
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struct scatterlist *sg, *sgprv;
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u32 bus_addr;
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iommu = dev->archdata.iommu;
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@ -753,11 +759,14 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev,
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/* Step 2: Kick data out of streaming buffers. */
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bus_addr = sglist[0].dma_address & IO_PAGE_MASK;
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for(i = 1; i < nelems; i++)
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if (!sglist[i].dma_length)
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sgprv = NULL;
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for_each_sg(sglist, sg, nelems, i) {
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if (sg->dma_length == 0)
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break;
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i--;
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npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length)
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sgprv = sg;
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}
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npages = (IO_PAGE_ALIGN(sgprv->dma_address + sgprv->dma_length)
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- bus_addr) >> IO_PAGE_SHIFT;
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strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction);
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@ -13,6 +13,7 @@
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#include <linux/irq.h>
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#include <linux/msi.h>
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#include <linux/log2.h>
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#include <linux/scatterlist.h>
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#include <asm/iommu.h>
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#include <asm/irq.h>
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@ -373,7 +374,7 @@ static inline long fill_sg(long entry, struct device *dev,
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int nused, int nelems, unsigned long prot)
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{
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struct scatterlist *dma_sg = sg;
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struct scatterlist *sg_end = sg + nelems;
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struct scatterlist *sg_end = sg_last(sg, nelems);
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unsigned long flags;
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int i;
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@ -413,7 +414,7 @@ static inline long fill_sg(long entry, struct device *dev,
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len -= (IO_PAGE_SIZE - (tmp & (IO_PAGE_SIZE - 1UL)));
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break;
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}
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sg++;
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sg = sg_next(sg);
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}
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pteval = (pteval & IOPTE_PAGE);
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@ -431,24 +432,25 @@ static inline long fill_sg(long entry, struct device *dev,
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}
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pteval = (pteval & IOPTE_PAGE) + len;
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sg++;
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sg = sg_next(sg);
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/* Skip over any tail mappings we've fully mapped,
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* adjusting pteval along the way. Stop when we
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* detect a page crossing event.
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*/
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while (sg < sg_end &&
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(pteval << (64 - IO_PAGE_SHIFT)) != 0UL &&
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while ((pteval << (64 - IO_PAGE_SHIFT)) != 0UL &&
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(pteval == SG_ENT_PHYS_ADDRESS(sg)) &&
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((pteval ^
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(SG_ENT_PHYS_ADDRESS(sg) + sg->length - 1UL)) >> IO_PAGE_SHIFT) == 0UL) {
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pteval += sg->length;
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sg++;
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if (sg == sg_end)
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break;
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sg = sg_next(sg);
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}
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if ((pteval << (64 - IO_PAGE_SHIFT)) == 0UL)
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pteval = ~0UL;
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} while (dma_npages != 0);
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dma_sg++;
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dma_sg = sg_next(dma_sg);
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}
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if (unlikely(iommu_batch_end() < 0L))
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@ -510,7 +512,7 @@ static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist,
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sgtmp = sglist;
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while (used && sgtmp->dma_length) {
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sgtmp->dma_address += dma_base;
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sgtmp++;
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sgtmp = sg_next(sgtmp);
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used--;
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}
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used = nelems - used;
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@ -545,6 +547,7 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist,
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struct pci_pbm_info *pbm;
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struct iommu *iommu;
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unsigned long flags, i, npages;
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struct scatterlist *sg, *sgprv;
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long entry;
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u32 devhandle, bus_addr;
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@ -558,12 +561,15 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist,
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devhandle = pbm->devhandle;
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bus_addr = sglist->dma_address & IO_PAGE_MASK;
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for (i = 1; i < nelems; i++)
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if (sglist[i].dma_length == 0)
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sgprv = NULL;
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for_each_sg(sglist, sg, nelems, i) {
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if (sg->dma_length == 0)
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break;
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i--;
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npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) -
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sgprv = sg;
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}
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npages = (IO_PAGE_ALIGN(sgprv->dma_address + sgprv->dma_length) -
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bus_addr) >> IO_PAGE_SHIFT;
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entry = ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
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@ -20,4 +20,6 @@ struct scatterlist {
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#define ISA_DMA_THRESHOLD (~0UL)
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#define ARCH_HAS_SG_CHAIN
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#endif /* !(_SPARC64_SCATTERLIST_H) */
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