can: mcp251x: add GPIO support
The mcp251x variants feature 3 general purpose digital inputs and 2 outputs. With this patch they are accessible through the gpio framework. Signed-off-by: Timo Schlüßler <schluessler@krause.de> Tested-by: Timo Schlüßler <schluessler@krause.de> Link: https://lore.kernel.org/r/20200915223527.1417033-28-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -19,6 +19,7 @@
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* Copyright 2007
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*/
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#include <linux/bitfield.h>
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#include <linux/can/core.h>
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#include <linux/can/dev.h>
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#include <linux/can/led.h>
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@ -27,6 +28,8 @@
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/freezer.h>
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#include <linux/gpio.h>
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#include <linux/gpio/driver.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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@ -52,6 +55,30 @@
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#define INSTRUCTION_RTS(n) (0x80 | ((n) & 0x07))
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/* MPC251x registers */
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#define BFPCTRL 0x0c
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# define BFPCTRL_B0BFM BIT(0)
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# define BFPCTRL_B1BFM BIT(1)
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# define BFPCTRL_BFM(n) (BFPCTRL_B0BFM << (n))
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# define BFPCTRL_BFM_MASK GENMASK(1, 0)
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# define BFPCTRL_B0BFE BIT(2)
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# define BFPCTRL_B1BFE BIT(3)
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# define BFPCTRL_BFE(n) (BFPCTRL_B0BFE << (n))
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# define BFPCTRL_BFE_MASK GENMASK(3, 2)
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# define BFPCTRL_B0BFS BIT(4)
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# define BFPCTRL_B1BFS BIT(5)
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# define BFPCTRL_BFS(n) (BFPCTRL_B0BFS << (n))
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# define BFPCTRL_BFS_MASK GENMASK(5, 4)
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#define TXRTSCTRL 0x0d
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# define TXRTSCTRL_B0RTSM BIT(0)
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# define TXRTSCTRL_B1RTSM BIT(1)
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# define TXRTSCTRL_B2RTSM BIT(2)
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# define TXRTSCTRL_RTSM(n) (TXRTSCTRL_B0RTSM << (n))
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# define TXRTSCTRL_RTSM_MASK GENMASK(2, 0)
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# define TXRTSCTRL_B0RTS BIT(3)
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# define TXRTSCTRL_B1RTS BIT(4)
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# define TXRTSCTRL_B2RTS BIT(5)
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# define TXRTSCTRL_RTS(n) (TXRTSCTRL_B0RTS << (n))
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# define TXRTSCTRL_RTS_MASK GENMASK(5, 3)
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#define CANSTAT 0x0e
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#define CANCTRL 0x0f
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# define CANCTRL_REQOP_MASK 0xe0
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@ -225,6 +252,10 @@ struct mcp251x_priv {
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struct regulator *power;
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struct regulator *transceiver;
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struct clk *clk;
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#ifdef CONFIG_GPIOLIB
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struct gpio_chip gpio;
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u8 reg_bfpctrl;
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#endif
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};
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#define MCP251X_IS(_model) \
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@ -345,6 +376,213 @@ static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
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mcp251x_spi_trans(spi, 4);
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}
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#ifdef CONFIG_GPIOLIB
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enum {
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MCP251X_GPIO_TX0RTS = 0, /* inputs */
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MCP251X_GPIO_TX1RTS,
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MCP251X_GPIO_TX2RTS,
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MCP251X_GPIO_RX0BF, /* outputs */
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MCP251X_GPIO_RX1BF,
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};
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#define MCP251X_GPIO_INPUT_MASK \
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GENMASK(MCP251X_GPIO_TX2RTS, MCP251X_GPIO_TX0RTS)
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#define MCP251X_GPIO_OUTPUT_MASK \
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GENMASK(MCP251X_GPIO_RX1BF, MCP251X_GPIO_RX0BF)
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static const char * const mcp251x_gpio_names[] = {
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[MCP251X_GPIO_TX0RTS] = "TX0RTS", /* inputs */
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[MCP251X_GPIO_TX1RTS] = "TX1RTS",
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[MCP251X_GPIO_TX2RTS] = "TX2RTS",
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[MCP251X_GPIO_RX0BF] = "RX0BF", /* outputs */
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[MCP251X_GPIO_RX1BF] = "RX1BF",
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};
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static inline bool mcp251x_gpio_is_input(unsigned int offset)
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{
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return offset <= MCP251X_GPIO_TX2RTS;
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}
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static int mcp251x_gpio_request(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct mcp251x_priv *priv = gpiochip_get_data(chip);
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u8 val;
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/* nothing to be done for inputs */
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if (mcp251x_gpio_is_input(offset))
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return 0;
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val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);
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mutex_lock(&priv->mcp_lock);
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mcp251x_write_bits(priv->spi, BFPCTRL, val, val);
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mutex_unlock(&priv->mcp_lock);
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priv->reg_bfpctrl |= val;
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return 0;
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}
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static void mcp251x_gpio_free(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct mcp251x_priv *priv = gpiochip_get_data(chip);
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u8 val;
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/* nothing to be done for inputs */
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if (mcp251x_gpio_is_input(offset))
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return;
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val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);
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mutex_lock(&priv->mcp_lock);
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mcp251x_write_bits(priv->spi, BFPCTRL, val, 0);
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mutex_unlock(&priv->mcp_lock);
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priv->reg_bfpctrl &= ~val;
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}
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static int mcp251x_gpio_get_direction(struct gpio_chip *chip,
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unsigned int offset)
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{
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if (mcp251x_gpio_is_input(offset))
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return GPIOF_DIR_IN;
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return GPIOF_DIR_OUT;
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}
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static int mcp251x_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct mcp251x_priv *priv = gpiochip_get_data(chip);
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u8 reg, mask, val;
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if (mcp251x_gpio_is_input(offset)) {
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reg = TXRTSCTRL;
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mask = TXRTSCTRL_RTS(offset);
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} else {
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reg = BFPCTRL;
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mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);
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}
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mutex_lock(&priv->mcp_lock);
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val = mcp251x_read_reg(priv->spi, reg);
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mutex_unlock(&priv->mcp_lock);
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return !!(val & mask);
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}
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static int mcp251x_gpio_get_multiple(struct gpio_chip *chip,
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unsigned long *maskp, unsigned long *bitsp)
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{
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struct mcp251x_priv *priv = gpiochip_get_data(chip);
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unsigned long bits = 0;
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u8 val;
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mutex_lock(&priv->mcp_lock);
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if (maskp[0] & MCP251X_GPIO_INPUT_MASK) {
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val = mcp251x_read_reg(priv->spi, TXRTSCTRL);
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val = FIELD_GET(TXRTSCTRL_RTS_MASK, val);
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bits |= FIELD_PREP(MCP251X_GPIO_INPUT_MASK, val);
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}
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if (maskp[0] & MCP251X_GPIO_OUTPUT_MASK) {
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val = mcp251x_read_reg(priv->spi, BFPCTRL);
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val = FIELD_GET(BFPCTRL_BFS_MASK, val);
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bits |= FIELD_PREP(MCP251X_GPIO_OUTPUT_MASK, val);
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}
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mutex_unlock(&priv->mcp_lock);
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bitsp[0] = bits;
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return 0;
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}
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static void mcp251x_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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struct mcp251x_priv *priv = gpiochip_get_data(chip);
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u8 mask, val;
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mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);
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val = value ? mask : 0;
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mutex_lock(&priv->mcp_lock);
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mcp251x_write_bits(priv->spi, BFPCTRL, mask, val);
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mutex_unlock(&priv->mcp_lock);
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priv->reg_bfpctrl &= ~mask;
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priv->reg_bfpctrl |= val;
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}
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static void
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mcp251x_gpio_set_multiple(struct gpio_chip *chip,
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unsigned long *maskp, unsigned long *bitsp)
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{
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struct mcp251x_priv *priv = gpiochip_get_data(chip);
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u8 mask, val;
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mask = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, maskp[0]);
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mask = FIELD_PREP(BFPCTRL_BFS_MASK, mask);
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val = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, bitsp[0]);
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val = FIELD_PREP(BFPCTRL_BFS_MASK, val);
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if (!mask)
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return;
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mutex_lock(&priv->mcp_lock);
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mcp251x_write_bits(priv->spi, BFPCTRL, mask, val);
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mutex_unlock(&priv->mcp_lock);
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priv->reg_bfpctrl &= ~mask;
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priv->reg_bfpctrl |= val;
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}
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static void mcp251x_gpio_restore(struct spi_device *spi)
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{
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struct mcp251x_priv *priv = spi_get_drvdata(spi);
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mcp251x_write_reg(spi, BFPCTRL, priv->reg_bfpctrl);
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}
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static int mcp251x_gpio_setup(struct mcp251x_priv *priv)
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{
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struct gpio_chip *gpio = &priv->gpio;
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if (!device_property_present(&priv->spi->dev, "gpio-controller"))
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return 0;
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/* gpiochip handles TX[0..2]RTS and RX[0..1]BF */
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gpio->label = priv->spi->modalias;
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gpio->parent = &priv->spi->dev;
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gpio->owner = THIS_MODULE;
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gpio->request = mcp251x_gpio_request;
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gpio->free = mcp251x_gpio_free;
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gpio->get_direction = mcp251x_gpio_get_direction;
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gpio->get = mcp251x_gpio_get;
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gpio->get_multiple = mcp251x_gpio_get_multiple;
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gpio->set = mcp251x_gpio_set;
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gpio->set_multiple = mcp251x_gpio_set_multiple;
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gpio->base = -1;
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gpio->ngpio = ARRAY_SIZE(mcp251x_gpio_names);
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gpio->names = mcp251x_gpio_names;
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gpio->can_sleep = true;
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#ifdef CONFIG_OF_GPIO
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gpio->of_node = priv->spi->dev.of_node;
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#endif
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return devm_gpiochip_add_data(&priv->spi->dev, gpio, priv);
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}
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#else
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static inline void mcp251x_gpio_restore(struct spi_device *spi)
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{
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}
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static inline int mcp251x_gpio_setup(struct mcp251x_priv *priv)
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{
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return 0;
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}
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#endif
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static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,
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int len, int tx_buf_idx)
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{
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if (priv->after_suspend & AFTER_SUSPEND_POWER) {
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mcp251x_hw_reset(spi);
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mcp251x_setup(net, spi);
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mcp251x_gpio_restore(spi);
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} else {
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mcp251x_hw_wake(spi);
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}
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@ -1136,6 +1375,10 @@ static int mcp251x_can_probe(struct spi_device *spi)
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devm_can_led_init(net);
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ret = mcp251x_gpio_setup(priv);
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if (ret)
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goto error_probe;
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netdev_info(net, "MCP%x successfully initialized.\n", priv->model);
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return 0;
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