Merge branch 'nvme-5.4' of git://git.infradead.org/nvme into for-linus
Pull NVMe changes from Sagi: "This set consists of various fixes and cleanups: - controller removal race fix from Balbir - quirk additions from Gabriel and Jian-Hong - nvme-pci power state save fix from Mario - Add 64bit user commands (for 64bit registers) from Marta - nvme-rdma/nvme-tcp fixes from Max, Mark and Me - Minor cleanups and nits from James, Dan and John" * 'nvme-5.4' of git://git.infradead.org/nvme: nvme-rdma: fix possible use-after-free in connect timeout nvme: Move ctrl sqsize to generic space nvme: Add ctrl attributes for queue_count and sqsize nvme: allow 64-bit results in passthru commands nvme: Add quirk for Kingston NVME SSD running FW E8FK11.T nvmet-tcp: remove superflous check on request sgl Added QUIRKs for ADATA XPG SX8200 Pro 512GB nvme-rdma: Fix max_hw_sectors calculation nvme: fix an error code in nvme_init_subsystem() nvme-pci: Save PCI state before putting drive into deepest state nvme-tcp: fix wrong stop condition in io_work nvme-pci: Fix a race in controller removal nvmet: change ppl to lpp
This commit is contained in:
Jens Axboe
Коммит
2d5ba0c712
|
|
@ -102,10 +102,13 @@ static void nvme_set_queue_dying(struct nvme_ns *ns)
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*/
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if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
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return;
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revalidate_disk(ns->disk);
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blk_set_queue_dying(ns->queue);
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/* Forcibly unquiesce queues to avoid blocking dispatch */
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blk_mq_unquiesce_queue(ns->queue);
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/*
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* Revalidate after unblocking dispatchers that may be holding bd_butex
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*/
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revalidate_disk(ns->disk);
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}
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static void nvme_queue_scan(struct nvme_ctrl *ctrl)
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@ -847,7 +850,7 @@ out:
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static int nvme_submit_user_cmd(struct request_queue *q,
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struct nvme_command *cmd, void __user *ubuffer,
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unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
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u32 meta_seed, u32 *result, unsigned timeout)
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u32 meta_seed, u64 *result, unsigned timeout)
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{
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bool write = nvme_is_write(cmd);
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struct nvme_ns *ns = q->queuedata;
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@ -888,7 +891,7 @@ static int nvme_submit_user_cmd(struct request_queue *q,
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else
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ret = nvme_req(req)->status;
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if (result)
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*result = le32_to_cpu(nvme_req(req)->result.u32);
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*result = le64_to_cpu(nvme_req(req)->result.u64);
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if (meta && !ret && !write) {
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if (copy_to_user(meta_buffer, meta, meta_len))
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ret = -EFAULT;
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@ -1335,6 +1338,54 @@ static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
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struct nvme_command c;
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unsigned timeout = 0;
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u32 effects;
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u64 result;
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int status;
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if (!capable(CAP_SYS_ADMIN))
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return -EACCES;
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if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
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return -EFAULT;
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if (cmd.flags)
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return -EINVAL;
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memset(&c, 0, sizeof(c));
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c.common.opcode = cmd.opcode;
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c.common.flags = cmd.flags;
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c.common.nsid = cpu_to_le32(cmd.nsid);
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c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
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c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
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c.common.cdw10 = cpu_to_le32(cmd.cdw10);
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c.common.cdw11 = cpu_to_le32(cmd.cdw11);
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c.common.cdw12 = cpu_to_le32(cmd.cdw12);
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c.common.cdw13 = cpu_to_le32(cmd.cdw13);
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c.common.cdw14 = cpu_to_le32(cmd.cdw14);
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c.common.cdw15 = cpu_to_le32(cmd.cdw15);
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if (cmd.timeout_ms)
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timeout = msecs_to_jiffies(cmd.timeout_ms);
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effects = nvme_passthru_start(ctrl, ns, cmd.opcode);
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status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
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(void __user *)(uintptr_t)cmd.addr, cmd.data_len,
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(void __user *)(uintptr_t)cmd.metadata,
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cmd.metadata_len, 0, &result, timeout);
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nvme_passthru_end(ctrl, effects);
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if (status >= 0) {
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if (put_user(result, &ucmd->result))
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return -EFAULT;
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}
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return status;
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}
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static int nvme_user_cmd64(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
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struct nvme_passthru_cmd64 __user *ucmd)
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{
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struct nvme_passthru_cmd64 cmd;
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struct nvme_command c;
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unsigned timeout = 0;
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u32 effects;
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int status;
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if (!capable(CAP_SYS_ADMIN))
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@ -1405,6 +1456,41 @@ static void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx)
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srcu_read_unlock(&head->srcu, idx);
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}
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static bool is_ctrl_ioctl(unsigned int cmd)
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{
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if (cmd == NVME_IOCTL_ADMIN_CMD || cmd == NVME_IOCTL_ADMIN64_CMD)
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return true;
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if (is_sed_ioctl(cmd))
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return true;
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return false;
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}
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static int nvme_handle_ctrl_ioctl(struct nvme_ns *ns, unsigned int cmd,
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void __user *argp,
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struct nvme_ns_head *head,
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int srcu_idx)
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{
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struct nvme_ctrl *ctrl = ns->ctrl;
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int ret;
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nvme_get_ctrl(ns->ctrl);
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nvme_put_ns_from_disk(head, srcu_idx);
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switch (cmd) {
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case NVME_IOCTL_ADMIN_CMD:
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ret = nvme_user_cmd(ctrl, NULL, argp);
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break;
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case NVME_IOCTL_ADMIN64_CMD:
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ret = nvme_user_cmd64(ctrl, NULL, argp);
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break;
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default:
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ret = sed_ioctl(ctrl->opal_dev, cmd, argp);
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break;
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}
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nvme_put_ctrl(ctrl);
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return ret;
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}
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static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
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unsigned int cmd, unsigned long arg)
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{
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|
|
@ -1422,20 +1508,8 @@ static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
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* seperately and drop the ns SRCU reference early. This avoids a
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* deadlock when deleting namespaces using the passthrough interface.
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*/
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if (cmd == NVME_IOCTL_ADMIN_CMD || is_sed_ioctl(cmd)) {
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struct nvme_ctrl *ctrl = ns->ctrl;
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nvme_get_ctrl(ns->ctrl);
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nvme_put_ns_from_disk(head, srcu_idx);
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|
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if (cmd == NVME_IOCTL_ADMIN_CMD)
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ret = nvme_user_cmd(ctrl, NULL, argp);
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else
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ret = sed_ioctl(ctrl->opal_dev, cmd, argp);
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nvme_put_ctrl(ctrl);
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return ret;
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}
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if (is_ctrl_ioctl(cmd))
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return nvme_handle_ctrl_ioctl(ns, cmd, argp, head, srcu_idx);
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switch (cmd) {
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case NVME_IOCTL_ID:
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|
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@ -1448,6 +1522,9 @@ static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
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case NVME_IOCTL_SUBMIT_IO:
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ret = nvme_submit_io(ns, argp);
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break;
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case NVME_IOCTL_IO64_CMD:
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ret = nvme_user_cmd64(ns->ctrl, ns, argp);
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break;
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default:
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if (ns->ndev)
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ret = nvme_nvm_ioctl(ns, cmd, arg);
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@ -2289,6 +2366,16 @@ static const struct nvme_core_quirk_entry core_quirks[] = {
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.vid = 0x14a4,
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.fr = "22301111",
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.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
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},
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{
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/*
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* This Kingston E8FK11.T firmware version has no interrupt
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* after resume with actions related to suspend to idle
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* https://bugzilla.kernel.org/show_bug.cgi?id=204887
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*/
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.vid = 0x2646,
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.fr = "E8FK11.T",
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.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
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}
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};
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@ -2540,8 +2627,9 @@ static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
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list_add_tail(&subsys->entry, &nvme_subsystems);
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}
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if (sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
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dev_name(ctrl->device))) {
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ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
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dev_name(ctrl->device));
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if (ret) {
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dev_err(ctrl->device,
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"failed to create sysfs link from subsystem.\n");
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goto out_put_subsystem;
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@ -2838,6 +2926,8 @@ static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
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switch (cmd) {
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case NVME_IOCTL_ADMIN_CMD:
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return nvme_user_cmd(ctrl, NULL, argp);
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case NVME_IOCTL_ADMIN64_CMD:
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return nvme_user_cmd64(ctrl, NULL, argp);
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case NVME_IOCTL_IO_CMD:
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return nvme_dev_user_cmd(ctrl, argp);
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case NVME_IOCTL_RESET:
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@ -3045,6 +3135,8 @@ static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
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nvme_show_int_function(cntlid);
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nvme_show_int_function(numa_node);
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nvme_show_int_function(queue_count);
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nvme_show_int_function(sqsize);
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static ssize_t nvme_sysfs_delete(struct device *dev,
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struct device_attribute *attr, const char *buf,
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|
|
@ -3125,6 +3217,8 @@ static struct attribute *nvme_dev_attrs[] = {
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&dev_attr_address.attr,
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&dev_attr_state.attr,
|
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&dev_attr_numa_node.attr,
|
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&dev_attr_queue_count.attr,
|
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&dev_attr_sqsize.attr,
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NULL
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};
|
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|
||||
|
|
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|||
|
|
@ -221,6 +221,7 @@ struct nvme_ctrl {
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u16 oacs;
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u16 nssa;
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u16 nr_streams;
|
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u16 sqsize;
|
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u32 max_namespaces;
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atomic_t abort_limit;
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u8 vwc;
|
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|
|
@ -269,7 +270,6 @@ struct nvme_ctrl {
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u16 hmmaxd;
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/* Fabrics only */
|
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u16 sqsize;
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u32 ioccsz;
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u32 iorcsz;
|
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u16 icdoff;
|
||||
|
|
|
|||
|
|
@ -2946,11 +2946,21 @@ static int nvme_suspend(struct device *dev)
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if (ret < 0)
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goto unfreeze;
|
||||
|
||||
/*
|
||||
* A saved state prevents pci pm from generically controlling the
|
||||
* device's power. If we're using protocol specific settings, we don't
|
||||
* want pci interfering.
|
||||
*/
|
||||
pci_save_state(pdev);
|
||||
|
||||
ret = nvme_set_power_state(ctrl, ctrl->npss);
|
||||
if (ret < 0)
|
||||
goto unfreeze;
|
||||
|
||||
if (ret) {
|
||||
/* discard the saved state */
|
||||
pci_load_saved_state(pdev, NULL);
|
||||
|
||||
/*
|
||||
* Clearing npss forces a controller reset on resume. The
|
||||
* correct value will be resdicovered then.
|
||||
|
|
@ -2958,14 +2968,7 @@ static int nvme_suspend(struct device *dev)
|
|||
nvme_dev_disable(ndev, true);
|
||||
ctrl->npss = 0;
|
||||
ret = 0;
|
||||
goto unfreeze;
|
||||
}
|
||||
/*
|
||||
* A saved state prevents pci pm from generically controlling the
|
||||
* device's power. If we're using protocol specific settings, we don't
|
||||
* want pci interfering.
|
||||
*/
|
||||
pci_save_state(pdev);
|
||||
unfreeze:
|
||||
nvme_unfreeze(ctrl);
|
||||
return ret;
|
||||
|
|
@ -3090,6 +3093,9 @@ static const struct pci_device_id nvme_id_table[] = {
|
|||
.driver_data = NVME_QUIRK_LIGHTNVM, },
|
||||
{ PCI_DEVICE(0x10ec, 0x5762), /* ADATA SX6000LNP */
|
||||
.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, },
|
||||
{ PCI_DEVICE(0x1cc1, 0x8201), /* ADATA SX8200PNP 512GB */
|
||||
.driver_data = NVME_QUIRK_NO_DEEPEST_PS |
|
||||
NVME_QUIRK_IGNORE_DEV_SUBNQN, },
|
||||
{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) },
|
||||
|
|
|
|||
|
|
@ -427,7 +427,7 @@ static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
|
|||
static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
|
||||
{
|
||||
return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
|
||||
ibdev->attrs.max_fast_reg_page_list_len);
|
||||
ibdev->attrs.max_fast_reg_page_list_len - 1);
|
||||
}
|
||||
|
||||
static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
|
||||
|
|
@ -437,7 +437,7 @@ static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
|
|||
const int cq_factor = send_wr_factor + 1; /* + RECV */
|
||||
int comp_vector, idx = nvme_rdma_queue_idx(queue);
|
||||
enum ib_poll_context poll_ctx;
|
||||
int ret;
|
||||
int ret, pages_per_mr;
|
||||
|
||||
queue->device = nvme_rdma_find_get_device(queue->cm_id);
|
||||
if (!queue->device) {
|
||||
|
|
@ -479,10 +479,16 @@ static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
|
|||
goto out_destroy_qp;
|
||||
}
|
||||
|
||||
/*
|
||||
* Currently we don't use SG_GAPS MR's so if the first entry is
|
||||
* misaligned we'll end up using two entries for a single data page,
|
||||
* so one additional entry is required.
|
||||
*/
|
||||
pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev) + 1;
|
||||
ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
|
||||
queue->queue_size,
|
||||
IB_MR_TYPE_MEM_REG,
|
||||
nvme_rdma_get_max_fr_pages(ibdev), 0);
|
||||
pages_per_mr, 0);
|
||||
if (ret) {
|
||||
dev_err(queue->ctrl->ctrl.device,
|
||||
"failed to initialize MR pool sized %d for QID %d\n",
|
||||
|
|
@ -614,7 +620,8 @@ static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
|
|||
if (!ret) {
|
||||
set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
|
||||
} else {
|
||||
__nvme_rdma_stop_queue(queue);
|
||||
if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
|
||||
__nvme_rdma_stop_queue(queue);
|
||||
dev_info(ctrl->ctrl.device,
|
||||
"failed to connect queue: %d ret=%d\n", idx, ret);
|
||||
}
|
||||
|
|
@ -820,8 +827,8 @@ static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
|
|||
if (error)
|
||||
goto out_stop_queue;
|
||||
|
||||
ctrl->ctrl.max_hw_sectors =
|
||||
(ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
|
||||
ctrl->ctrl.max_segments = ctrl->max_fr_pages;
|
||||
ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
|
||||
|
||||
blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
|
||||
|
||||
|
|
|
|||
|
|
@ -1042,7 +1042,7 @@ static void nvme_tcp_io_work(struct work_struct *w)
|
|||
{
|
||||
struct nvme_tcp_queue *queue =
|
||||
container_of(w, struct nvme_tcp_queue, io_work);
|
||||
unsigned long start = jiffies + msecs_to_jiffies(1);
|
||||
unsigned long deadline = jiffies + msecs_to_jiffies(1);
|
||||
|
||||
do {
|
||||
bool pending = false;
|
||||
|
|
@ -1067,7 +1067,7 @@ static void nvme_tcp_io_work(struct work_struct *w)
|
|||
if (!pending)
|
||||
return;
|
||||
|
||||
} while (time_after(jiffies, start)); /* quota is exhausted */
|
||||
} while (!time_after(jiffies, deadline)); /* quota is exhausted */
|
||||
|
||||
queue_work_on(queue->io_cpu, nvme_tcp_wq, &queue->io_work);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -11,10 +11,10 @@
|
|||
void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id)
|
||||
{
|
||||
const struct queue_limits *ql = &bdev_get_queue(bdev)->limits;
|
||||
/* Number of physical blocks per logical block. */
|
||||
const u32 ppl = ql->physical_block_size / ql->logical_block_size;
|
||||
/* Physical blocks per logical block, 0's based. */
|
||||
const __le16 ppl0b = to0based(ppl);
|
||||
/* Number of logical blocks per physical block. */
|
||||
const u32 lpp = ql->physical_block_size / ql->logical_block_size;
|
||||
/* Logical blocks per physical block, 0's based. */
|
||||
const __le16 lpp0b = to0based(lpp);
|
||||
|
||||
/*
|
||||
* For NVMe 1.2 and later, bit 1 indicates that the fields NAWUN,
|
||||
|
|
@ -25,9 +25,9 @@ void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id)
|
|||
* field from the identify controller data structure should be used.
|
||||
*/
|
||||
id->nsfeat |= 1 << 1;
|
||||
id->nawun = ppl0b;
|
||||
id->nawupf = ppl0b;
|
||||
id->nacwu = ppl0b;
|
||||
id->nawun = lpp0b;
|
||||
id->nawupf = lpp0b;
|
||||
id->nacwu = lpp0b;
|
||||
|
||||
/*
|
||||
* Bit 4 indicates that the fields NPWG, NPWA, NPDG, NPDA, and
|
||||
|
|
@ -36,7 +36,7 @@ void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id)
|
|||
*/
|
||||
id->nsfeat |= 1 << 4;
|
||||
/* NPWG = Namespace Preferred Write Granularity. 0's based */
|
||||
id->npwg = ppl0b;
|
||||
id->npwg = lpp0b;
|
||||
/* NPWA = Namespace Preferred Write Alignment. 0's based */
|
||||
id->npwa = id->npwg;
|
||||
/* NPDG = Namespace Preferred Deallocate Granularity. 0's based */
|
||||
|
|
|
|||
|
|
@ -348,8 +348,7 @@ static int nvmet_tcp_map_data(struct nvmet_tcp_cmd *cmd)
|
|||
|
||||
return 0;
|
||||
err:
|
||||
if (cmd->req.sg_cnt)
|
||||
sgl_free(cmd->req.sg);
|
||||
sgl_free(cmd->req.sg);
|
||||
return NVME_SC_INTERNAL;
|
||||
}
|
||||
|
||||
|
|
@ -554,8 +553,7 @@ static int nvmet_try_send_data(struct nvmet_tcp_cmd *cmd)
|
|||
|
||||
if (queue->nvme_sq.sqhd_disabled) {
|
||||
kfree(cmd->iov);
|
||||
if (cmd->req.sg_cnt)
|
||||
sgl_free(cmd->req.sg);
|
||||
sgl_free(cmd->req.sg);
|
||||
}
|
||||
|
||||
return 1;
|
||||
|
|
@ -586,8 +584,7 @@ static int nvmet_try_send_response(struct nvmet_tcp_cmd *cmd,
|
|||
return -EAGAIN;
|
||||
|
||||
kfree(cmd->iov);
|
||||
if (cmd->req.sg_cnt)
|
||||
sgl_free(cmd->req.sg);
|
||||
sgl_free(cmd->req.sg);
|
||||
cmd->queue->snd_cmd = NULL;
|
||||
nvmet_tcp_put_cmd(cmd);
|
||||
return 1;
|
||||
|
|
@ -1310,8 +1307,7 @@ static void nvmet_tcp_finish_cmd(struct nvmet_tcp_cmd *cmd)
|
|||
nvmet_req_uninit(&cmd->req);
|
||||
nvmet_tcp_unmap_pdu_iovec(cmd);
|
||||
kfree(cmd->iov);
|
||||
if (cmd->req.sg_cnt)
|
||||
sgl_free(cmd->req.sg);
|
||||
sgl_free(cmd->req.sg);
|
||||
}
|
||||
|
||||
static void nvmet_tcp_uninit_data_in_cmds(struct nvmet_tcp_queue *queue)
|
||||
|
|
|
|||
|
|
@ -45,6 +45,27 @@ struct nvme_passthru_cmd {
|
|||
__u32 result;
|
||||
};
|
||||
|
||||
struct nvme_passthru_cmd64 {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 rsvd1;
|
||||
__u32 nsid;
|
||||
__u32 cdw2;
|
||||
__u32 cdw3;
|
||||
__u64 metadata;
|
||||
__u64 addr;
|
||||
__u32 metadata_len;
|
||||
__u32 data_len;
|
||||
__u32 cdw10;
|
||||
__u32 cdw11;
|
||||
__u32 cdw12;
|
||||
__u32 cdw13;
|
||||
__u32 cdw14;
|
||||
__u32 cdw15;
|
||||
__u32 timeout_ms;
|
||||
__u64 result;
|
||||
};
|
||||
|
||||
#define nvme_admin_cmd nvme_passthru_cmd
|
||||
|
||||
#define NVME_IOCTL_ID _IO('N', 0x40)
|
||||
|
|
@ -54,5 +75,7 @@ struct nvme_passthru_cmd {
|
|||
#define NVME_IOCTL_RESET _IO('N', 0x44)
|
||||
#define NVME_IOCTL_SUBSYS_RESET _IO('N', 0x45)
|
||||
#define NVME_IOCTL_RESCAN _IO('N', 0x46)
|
||||
#define NVME_IOCTL_ADMIN64_CMD _IOWR('N', 0x47, struct nvme_passthru_cmd64)
|
||||
#define NVME_IOCTL_IO64_CMD _IOWR('N', 0x48, struct nvme_passthru_cmd64)
|
||||
|
||||
#endif /* _UAPI_LINUX_NVME_IOCTL_H */
|
||||
|
|
|
|||
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