ARM: SoC: convert spear13xx to SMP operations
Convert the spear13xx platform to use struct smp_operations to provide its SMP and CPU hotplug operations. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: spear-devel@list.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -56,7 +56,7 @@ static inline void cpu_leave_lowpower(void)
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: "cc");
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}
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static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
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static inline void spear13xx_do_lowpower(unsigned int cpu, int *spurious)
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{
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for (;;) {
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wfi();
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@ -79,17 +79,12 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
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}
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}
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int platform_cpu_kill(unsigned int cpu)
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{
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return 1;
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}
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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void __cpuinit platform_cpu_die(unsigned int cpu)
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void __ref spear13xx_cpu_die(unsigned int cpu)
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{
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int spurious = 0;
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@ -97,7 +92,7 @@ void __cpuinit platform_cpu_die(unsigned int cpu)
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* we're ready for shutdown now, so do it
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*/
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cpu_enter_lowpower();
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platform_do_lowpower(cpu, &spurious);
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spear13xx_do_lowpower(cpu, &spurious);
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/*
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* bring this CPU back into the world of cache
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@ -108,12 +103,3 @@ void __cpuinit platform_cpu_die(unsigned int cpu)
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if (spurious)
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pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
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}
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int platform_cpu_disable(unsigned int cpu)
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{
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/*
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* we don't allow CPU 0 to be shutdown (it is still too special
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* e.g. clock tick interrupts)
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*/
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return cpu == 0 ? -EPERM : 0;
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}
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@ -33,6 +33,9 @@ void __init spear13xx_l2x0_init(void);
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bool dw_dma_filter(struct dma_chan *chan, void *slave);
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void spear_restart(char, const char *);
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void spear13xx_secondary_startup(void);
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void __cpuinit spear13xx_cpu_die(unsigned int cpu);
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extern struct smp_operations spear13xx_smp_ops;
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#ifdef CONFIG_MACH_SPEAR1310
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void __init spear1310_clk_init(void);
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@ -19,6 +19,7 @@
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#include <asm/hardware/gic.h>
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#include <asm/smp_scu.h>
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#include <mach/spear.h>
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#include <mach/generic.h>
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/*
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* control for which core is the next to come out of the secondary
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@ -28,9 +29,8 @@ volatile int __cpuinitdata pen_release = -1;
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static DEFINE_SPINLOCK(boot_lock);
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static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
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extern void spear13xx_secondary_startup(void);
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void __cpuinit platform_secondary_init(unsigned int cpu)
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static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
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{
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/*
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* if any interrupts are already enabled for the primary
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@ -53,7 +53,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
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spin_unlock(&boot_lock);
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}
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int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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unsigned long timeout;
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@ -97,7 +97,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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void __init smp_init_cpus(void)
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static void __init spear13xx_smp_init_cpus(void)
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{
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unsigned int i, ncores = scu_get_core_count(scu_base);
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@ -113,7 +113,7 @@ void __init smp_init_cpus(void)
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set_smp_cross_call(gic_raise_softirq);
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}
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void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
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{
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scu_enable(scu_base);
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@ -125,3 +125,13 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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*/
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__raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION);
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}
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struct smp_operations spear13xx_smp_ops __initdata = {
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.smp_init_cpus = spear13xx_smp_init_cpus,
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.smp_prepare_cpus = spear13xx_smp_prepare_cpus,
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.smp_secondary_init = spear13xx_secondary_init,
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.smp_boot_secondary = spear13xx_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = spear13xx_cpu_die,
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#endif
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};
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@ -78,6 +78,7 @@ static void __init spear1310_map_io(void)
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}
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DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")
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.smp = smp_ops(spear13xx_smp_ops),
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.map_io = spear1310_map_io,
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.init_irq = spear13xx_dt_init_irq,
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.handle_irq = gic_handle_irq,
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@ -182,6 +182,7 @@ static const char * const spear1340_dt_board_compat[] = {
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};
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DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree")
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.smp = smp_ops(spear13xx_smp_ops),
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.map_io = spear13xx_map_io,
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.init_irq = spear13xx_dt_init_irq,
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.handle_irq = gic_handle_irq,
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