MIPS: Fix race condition with FPU thread task flag during context switch.
[ralf@linux-mips.org: Cosmetic changes; also fixed up r2300_switch.S and octeon_switch.S which needed similar modifications.] Signed-off-by: Leonid Yegoshin <yegoshin@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3784/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -22,7 +22,7 @@ struct task_struct;
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* switch_to(n) should switch tasks to task nr n, first
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* checking that n isn't the current task, in which case it does nothing.
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*/
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extern asmlinkage void *resume(void *last, void *next, void *next_ti);
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extern asmlinkage void *resume(void *last, void *next, void *next_ti, u32 __usedfpu);
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extern unsigned int ll_bit;
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extern struct task_struct *ll_task;
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@ -66,11 +66,13 @@ do { \
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#define switch_to(prev, next, last) \
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do { \
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u32 __usedfpu; \
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__mips_mt_fpaff_switch_to(prev); \
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if (cpu_has_dsp) \
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__save_dsp(prev); \
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__clear_software_ll_bit(); \
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(last) = resume(prev, next, task_thread_info(next)); \
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__usedfpu = test_and_clear_tsk_thread_flag(prev, TIF_USEDFPU); \
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(last) = resume(prev, next, task_thread_info(next), __usedfpu); \
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} while (0)
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#define finish_arch_switch(prev) \
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@ -31,7 +31,7 @@
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/*
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* task_struct *resume(task_struct *prev, task_struct *next,
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* struct thread_info *next_ti)
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* struct thread_info *next_ti, int usedfpu)
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*/
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.align 7
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LEAF(resume)
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@ -43,7 +43,7 @@
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/*
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* task_struct *resume(task_struct *prev, task_struct *next,
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* struct thread_info *next_ti) )
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* struct thread_info *next_ti, int usedfpu)
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*/
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LEAF(resume)
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mfc0 t1, CP0_STATUS
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@ -51,18 +51,9 @@ LEAF(resume)
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cpu_save_nonscratch a0
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sw ra, THREAD_REG31(a0)
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/*
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* check if we need to save FPU registers
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*/
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lw t3, TASK_THREAD_INFO(a0)
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lw t0, TI_FLAGS(t3)
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li t1, _TIF_USEDFPU
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and t2, t0, t1
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beqz t2, 1f
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nor t1, zero, t1
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beqz a3, 1f
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and t0, t0, t1
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sw t0, TI_FLAGS(t3)
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PTR_L t3, TASK_THREAD_INFO(a0)
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/*
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* clear saved user stack CU1 bit
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@ -41,7 +41,7 @@
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/*
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* task_struct *resume(task_struct *prev, task_struct *next,
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* struct thread_info *next_ti)
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* struct thread_info *next_ti, int usedfpu)
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*/
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.align 5
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LEAF(resume)
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@ -53,16 +53,10 @@
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/*
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* check if we need to save FPU registers
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*/
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beqz a3, 1f
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PTR_L t3, TASK_THREAD_INFO(a0)
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LONG_L t0, TI_FLAGS(t3)
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li t1, _TIF_USEDFPU
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and t2, t0, t1
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beqz t2, 1f
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nor t1, zero, t1
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and t0, t0, t1
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LONG_S t0, TI_FLAGS(t3)
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/*
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* clear saved user stack CU1 bit
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*/
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