x86: Use new cache mode type in arch/x86/mm/init_64.c
Instead of directly using the cache mode bits in the pte switch to using the cache mode type. Based-on-patch-by: Stefan Bader <stefan.bader@canonical.com> Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: stefan.bader@canonical.com Cc: xen-devel@lists.xensource.com Cc: konrad.wilk@oracle.com Cc: ville.syrjala@linux.intel.com Cc: david.vrabel@citrix.com Cc: jbeulich@suse.com Cc: toshi.kani@hp.com Cc: plagnioj@jcrosoft.com Cc: tomi.valkeinen@ti.com Cc: bhelgaas@google.com Link: http://lkml.kernel.org/r/1415019724-4317-7-git-send-email-jgross@suse.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -337,12 +337,15 @@ pte_t * __init populate_extra_pte(unsigned long vaddr)
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* Create large page table mappings for a range of physical addresses.
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*/
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static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
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pgprot_t prot)
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enum page_cache_mode cache)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pgprot_t prot;
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pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
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pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
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BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
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for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
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pgd = pgd_offset_k((unsigned long)__va(phys));
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@ -365,12 +368,12 @@ static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
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void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
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{
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__init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
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__init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
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}
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void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
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{
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__init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
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__init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
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}
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/*
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