msm: iommu: Use ASID tagging instead of VMID tagging
Use ASID tags in the TLB instead of VMID tags in preparation for changes to the secure environment. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
This commit is contained in:
Родитель
b61401adf3
Коммит
2e8c8ba983
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@ -1,4 +1,4 @@
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/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -68,6 +68,7 @@ do { \
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#define FL_CACHEABLE (1 << 3)
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#define FL_TEX0 (1 << 12)
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#define FL_OFFSET(va) (((va) & 0xFFF00000) >> 20)
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#define FL_NG (1 << 17)
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/* Second-level page table bits */
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#define SL_BASE_MASK_LARGE 0xFFFF0000
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@ -81,6 +82,7 @@ do { \
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#define SL_CACHEABLE (1 << 3)
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#define SL_TEX0 (1 << 6)
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#define SL_OFFSET(va) (((va) & 0xFF000) >> 12)
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#define SL_NG (1 << 11)
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/* Memory type and cache policy attributes */
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#define MT_SO 0
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@ -137,7 +137,6 @@ static void __reset_context(void __iomem *base, int ctx)
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SET_TLBLKCR(base, ctx, 0);
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SET_PRRR(base, ctx, 0);
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SET_NMRR(base, ctx, 0);
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SET_CONTEXTIDR(base, ctx, 0);
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}
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static void __program_context(void __iomem *base, int ctx, phys_addr_t pgtable)
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@ -418,11 +417,11 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va,
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for (i = 0; i < 16; i++)
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*(fl_pte+i) = (pa & 0xFF000000) | FL_SUPERSECTION |
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FL_AP_READ | FL_AP_WRITE | FL_TYPE_SECT |
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FL_SHARED | pgprot;
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FL_SHARED | FL_NG | pgprot;
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}
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if (len == SZ_1M)
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*fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE |
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*fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE | FL_NG |
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FL_TYPE_SECT | FL_SHARED | pgprot;
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/* Need a 2nd level table */
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@ -447,7 +446,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va,
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if (len == SZ_4K)
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*sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 |
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*sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 | SL_NG |
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SL_SHARED | SL_TYPE_SMALL | pgprot;
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if (len == SZ_64K) {
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@ -455,7 +454,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va,
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for (i = 0; i < 16; i++)
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*(sl_pte+i) = (pa & SL_BASE_MASK_LARGE) | SL_AP0 |
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SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot;
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SL_NG | SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot;
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}
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ret = __flush_iotlb(domain);
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@ -330,14 +330,17 @@ static int msm_iommu_ctx_probe(struct platform_device *pdev)
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SET_M2VCBR_N(drvdata->base, mid, 0);
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SET_CBACR_N(drvdata->base, c->num, 0);
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/* Set VMID = MID */
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SET_VMID(drvdata->base, mid, mid);
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/* Set VMID = 0 */
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SET_VMID(drvdata->base, mid, 0);
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/* Set the context number for that MID to this context */
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SET_CBNDX(drvdata->base, mid, c->num);
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/* Set MID associated with this context bank */
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SET_CBVMID(drvdata->base, c->num, mid);
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/* Set MID associated with this context bank to 0*/
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SET_CBVMID(drvdata->base, c->num, 0);
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/* Set the ASID for TLB tagging for this context */
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SET_CONTEXTIDR_ASID(drvdata->base, c->num, c->num);
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/* Set security bit override to be Non-secure */
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SET_NSCFG(drvdata->base, mid, 3);
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