ARM: OMAP2+: Remove legacy_init_ehci_clk()
The necessary clock phandle for the EHCI clock is now provided via device tree so we no longer need this legacy method. Update the omap4-panda and omap5-uevm board DTS to provide the necessary EHCI PHY clock information. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -83,12 +83,8 @@
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
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vcc-supply = <&hsusb1_power>;
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/**
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* FIXME:
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* put the right clock phandle here when available
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* clocks = <&auxclk3>;
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* clock-names = "main_clk";
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*/
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clocks = <&auxclk3_ck>;
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clock-names = "main_clk";
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clock-frequency = <19200000>;
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};
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@ -31,12 +31,8 @@
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hsusb2_phy: hsusb2_phy {
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
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/**
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* FIXME
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* Put the right clock phandle here when available
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* clocks = <&auxclk1>;
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* clock-names = "main_clk";
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*/
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clocks = <&auxclk1_ck>;
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clock-names = "main_clk";
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clock-frequency = <19200000>;
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};
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@ -31,20 +31,6 @@ struct pdata_init {
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struct of_dev_auxdata omap_auxdata_lookup[];
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static struct twl4030_gpio_platform_data twl_gpio_auxdata;
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/*
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* Create alias for USB host PHY clock.
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* Remove this when clock phandle can be provided via DT
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*/
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static void __init __used legacy_init_ehci_clk(char *clkname)
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{
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int ret;
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ret = clk_add_alias("main_clk", NULL, clkname, NULL);
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if (ret)
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pr_err("%s:Failed to add main_clk alias to %s :%d\n",
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__func__, clkname, ret);
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}
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#if IS_ENABLED(CONFIG_WL12XX)
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static struct wl12xx_platform_data wl12xx __initdata;
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@ -243,7 +229,6 @@ static void __init omap4_sdp_legacy_init(void)
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static void __init omap4_panda_legacy_init(void)
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{
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omap4_panda_display_init_of();
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legacy_init_ehci_clk("auxclk3_ck");
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legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
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}
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#endif
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@ -251,7 +236,6 @@ static void __init omap4_panda_legacy_init(void)
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#ifdef CONFIG_SOC_OMAP5
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static void __init omap5_uevm_legacy_init(void)
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{
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legacy_init_ehci_clk("auxclk1_ck");
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}
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#endif
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