dmaengine: idxd: cleanup completion record allocation
According to core-api/dma-api-howto.rst, the address from dma_alloc_coherent is gauranteed to align to the smallest PAGE_SIZE order. That supercedes the 64B/32B alignment requirement of the completion record. Remove alignment adjustment code. Tested-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/163517396063.3484297.7494385225280705372.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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1825ecc908
Коммит
2efe58cfaa
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@ -135,8 +135,6 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq)
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struct idxd_device *idxd = wq->idxd;
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struct device *dev = &idxd->pdev->dev;
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int rc, num_descs, i;
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int align;
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u64 tmp;
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if (wq->type != IDXD_WQT_KERNEL)
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return 0;
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@ -148,21 +146,13 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq)
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if (rc < 0)
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return rc;
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align = idxd->data->align;
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wq->compls_size = num_descs * idxd->data->compl_size + align;
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wq->compls_raw = dma_alloc_coherent(dev, wq->compls_size,
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&wq->compls_addr_raw, GFP_KERNEL);
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if (!wq->compls_raw) {
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wq->compls_size = num_descs * idxd->data->compl_size;
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wq->compls = dma_alloc_coherent(dev, wq->compls_size, &wq->compls_addr, GFP_KERNEL);
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if (!wq->compls) {
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rc = -ENOMEM;
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goto fail_alloc_compls;
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}
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/* Adjust alignment */
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wq->compls_addr = (wq->compls_addr_raw + (align - 1)) & ~(align - 1);
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tmp = (u64)wq->compls_raw;
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tmp = (tmp + (align - 1)) & ~(align - 1);
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wq->compls = (struct dsa_completion_record *)tmp;
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rc = alloc_descs(wq, num_descs);
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if (rc < 0)
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goto fail_alloc_descs;
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@ -191,8 +181,7 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq)
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fail_sbitmap_init:
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free_descs(wq);
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fail_alloc_descs:
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dma_free_coherent(dev, wq->compls_size, wq->compls_raw,
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wq->compls_addr_raw);
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dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr);
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fail_alloc_compls:
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free_hw_descs(wq);
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return rc;
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@ -207,8 +196,7 @@ void idxd_wq_free_resources(struct idxd_wq *wq)
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free_hw_descs(wq);
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free_descs(wq);
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dma_free_coherent(dev, wq->compls_size, wq->compls_raw,
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wq->compls_addr_raw);
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dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr);
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sbitmap_queue_free(&wq->sbq);
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}
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@ -187,9 +187,7 @@ struct idxd_wq {
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struct dsa_completion_record *compls;
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struct iax_completion_record *iax_compls;
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};
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void *compls_raw;
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dma_addr_t compls_addr;
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dma_addr_t compls_addr_raw;
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int compls_size;
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struct idxd_desc **descs;
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struct sbitmap_queue sbq;
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