[ARM] dma: rejig DMA initialization
Rather than having the central DMA multiplexer call the architecture specific DMA initialization function, have each architecture DMA initialization function use core_initcall(), and register each DMA channel separately with the multiplexer. This removes the array of dma structures in the central multiplexer, replacing it with an array of pointers instead; this is more flexible since it allows the drivers to wrap the DMA structure (eventually allowing us to transition non-ISA DMA drivers away.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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3afb6e9c63
Коммит
2f757f2ab7
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@ -48,10 +48,12 @@ struct dma_struct {
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struct dma_ops *d_ops;
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};
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/* Prototype: void arch_dma_init(dma)
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* Purpose : Initialise architecture specific DMA
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* Params : dma - pointer to array of DMA structures
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/*
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* isa_dma_add - add an ISA-style DMA channel
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*/
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extern void arch_dma_init(dma_t *dma);
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extern int isa_dma_add(unsigned int, dma_t *dma);
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extern void isa_init_dma(dma_t *dma);
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/*
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* Add the ISA DMA controller. Always takes channels 0-7.
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*/
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extern void isa_init_dma(void);
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@ -160,7 +160,12 @@ static struct resource dma_resources[] = { {
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.end = 0x048f
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} };
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void __init isa_init_dma(dma_t *dma)
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static dma_t isa_dma[8];
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/*
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* ISA DMA always starts at channel 0
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*/
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void __init isa_init_dma(void)
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{
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/*
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* Try to autodetect presence of an ISA DMA controller.
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@ -178,10 +183,10 @@ void __init isa_init_dma(dma_t *dma)
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outb(0xaa, 0x00);
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if (inb(0) == 0x55 && inb(0) == 0xaa) {
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int chan, i;
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unsigned int chan, i;
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for (chan = 0; chan < 8; chan++) {
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dma[chan].d_ops = &isa_dma_ops;
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isa_dma[chan].d_ops = &isa_dma_ops;
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isa_disable_dma(chan, NULL);
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}
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@ -217,5 +222,12 @@ void __init isa_init_dma(dma_t *dma)
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for (i = 0; i < ARRAY_SIZE(dma_resources); i++)
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request_resource(&ioport_resource, dma_resources + i);
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for (chan = 0; chan < 8; chan++) {
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int ret = isa_dma_add(chan, &isa_dma[chan]);
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if (ret)
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printk(KERN_ERR "ISADMA%u: unable to register: %d\n",
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chan, ret);
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}
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}
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}
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@ -23,16 +23,24 @@
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DEFINE_SPINLOCK(dma_spin_lock);
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EXPORT_SYMBOL(dma_spin_lock);
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static dma_t dma_chan[MAX_DMA_CHANNELS];
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static dma_t *dma_chan[MAX_DMA_CHANNELS];
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static inline dma_t *dma_channel(unsigned int chan)
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{
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dma_t *dma = dma_chan + chan;
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if (chan >= MAX_DMA_CHANNELS || !dma->d_ops)
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if (chan >= MAX_DMA_CHANNELS)
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return NULL;
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return dma;
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return dma_chan[chan];
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}
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int __init isa_dma_add(unsigned int chan, dma_t *dma)
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{
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if (!dma->d_ops)
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return -EINVAL;
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if (dma_chan[chan])
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return -EBUSY;
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dma_chan[chan] = dma;
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return 0;
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}
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/*
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@ -252,10 +260,3 @@ int get_dma_residue(unsigned int chan)
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return ret;
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}
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EXPORT_SYMBOL(get_dma_residue);
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static int __init init_dma(void)
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{
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arch_dma_init(dma_chan);
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return 0;
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}
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core_initcall(init_dma);
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@ -41,7 +41,7 @@ static struct dma_ops fb_dma_ops = {
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};
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#endif
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void __init arch_dma_init(dma_t *dma)
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static int __init fb_dma_init(void)
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{
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#if 0
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dma[_DC21285_DMA(0)].d_ops = &fb_dma_ops;
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@ -49,6 +49,8 @@ void __init arch_dma_init(dma_t *dma)
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#endif
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#ifdef CONFIG_ISA_DMA
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if (footbridge_cfn_mode())
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isa_init_dma(dma + _ISA_DMA(0));
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isa_init_dma();
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#endif
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return 0;
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}
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core_initcall(fb_dma_init);
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@ -302,8 +302,22 @@ static struct dma_ops sound_dma_ops = {
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.disable = sound_enable_disable_dma,
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};
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void __init arch_dma_init(dma_t *dma)
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static dma_t iomd_dma[6];
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static dma_t floppy_dma = {
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.dma_irq = FIQ_FLOPPYDATA,
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.d_ops = &floppy_dma_ops,
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};
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static dma_t sound_dma = {
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.d_ops = &sound_dma_ops,
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};
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static int __init rpc_dma_init(void)
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{
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unsigned int i;
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int ret;
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iomd_writeb(0, IOMD_IO0CR);
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iomd_writeb(0, IOMD_IO1CR);
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iomd_writeb(0, IOMD_IO2CR);
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@ -311,31 +325,39 @@ void __init arch_dma_init(dma_t *dma)
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iomd_writeb(0xa0, IOMD_DMATCR);
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dma[DMA_0].dma_base = IOMD_IO0CURA;
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dma[DMA_0].dma_irq = IRQ_DMA0;
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dma[DMA_0].d_ops = &iomd_dma_ops;
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dma[DMA_1].dma_base = IOMD_IO1CURA;
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dma[DMA_1].dma_irq = IRQ_DMA1;
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dma[DMA_1].d_ops = &iomd_dma_ops;
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dma[DMA_2].dma_base = IOMD_IO2CURA;
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dma[DMA_2].dma_irq = IRQ_DMA2;
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dma[DMA_2].d_ops = &iomd_dma_ops;
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dma[DMA_3].dma_base = IOMD_IO3CURA;
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dma[DMA_3].dma_irq = IRQ_DMA3;
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dma[DMA_3].d_ops = &iomd_dma_ops;
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dma[DMA_S0].dma_base = IOMD_SD0CURA;
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dma[DMA_S0].dma_irq = IRQ_DMAS0;
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dma[DMA_S0].d_ops = &iomd_dma_ops;
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dma[DMA_S1].dma_base = IOMD_SD1CURA;
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dma[DMA_S1].dma_irq = IRQ_DMAS1;
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dma[DMA_S1].d_ops = &iomd_dma_ops;
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dma[DMA_VIRTUAL_FLOPPY].dma_irq = FIQ_FLOPPYDATA;
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dma[DMA_VIRTUAL_FLOPPY].d_ops = &floppy_dma_ops;
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dma[DMA_VIRTUAL_SOUND].d_ops = &sound_dma_ops;
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/*
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* Setup DMA channels 2,3 to be for podules
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* and channels 0,1 for internal devices
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*/
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iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT);
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iomd_dma[DMA_0].dma_base = IOMD_IO0CURA;
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iomd_dma[DMA_0].dma_irq = IRQ_DMA0;
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iomd_dma[DMA_1].dma_base = IOMD_IO1CURA;
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iomd_dma[DMA_1].dma_irq = IRQ_DMA1;
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iomd_dma[DMA_2].dma_base = IOMD_IO2CURA;
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iomd_dma[DMA_2].dma_irq = IRQ_DMA2;
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iomd_dma[DMA_3].dma_base = IOMD_IO3CURA;
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iomd_dma[DMA_3].dma_irq = IRQ_DMA3;
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iomd_dma[DMA_S0].dma_base = IOMD_SD0CURA;
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iomd_dma[DMA_S0].dma_irq = IRQ_DMAS0;
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iomd_dma[DMA_S1].dma_base = IOMD_SD1CURA;
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iomd_dma[DMA_S1].dma_irq = IRQ_DMAS1;
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for (i = DMA_0; i <= DMA_S1; i++) {
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iomd_dma[i].d_ops = &iomd_dma_ops;
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ret = isa_dma_add(i, &iomd_dma[i]);
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if (ret)
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printk("IOMDDMA%u: unable to register: %d\n", i, ret);
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}
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ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma);
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if (ret)
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printk("IOMDFLOPPY: unable to register: %d\n", ret);
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ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma);
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if (ret)
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printk("IOMDSOUND: unable to register: %d\n", ret);
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return 0;
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}
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core_initcall(rpc_dma_init);
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@ -13,9 +13,11 @@
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#include <asm/dma.h>
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#include <asm/mach/dma.h>
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void __init arch_dma_init(dma_t *dma)
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static int __init shark_dma_init(void)
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{
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#ifdef CONFIG_ISA_DMA
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isa_init_dma(dma);
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isa_init_dma();
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#endif
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return 0;
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}
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core_initcall(shark_dma_init);
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