[POWERPC] bestcomm: core bestcomm support for Freescale MPC5200
This patch adds support for the core of the BestComm API for the Freescale MPC5200(b). The BestComm engine is a microcode-controlled / tasks-based DMA used by several of the onchip devices. Setting up the tasks / memory allocation and all common low level functions are handled by this patch. The specifics details of each tasks and their microcode are split-out in separate patches. This is not the official API, but a much cleaner one. (hopefully) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Родитель
07e6e93136
Коммит
2f9ea1bde0
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@ -315,4 +315,6 @@ config FSL_ULI1575
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config CPM
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bool
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source "arch/powerpc/sysdev/bestcomm/Kconfig"
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endmenu
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@ -14,6 +14,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
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obj-$(CONFIG_FSL_PCI) += fsl_pci.o
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obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
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obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
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obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
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mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
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obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
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mv64x60_udbg.o
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@ -0,0 +1,18 @@
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#
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# Kconfig options for Bestcomm
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#
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config PPC_BESTCOMM
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tristate "Bestcomm DMA engine support"
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depends on PPC_MPC52xx
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default n
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select PPC_LIB_RHEAP
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help
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BestComm is the name of the communication coprocessor found
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on the Freescale MPC5200 family of processor. It's usage is
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optionnal for some drivers (like ATA), but required for
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others (like FEC).
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If you want to use drivers that require DMA operations,
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answer Y or M. Otherwise say N.
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@ -0,0 +1,8 @@
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#
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# Makefile for BestComm & co
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#
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bestcomm-core-objs := bestcomm.o sram.o
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obj-$(CONFIG_PPC_BESTCOMM) += bestcomm-core.o
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@ -0,0 +1,528 @@
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/*
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* Driver for MPC52xx processor BestComm peripheral controller
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*
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*
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* Copyright (C) 2006-2007 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2005 Varma Electronics Oy,
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* ( by Andrey Volkov <avolkov@varma-el.com> )
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* Copyright (C) 2003-2004 MontaVista, Software, Inc.
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* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mpc52xx.h>
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#include "sram.h"
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#include "bestcomm_priv.h"
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#include "bestcomm.h"
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#define DRIVER_NAME "bestcomm-core"
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struct bcom_engine *bcom_eng = NULL;
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EXPORT_SYMBOL_GPL(bcom_eng); /* needed for inline functions */
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/* ======================================================================== */
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/* Public and private API */
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/* ======================================================================== */
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/* Private API */
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struct bcom_task *
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bcom_task_alloc(int bd_count, int bd_size, int priv_size)
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{
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int i, tasknum = -1;
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struct bcom_task *tsk;
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/* Get and reserve a task num */
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spin_lock(&bcom_eng->lock);
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for (i=0; i<BCOM_MAX_TASKS; i++)
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if (!bcom_eng->tdt[i].stop) { /* we use stop as a marker */
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bcom_eng->tdt[i].stop = 0xfffffffful; /* dummy addr */
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tasknum = i;
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break;
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}
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spin_unlock(&bcom_eng->lock);
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if (tasknum < 0)
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return NULL;
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/* Allocate our structure */
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tsk = kzalloc(sizeof(struct bcom_task) + priv_size, GFP_KERNEL);
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if (!tsk)
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goto error;
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tsk->tasknum = tasknum;
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if (priv_size)
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tsk->priv = (void*)tsk + sizeof(struct bcom_task);
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/* Get IRQ of that task */
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tsk->irq = irq_of_parse_and_map(bcom_eng->ofnode, tsk->tasknum);
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if (tsk->irq == NO_IRQ)
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goto error;
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/* Init the BDs, if needed */
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if (bd_count) {
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tsk->cookie = kmalloc(sizeof(void*) * bd_count, GFP_KERNEL);
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if (!tsk->cookie)
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goto error;
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tsk->bd = bcom_sram_alloc(bd_count * bd_size, 4, &tsk->bd_pa);
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if (!tsk->bd)
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goto error;
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memset(tsk->bd, 0x00, bd_count * bd_size);
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tsk->num_bd = bd_count;
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tsk->bd_size = bd_size;
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}
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return tsk;
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error:
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if (tsk) {
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if (tsk->irq != NO_IRQ)
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irq_dispose_mapping(tsk->irq);
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bcom_sram_free(tsk->bd);
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kfree(tsk->cookie);
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kfree(tsk);
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}
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bcom_eng->tdt[tasknum].stop = 0;
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return NULL;
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}
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EXPORT_SYMBOL_GPL(bcom_task_alloc);
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void
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bcom_task_free(struct bcom_task *tsk)
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{
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/* Stop the task */
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bcom_disable_task(tsk->tasknum);
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/* Clear TDT */
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bcom_eng->tdt[tsk->tasknum].start = 0;
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bcom_eng->tdt[tsk->tasknum].stop = 0;
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/* Free everything */
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irq_dispose_mapping(tsk->irq);
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bcom_sram_free(tsk->bd);
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kfree(tsk->cookie);
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kfree(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_task_free);
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int
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bcom_load_image(int task, u32 *task_image)
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{
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struct bcom_task_header *hdr = (struct bcom_task_header *)task_image;
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struct bcom_tdt *tdt;
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u32 *desc, *var, *inc;
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u32 *desc_src, *var_src, *inc_src;
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/* Safety checks */
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if (hdr->magic != BCOM_TASK_MAGIC) {
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printk(KERN_ERR DRIVER_NAME
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": Trying to load invalid microcode\n");
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return -EINVAL;
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}
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if ((task < 0) || (task >= BCOM_MAX_TASKS)) {
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printk(KERN_ERR DRIVER_NAME
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": Trying to load invalid task %d\n", task);
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return -EINVAL;
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}
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/* Initial load or reload */
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tdt = &bcom_eng->tdt[task];
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if (tdt->start) {
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desc = bcom_task_desc(task);
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if (hdr->desc_size != bcom_task_num_descs(task)) {
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printk(KERN_ERR DRIVER_NAME
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": Trying to reload wrong task image "
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"(%d size %d/%d)!\n",
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task,
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hdr->desc_size,
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bcom_task_num_descs(task));
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return -EINVAL;
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}
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} else {
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phys_addr_t start_pa;
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desc = bcom_sram_alloc(hdr->desc_size * sizeof(u32), 4, &start_pa);
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if (!desc)
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return -ENOMEM;
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tdt->start = start_pa;
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tdt->stop = start_pa + ((hdr->desc_size-1) * sizeof(u32));
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}
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var = bcom_task_var(task);
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inc = bcom_task_inc(task);
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/* Clear & copy */
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memset(var, 0x00, BCOM_VAR_SIZE);
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memset(inc, 0x00, BCOM_INC_SIZE);
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desc_src = (u32 *)(hdr + 1);
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var_src = desc_src + hdr->desc_size;
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inc_src = var_src + hdr->var_size;
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memcpy(desc, desc_src, hdr->desc_size * sizeof(u32));
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memcpy(var + hdr->first_var, var_src, hdr->var_size * sizeof(u32));
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memcpy(inc, inc_src, hdr->inc_size * sizeof(u32));
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_load_image);
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void
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bcom_set_initiator(int task, int initiator)
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{
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int i;
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int num_descs;
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u32 *desc;
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int next_drd_has_initiator;
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bcom_set_tcr_initiator(task, initiator);
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/* Just setting tcr is apparently not enough due to some problem */
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/* with it. So we just go thru all the microcode and replace in */
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/* the DRD directly */
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desc = bcom_task_desc(task);
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next_drd_has_initiator = 1;
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num_descs = bcom_task_num_descs(task);
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for (i=0; i<num_descs; i++, desc++) {
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if (!bcom_desc_is_drd(*desc))
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continue;
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if (next_drd_has_initiator)
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if (bcom_desc_initiator(*desc) != BCOM_INITIATOR_ALWAYS)
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bcom_set_desc_initiator(desc, initiator);
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next_drd_has_initiator = !bcom_drd_is_extended(*desc);
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}
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}
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EXPORT_SYMBOL_GPL(bcom_set_initiator);
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/* Public API */
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void
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bcom_enable(struct bcom_task *tsk)
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{
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bcom_enable_task(tsk->tasknum);
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}
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EXPORT_SYMBOL_GPL(bcom_enable);
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void
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bcom_disable(struct bcom_task *tsk)
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{
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bcom_disable_task(tsk->tasknum);
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}
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EXPORT_SYMBOL_GPL(bcom_disable);
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/* ======================================================================== */
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/* Engine init/cleanup */
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/* ======================================================================== */
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/* Function Descriptor table */
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/* this will need to be updated if Freescale changes their task code FDT */
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static u32 fdt_ops[] = {
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0xa0045670, /* FDT[48] - load_acc() */
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0x80045670, /* FDT[49] - unload_acc() */
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0x21800000, /* FDT[50] - and() */
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0x21e00000, /* FDT[51] - or() */
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0x21500000, /* FDT[52] - xor() */
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0x21400000, /* FDT[53] - andn() */
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0x21500000, /* FDT[54] - not() */
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0x20400000, /* FDT[55] - add() */
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0x20500000, /* FDT[56] - sub() */
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0x20800000, /* FDT[57] - lsh() */
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0x20a00000, /* FDT[58] - rsh() */
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0xc0170000, /* FDT[59] - crc8() */
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0xc0145670, /* FDT[60] - crc16() */
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0xc0345670, /* FDT[61] - crc32() */
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0xa0076540, /* FDT[62] - endian32() */
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0xa0000760, /* FDT[63] - endian16() */
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};
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static int __devinit
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bcom_engine_init(void)
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{
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int task;
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phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
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unsigned int tdt_size, ctx_size, var_size, fdt_size;
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/* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */
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tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
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ctx_size = BCOM_MAX_TASKS * BCOM_CTX_SIZE;
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var_size = BCOM_MAX_TASKS * (BCOM_VAR_SIZE + BCOM_INC_SIZE);
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fdt_size = BCOM_FDT_SIZE;
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bcom_eng->tdt = bcom_sram_alloc(tdt_size, sizeof(u32), &tdt_pa);
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bcom_eng->ctx = bcom_sram_alloc(ctx_size, BCOM_CTX_ALIGN, &ctx_pa);
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bcom_eng->var = bcom_sram_alloc(var_size, BCOM_VAR_ALIGN, &var_pa);
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bcom_eng->fdt = bcom_sram_alloc(fdt_size, BCOM_FDT_ALIGN, &fdt_pa);
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if (!bcom_eng->tdt || !bcom_eng->ctx || !bcom_eng->var || !bcom_eng->fdt) {
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printk(KERN_ERR "DMA: SRAM alloc failed in engine init !\n");
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bcom_sram_free(bcom_eng->tdt);
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bcom_sram_free(bcom_eng->ctx);
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bcom_sram_free(bcom_eng->var);
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bcom_sram_free(bcom_eng->fdt);
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return -ENOMEM;
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}
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memset(bcom_eng->tdt, 0x00, tdt_size);
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memset(bcom_eng->ctx, 0x00, ctx_size);
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memset(bcom_eng->var, 0x00, var_size);
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memset(bcom_eng->fdt, 0x00, fdt_size);
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/* Copy the FDT for the EU#3 */
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memcpy(&bcom_eng->fdt[48], fdt_ops, sizeof(fdt_ops));
|
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|
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/* Initialize Task base structure */
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for (task=0; task<BCOM_MAX_TASKS; task++)
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{
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out_be16(&bcom_eng->regs->tcr[task], 0);
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out_8(&bcom_eng->regs->ipr[task], 0);
|
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bcom_eng->tdt[task].context = ctx_pa;
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bcom_eng->tdt[task].var = var_pa;
|
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bcom_eng->tdt[task].fdt = fdt_pa;
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var_pa += BCOM_VAR_SIZE + BCOM_INC_SIZE;
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ctx_pa += BCOM_CTX_SIZE;
|
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}
|
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out_be32(&bcom_eng->regs->taskBar, tdt_pa);
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/* Init 'always' initiator */
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out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
|
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|
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/* Disable COMM Bus Prefetch, apparently it's not reliable yet */
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/* FIXME: This should be done on 5200 and not 5200B ... */
|
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out_be16(&bcom_eng->regs->PtdCntrl, in_be16(&bcom_eng->regs->PtdCntrl) | 1);
|
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|
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/* Init lock */
|
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spin_lock_init(&bcom_eng->lock);
|
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|
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return 0;
|
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}
|
||||
|
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static void
|
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bcom_engine_cleanup(void)
|
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{
|
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int task;
|
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|
||||
/* Stop all tasks */
|
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for (task=0; task<BCOM_MAX_TASKS; task++)
|
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{
|
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out_be16(&bcom_eng->regs->tcr[task], 0);
|
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out_8(&bcom_eng->regs->ipr[task], 0);
|
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}
|
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|
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out_be32(&bcom_eng->regs->taskBar, 0ul);
|
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|
||||
/* Release the SRAM zones */
|
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bcom_sram_free(bcom_eng->tdt);
|
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bcom_sram_free(bcom_eng->ctx);
|
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bcom_sram_free(bcom_eng->var);
|
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bcom_sram_free(bcom_eng->fdt);
|
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}
|
||||
|
||||
|
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/* ======================================================================== */
|
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/* OF platform driver */
|
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/* ======================================================================== */
|
||||
|
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static int __devinit
|
||||
mpc52xx_bcom_probe(struct of_device *op, const struct of_device_id *match)
|
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{
|
||||
struct device_node *ofn_sram;
|
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struct resource res_bcom;
|
||||
|
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int rv;
|
||||
|
||||
/* Inform user we're ok so far */
|
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printk(KERN_INFO "DMA: MPC52xx BestComm driver\n");
|
||||
|
||||
/* Get the bestcomm node */
|
||||
of_node_get(op->node);
|
||||
|
||||
/* Prepare SRAM */
|
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ofn_sram = of_find_compatible_node(NULL, "sram", "mpc5200-sram");
|
||||
if (!ofn_sram) {
|
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printk(KERN_ERR DRIVER_NAME ": "
|
||||
"No SRAM found in device tree\n");
|
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rv = -ENODEV;
|
||||
goto error_ofput;
|
||||
}
|
||||
rv = bcom_sram_init(ofn_sram, DRIVER_NAME);
|
||||
of_node_put(ofn_sram);
|
||||
|
||||
if (rv) {
|
||||
printk(KERN_ERR DRIVER_NAME ": "
|
||||
"Error in SRAM init\n");
|
||||
goto error_ofput;
|
||||
}
|
||||
|
||||
/* Get a clean struct */
|
||||
bcom_eng = kzalloc(sizeof(struct bcom_engine), GFP_KERNEL);
|
||||
if (!bcom_eng) {
|
||||
printk(KERN_ERR DRIVER_NAME ": "
|
||||
"Can't allocate state structure\n");
|
||||
rv = -ENOMEM;
|
||||
goto error_sramclean;
|
||||
}
|
||||
|
||||
/* Save the node */
|
||||
bcom_eng->ofnode = op->node;
|
||||
|
||||
/* Get, reserve & map io */
|
||||
if (of_address_to_resource(op->node, 0, &res_bcom)) {
|
||||
printk(KERN_ERR DRIVER_NAME ": "
|
||||
"Can't get resource\n");
|
||||
rv = -EINVAL;
|
||||
goto error_sramclean;
|
||||
}
|
||||
|
||||
if (!request_mem_region(res_bcom.start, sizeof(struct mpc52xx_sdma),
|
||||
DRIVER_NAME)) {
|
||||
printk(KERN_ERR DRIVER_NAME ": "
|
||||
"Can't request registers region\n");
|
||||
rv = -EBUSY;
|
||||
goto error_sramclean;
|
||||
}
|
||||
|
||||
bcom_eng->regs_base = res_bcom.start;
|
||||
bcom_eng->regs = ioremap(res_bcom.start, sizeof(struct mpc52xx_sdma));
|
||||
if (!bcom_eng->regs) {
|
||||
printk(KERN_ERR DRIVER_NAME ": "
|
||||
"Can't map registers\n");
|
||||
rv = -ENOMEM;
|
||||
goto error_release;
|
||||
}
|
||||
|
||||
/* Now, do the real init */
|
||||
rv = bcom_engine_init();
|
||||
if (rv)
|
||||
goto error_unmap;
|
||||
|
||||
/* Done ! */
|
||||
printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n",
|
||||
bcom_eng->regs_base);
|
||||
|
||||
return 0;
|
||||
|
||||
/* Error path */
|
||||
error_unmap:
|
||||
iounmap(bcom_eng->regs);
|
||||
error_release:
|
||||
release_mem_region(res_bcom.start, sizeof(struct mpc52xx_sdma));
|
||||
error_sramclean:
|
||||
kfree(bcom_eng);
|
||||
bcom_sram_cleanup();
|
||||
error_ofput:
|
||||
of_node_put(op->node);
|
||||
|
||||
printk(KERN_ERR "DMA: MPC52xx BestComm init failed !\n");
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
mpc52xx_bcom_remove(struct of_device *op)
|
||||
{
|
||||
/* Clean up the engine */
|
||||
bcom_engine_cleanup();
|
||||
|
||||
/* Cleanup SRAM */
|
||||
bcom_sram_cleanup();
|
||||
|
||||
/* Release regs */
|
||||
iounmap(bcom_eng->regs);
|
||||
release_mem_region(bcom_eng->regs_base, sizeof(struct mpc52xx_sdma));
|
||||
|
||||
/* Release the node */
|
||||
of_node_put(bcom_eng->ofnode);
|
||||
|
||||
/* Release memory */
|
||||
kfree(bcom_eng);
|
||||
bcom_eng = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id mpc52xx_bcom_of_match[] = {
|
||||
{
|
||||
.type = "dma-controller",
|
||||
.compatible = "mpc5200-bestcomm",
|
||||
},
|
||||
{},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, mpc52xx_bcom_of_match);
|
||||
|
||||
|
||||
static struct of_platform_driver mpc52xx_bcom_of_platform_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = DRIVER_NAME,
|
||||
.match_table = mpc52xx_bcom_of_match,
|
||||
.probe = mpc52xx_bcom_probe,
|
||||
.remove = mpc52xx_bcom_remove,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Module */
|
||||
/* ======================================================================== */
|
||||
|
||||
static int __init
|
||||
mpc52xx_bcom_init(void)
|
||||
{
|
||||
return of_register_platform_driver(&mpc52xx_bcom_of_platform_driver);
|
||||
}
|
||||
|
||||
static void __exit
|
||||
mpc52xx_bcom_exit(void)
|
||||
{
|
||||
of_unregister_platform_driver(&mpc52xx_bcom_of_platform_driver);
|
||||
}
|
||||
|
||||
/* If we're not a module, we must make sure everything is setup before */
|
||||
/* anyone tries to use us ... that's why we use subsys_initcall instead */
|
||||
/* of module_init. */
|
||||
subsys_initcall(mpc52xx_bcom_init);
|
||||
module_exit(mpc52xx_bcom_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Freescale MPC52xx BestComm DMA");
|
||||
MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
|
||||
MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
|
||||
MODULE_AUTHOR("Dale Farnsworth <dfarnsworth@mvista.com>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,190 @@
|
|||
/*
|
||||
* Public header for the MPC52xx processor BestComm driver
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
|
||||
* Copyright (C) 2005 Varma Electronics Oy,
|
||||
* ( by Andrey Volkov <avolkov@varma-el.com> )
|
||||
* Copyright (C) 2003-2004 MontaVista, Software, Inc.
|
||||
* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef __BESTCOMM_H__
|
||||
#define __BESTCOMM_H__
|
||||
|
||||
struct bcom_bd; /* defined later on ... */
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Generic task managment */
|
||||
/* ======================================================================== */
|
||||
|
||||
/**
|
||||
* struct bcom_task - Structure describing a loaded BestComm task
|
||||
*
|
||||
* This structure is never built by the driver it self. It's built and
|
||||
* filled the intermediate layer of the BestComm API, the task dependent
|
||||
* support code.
|
||||
*
|
||||
* Most likely you don't need to poke around inside this structure. The
|
||||
* fields are exposed in the header just for the sake of inline functions
|
||||
*/
|
||||
struct bcom_task {
|
||||
unsigned int tasknum;
|
||||
unsigned int flags;
|
||||
int irq;
|
||||
|
||||
struct bcom_bd *bd;
|
||||
phys_addr_t bd_pa;
|
||||
void **cookie;
|
||||
unsigned short index;
|
||||
unsigned short outdex;
|
||||
unsigned int num_bd;
|
||||
unsigned int bd_size;
|
||||
|
||||
void* priv;
|
||||
};
|
||||
|
||||
#define BCOM_FLAGS_NONE 0x00000000ul
|
||||
#define BCOM_FLAGS_ENABLE_TASK (1ul << 0)
|
||||
|
||||
/**
|
||||
* bcom_enable - Enable a BestComm task
|
||||
* @tsk: The BestComm task structure
|
||||
*
|
||||
* This function makes sure the given task is enabled and can be run
|
||||
* by the BestComm engine as needed
|
||||
*/
|
||||
extern void bcom_enable(struct bcom_task *tsk);
|
||||
|
||||
/**
|
||||
* bcom_disable - Disable a BestComm task
|
||||
* @tsk: The BestComm task structure
|
||||
*
|
||||
* This function disable a given task, making sure it's not executed
|
||||
* by the BestComm engine.
|
||||
*/
|
||||
extern void bcom_disable(struct bcom_task *tsk);
|
||||
|
||||
|
||||
/**
|
||||
* bcom_get_task_irq - Returns the irq number of a BestComm task
|
||||
* @tsk: The BestComm task structure
|
||||
*/
|
||||
static inline int
|
||||
bcom_get_task_irq(struct bcom_task *tsk) {
|
||||
return tsk->irq;
|
||||
}
|
||||
|
||||
/* ======================================================================== */
|
||||
/* BD based tasks helpers */
|
||||
/* ======================================================================== */
|
||||
|
||||
/**
|
||||
* struct bcom_bd - Structure describing a generic BestComm buffer descriptor
|
||||
* @status: The current status of this buffer. Exact meaning depends on the
|
||||
* task type
|
||||
* @data: An array of u32 whose meaning depends on the task type.
|
||||
*/
|
||||
struct bcom_bd {
|
||||
u32 status;
|
||||
u32 data[1]; /* variable, but at least 1 */
|
||||
};
|
||||
|
||||
#define BCOM_BD_READY 0x40000000ul
|
||||
|
||||
/** _bcom_next_index - Get next input index.
|
||||
* @tsk: pointer to task structure
|
||||
*
|
||||
* Support function; Device drivers should not call this
|
||||
*/
|
||||
static inline int
|
||||
_bcom_next_index(struct bcom_task *tsk)
|
||||
{
|
||||
return ((tsk->index + 1) == tsk->num_bd) ? 0 : tsk->index + 1;
|
||||
}
|
||||
|
||||
/** _bcom_next_outdex - Get next output index.
|
||||
* @tsk: pointer to task structure
|
||||
*
|
||||
* Support function; Device drivers should not call this
|
||||
*/
|
||||
static inline int
|
||||
_bcom_next_outdex(struct bcom_task *tsk)
|
||||
{
|
||||
return ((tsk->outdex + 1) == tsk->num_bd) ? 0 : tsk->outdex + 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* bcom_queue_empty - Checks if a BestComm task BD queue is empty
|
||||
* @tsk: The BestComm task structure
|
||||
*/
|
||||
static inline int
|
||||
bcom_queue_empty(struct bcom_task *tsk)
|
||||
{
|
||||
return tsk->index == tsk->outdex;
|
||||
}
|
||||
|
||||
/**
|
||||
* bcom_queue_full - Checks if a BestComm task BD queue is full
|
||||
* @tsk: The BestComm task structure
|
||||
*/
|
||||
static inline int
|
||||
bcom_queue_full(struct bcom_task *tsk)
|
||||
{
|
||||
return tsk->outdex == _bcom_next_index(tsk);
|
||||
}
|
||||
|
||||
/**
|
||||
* bcom_buffer_done - Checks if a BestComm
|
||||
* @tsk: The BestComm task structure
|
||||
*/
|
||||
static inline int
|
||||
bcom_buffer_done(struct bcom_task *tsk)
|
||||
{
|
||||
if (bcom_queue_empty(tsk))
|
||||
return 0;
|
||||
return !(tsk->bd[tsk->outdex].status & BCOM_BD_READY);
|
||||
}
|
||||
|
||||
/**
|
||||
* bcom_prepare_next_buffer - clear status of next available buffer.
|
||||
* @tsk: The BestComm task structure
|
||||
*
|
||||
* Returns pointer to next buffer descriptor
|
||||
*/
|
||||
static inline struct bcom_bd *
|
||||
bcom_prepare_next_buffer(struct bcom_task *tsk)
|
||||
{
|
||||
tsk->bd[tsk->index].status = 0; /* cleanup last status */
|
||||
return &tsk->bd[tsk->index];
|
||||
}
|
||||
|
||||
static inline void
|
||||
bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie)
|
||||
{
|
||||
tsk->cookie[tsk->index] = cookie;
|
||||
mb(); /* ensure the bd is really up-to-date */
|
||||
tsk->bd[tsk->index].status |= BCOM_BD_READY;
|
||||
tsk->index = _bcom_next_index(tsk);
|
||||
if (tsk->flags & BCOM_FLAGS_ENABLE_TASK)
|
||||
bcom_enable(tsk);
|
||||
}
|
||||
|
||||
static inline void *
|
||||
bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd)
|
||||
{
|
||||
void *cookie = tsk->cookie[tsk->outdex];
|
||||
if (p_status)
|
||||
*p_status = tsk->bd[tsk->outdex].status;
|
||||
if (p_bd)
|
||||
*p_bd = &tsk->bd[tsk->outdex];
|
||||
tsk->outdex = _bcom_next_outdex(tsk);
|
||||
return cookie;
|
||||
}
|
||||
|
||||
#endif /* __BESTCOMM_H__ */
|
|
@ -0,0 +1,334 @@
|
|||
/*
|
||||
* Private header for the MPC52xx processor BestComm driver
|
||||
*
|
||||
* By private, we mean that driver should not use it directly. It's meant
|
||||
* to be used by the BestComm engine driver itself and by the intermediate
|
||||
* layer between the core and the drivers.
|
||||
*
|
||||
* Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
|
||||
* Copyright (C) 2005 Varma Electronics Oy,
|
||||
* ( by Andrey Volkov <avolkov@varma-el.com> )
|
||||
* Copyright (C) 2003-2004 MontaVista, Software, Inc.
|
||||
* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef __BESTCOMM_PRIV_H__
|
||||
#define __BESTCOMM_PRIV_H__
|
||||
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/of.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/mpc52xx.h>
|
||||
|
||||
#include "sram.h"
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Engine related stuff */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Zones sizes and needed alignments */
|
||||
#define BCOM_MAX_TASKS 16
|
||||
#define BCOM_MAX_VAR 24
|
||||
#define BCOM_MAX_INC 8
|
||||
#define BCOM_MAX_FDT 64
|
||||
#define BCOM_MAX_CTX 20
|
||||
#define BCOM_CTX_SIZE (BCOM_MAX_CTX * sizeof(u32))
|
||||
#define BCOM_CTX_ALIGN 0x100
|
||||
#define BCOM_VAR_SIZE (BCOM_MAX_VAR * sizeof(u32))
|
||||
#define BCOM_INC_SIZE (BCOM_MAX_INC * sizeof(u32))
|
||||
#define BCOM_VAR_ALIGN 0x80
|
||||
#define BCOM_FDT_SIZE (BCOM_MAX_FDT * sizeof(u32))
|
||||
#define BCOM_FDT_ALIGN 0x100
|
||||
|
||||
/**
|
||||
* struct bcom_tdt - Task Descriptor Table Entry
|
||||
*
|
||||
*/
|
||||
struct bcom_tdt {
|
||||
u32 start;
|
||||
u32 stop;
|
||||
u32 var;
|
||||
u32 fdt;
|
||||
u32 exec_status; /* used internally by BestComm engine */
|
||||
u32 mvtp; /* used internally by BestComm engine */
|
||||
u32 context;
|
||||
u32 litbase;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bcom_engine
|
||||
*
|
||||
* This holds all info needed globaly to handle the engine
|
||||
*/
|
||||
struct bcom_engine {
|
||||
struct device_node *ofnode;
|
||||
struct mpc52xx_sdma __iomem *regs;
|
||||
phys_addr_t regs_base;
|
||||
|
||||
struct bcom_tdt *tdt;
|
||||
u32 *ctx;
|
||||
u32 *var;
|
||||
u32 *fdt;
|
||||
|
||||
spinlock_t lock;
|
||||
};
|
||||
|
||||
extern struct bcom_engine *bcom_eng;
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Tasks related stuff */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Tasks image header */
|
||||
#define BCOM_TASK_MAGIC 0x4243544B /* 'BCTK' */
|
||||
|
||||
struct bcom_task_header {
|
||||
u32 magic;
|
||||
u8 desc_size; /* the size fields */
|
||||
u8 var_size; /* are given in number */
|
||||
u8 inc_size; /* of 32-bits words */
|
||||
u8 first_var;
|
||||
u8 reserved[8];
|
||||
};
|
||||
|
||||
/* Descriptors stucture & co */
|
||||
#define BCOM_DESC_NOP 0x000001f8
|
||||
#define BCOM_LCD_MASK 0x80000000
|
||||
#define BCOM_DRD_EXTENDED 0x40000000
|
||||
#define BCOM_DRD_INITIATOR_SHIFT 21
|
||||
|
||||
/* Tasks pragma */
|
||||
#define BCOM_PRAGMA_BIT_RSV 7 /* reserved pragma bit */
|
||||
#define BCOM_PRAGMA_BIT_PRECISE_INC 6 /* increment 0=when possible, */
|
||||
/* 1=iter end */
|
||||
#define BCOM_PRAGMA_BIT_RST_ERROR_NO 5 /* don't reset errors on */
|
||||
/* task enable */
|
||||
#define BCOM_PRAGMA_BIT_PACK 4 /* pack data enable */
|
||||
#define BCOM_PRAGMA_BIT_INTEGER 3 /* data alignment */
|
||||
/* 0=frac(msb), 1=int(lsb) */
|
||||
#define BCOM_PRAGMA_BIT_SPECREAD 2 /* XLB speculative read */
|
||||
#define BCOM_PRAGMA_BIT_CW 1 /* write line buffer enable */
|
||||
#define BCOM_PRAGMA_BIT_RL 0 /* read line buffer enable */
|
||||
|
||||
/* Looks like XLB speculative read generates XLB errors when a buffer
|
||||
* is at the end of the physical memory. i.e. when accessing the
|
||||
* lasts words, the engine tries to prefetch the next but there is no
|
||||
* next ...
|
||||
*/
|
||||
#define BCOM_STD_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \
|
||||
(0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \
|
||||
(0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \
|
||||
(0 << BCOM_PRAGMA_BIT_PACK) | \
|
||||
(0 << BCOM_PRAGMA_BIT_INTEGER) | \
|
||||
(0 << BCOM_PRAGMA_BIT_SPECREAD) | \
|
||||
(1 << BCOM_PRAGMA_BIT_CW) | \
|
||||
(1 << BCOM_PRAGMA_BIT_RL))
|
||||
|
||||
#define BCOM_PCI_PRAGMA ((0 << BCOM_PRAGMA_BIT_RSV) | \
|
||||
(0 << BCOM_PRAGMA_BIT_PRECISE_INC) | \
|
||||
(0 << BCOM_PRAGMA_BIT_RST_ERROR_NO) | \
|
||||
(0 << BCOM_PRAGMA_BIT_PACK) | \
|
||||
(1 << BCOM_PRAGMA_BIT_INTEGER) | \
|
||||
(0 << BCOM_PRAGMA_BIT_SPECREAD) | \
|
||||
(1 << BCOM_PRAGMA_BIT_CW) | \
|
||||
(1 << BCOM_PRAGMA_BIT_RL))
|
||||
|
||||
#define BCOM_ATA_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_CRC16_DP_0_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_CRC16_DP_1_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_FEC_RX_BD_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_FEC_TX_BD_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_DP_0_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_DP_1_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_DP_2_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_DP_3_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_DP_BD_0_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_DP_BD_1_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_RX_BD_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_TX_BD_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_GEN_LPC_PRAGMA BCOM_STD_PRAGMA
|
||||
#define BCOM_PCI_RX_PRAGMA BCOM_PCI_PRAGMA
|
||||
#define BCOM_PCI_TX_PRAGMA BCOM_PCI_PRAGMA
|
||||
|
||||
/* Initiators number */
|
||||
#define BCOM_INITIATOR_ALWAYS 0
|
||||
#define BCOM_INITIATOR_SCTMR_0 1
|
||||
#define BCOM_INITIATOR_SCTMR_1 2
|
||||
#define BCOM_INITIATOR_FEC_RX 3
|
||||
#define BCOM_INITIATOR_FEC_TX 4
|
||||
#define BCOM_INITIATOR_ATA_RX 5
|
||||
#define BCOM_INITIATOR_ATA_TX 6
|
||||
#define BCOM_INITIATOR_SCPCI_RX 7
|
||||
#define BCOM_INITIATOR_SCPCI_TX 8
|
||||
#define BCOM_INITIATOR_PSC3_RX 9
|
||||
#define BCOM_INITIATOR_PSC3_TX 10
|
||||
#define BCOM_INITIATOR_PSC2_RX 11
|
||||
#define BCOM_INITIATOR_PSC2_TX 12
|
||||
#define BCOM_INITIATOR_PSC1_RX 13
|
||||
#define BCOM_INITIATOR_PSC1_TX 14
|
||||
#define BCOM_INITIATOR_SCTMR_2 15
|
||||
#define BCOM_INITIATOR_SCLPC 16
|
||||
#define BCOM_INITIATOR_PSC5_RX 17
|
||||
#define BCOM_INITIATOR_PSC5_TX 18
|
||||
#define BCOM_INITIATOR_PSC4_RX 19
|
||||
#define BCOM_INITIATOR_PSC4_TX 20
|
||||
#define BCOM_INITIATOR_I2C2_RX 21
|
||||
#define BCOM_INITIATOR_I2C2_TX 22
|
||||
#define BCOM_INITIATOR_I2C1_RX 23
|
||||
#define BCOM_INITIATOR_I2C1_TX 24
|
||||
#define BCOM_INITIATOR_PSC6_RX 25
|
||||
#define BCOM_INITIATOR_PSC6_TX 26
|
||||
#define BCOM_INITIATOR_IRDA_RX 25
|
||||
#define BCOM_INITIATOR_IRDA_TX 26
|
||||
#define BCOM_INITIATOR_SCTMR_3 27
|
||||
#define BCOM_INITIATOR_SCTMR_4 28
|
||||
#define BCOM_INITIATOR_SCTMR_5 29
|
||||
#define BCOM_INITIATOR_SCTMR_6 30
|
||||
#define BCOM_INITIATOR_SCTMR_7 31
|
||||
|
||||
/* Initiators priorities */
|
||||
#define BCOM_IPR_ALWAYS 7
|
||||
#define BCOM_IPR_SCTMR_0 2
|
||||
#define BCOM_IPR_SCTMR_1 2
|
||||
#define BCOM_IPR_FEC_RX 6
|
||||
#define BCOM_IPR_FEC_TX 5
|
||||
#define BCOM_IPR_ATA_RX 4
|
||||
#define BCOM_IPR_ATA_TX 3
|
||||
#define BCOM_IPR_SCPCI_RX 2
|
||||
#define BCOM_IPR_SCPCI_TX 2
|
||||
#define BCOM_IPR_PSC3_RX 2
|
||||
#define BCOM_IPR_PSC3_TX 2
|
||||
#define BCOM_IPR_PSC2_RX 2
|
||||
#define BCOM_IPR_PSC2_TX 2
|
||||
#define BCOM_IPR_PSC1_RX 2
|
||||
#define BCOM_IPR_PSC1_TX 2
|
||||
#define BCOM_IPR_SCTMR_2 2
|
||||
#define BCOM_IPR_SCLPC 2
|
||||
#define BCOM_IPR_PSC5_RX 2
|
||||
#define BCOM_IPR_PSC5_TX 2
|
||||
#define BCOM_IPR_PSC4_RX 2
|
||||
#define BCOM_IPR_PSC4_TX 2
|
||||
#define BCOM_IPR_I2C2_RX 2
|
||||
#define BCOM_IPR_I2C2_TX 2
|
||||
#define BCOM_IPR_I2C1_RX 2
|
||||
#define BCOM_IPR_I2C1_TX 2
|
||||
#define BCOM_IPR_PSC6_RX 2
|
||||
#define BCOM_IPR_PSC6_TX 2
|
||||
#define BCOM_IPR_IRDA_RX 2
|
||||
#define BCOM_IPR_IRDA_TX 2
|
||||
#define BCOM_IPR_SCTMR_3 2
|
||||
#define BCOM_IPR_SCTMR_4 2
|
||||
#define BCOM_IPR_SCTMR_5 2
|
||||
#define BCOM_IPR_SCTMR_6 2
|
||||
#define BCOM_IPR_SCTMR_7 2
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* API */
|
||||
/* ======================================================================== */
|
||||
|
||||
extern struct bcom_task *bcom_task_alloc(int bd_count, int bd_size, int priv_size);
|
||||
extern void bcom_task_free(struct bcom_task *tsk);
|
||||
extern int bcom_load_image(int task, u32 *task_image);
|
||||
extern void bcom_set_initiator(int task, int initiator);
|
||||
|
||||
|
||||
#define TASK_ENABLE 0x8000
|
||||
|
||||
static inline void
|
||||
bcom_enable_task(int task)
|
||||
{
|
||||
u16 reg;
|
||||
reg = in_be16(&bcom_eng->regs->tcr[task]);
|
||||
out_be16(&bcom_eng->regs->tcr[task], reg | TASK_ENABLE);
|
||||
}
|
||||
|
||||
static inline void
|
||||
bcom_disable_task(int task)
|
||||
{
|
||||
u16 reg = in_be16(&bcom_eng->regs->tcr[task]);
|
||||
out_be16(&bcom_eng->regs->tcr[task], reg & ~TASK_ENABLE);
|
||||
}
|
||||
|
||||
|
||||
static inline u32 *
|
||||
bcom_task_desc(int task)
|
||||
{
|
||||
return bcom_sram_pa2va(bcom_eng->tdt[task].start);
|
||||
}
|
||||
|
||||
static inline int
|
||||
bcom_task_num_descs(int task)
|
||||
{
|
||||
return (bcom_eng->tdt[task].stop - bcom_eng->tdt[task].start)/sizeof(u32) + 1;
|
||||
}
|
||||
|
||||
static inline u32 *
|
||||
bcom_task_var(int task)
|
||||
{
|
||||
return bcom_sram_pa2va(bcom_eng->tdt[task].var);
|
||||
}
|
||||
|
||||
static inline u32 *
|
||||
bcom_task_inc(int task)
|
||||
{
|
||||
return &bcom_task_var(task)[BCOM_MAX_VAR];
|
||||
}
|
||||
|
||||
|
||||
static inline int
|
||||
bcom_drd_is_extended(u32 desc)
|
||||
{
|
||||
return (desc) & BCOM_DRD_EXTENDED;
|
||||
}
|
||||
|
||||
static inline int
|
||||
bcom_desc_is_drd(u32 desc)
|
||||
{
|
||||
return !(desc & BCOM_LCD_MASK) && desc != BCOM_DESC_NOP;
|
||||
}
|
||||
|
||||
static inline int
|
||||
bcom_desc_initiator(u32 desc)
|
||||
{
|
||||
return (desc >> BCOM_DRD_INITIATOR_SHIFT) & 0x1f;
|
||||
}
|
||||
|
||||
static inline void
|
||||
bcom_set_desc_initiator(u32 *desc, int initiator)
|
||||
{
|
||||
*desc = (*desc & ~(0x1f << BCOM_DRD_INITIATOR_SHIFT)) |
|
||||
((initiator & 0x1f) << BCOM_DRD_INITIATOR_SHIFT);
|
||||
}
|
||||
|
||||
|
||||
static inline void
|
||||
bcom_set_task_pragma(int task, int pragma)
|
||||
{
|
||||
u32 *fdt = &bcom_eng->tdt[task].fdt;
|
||||
*fdt = (*fdt & ~0xff) | pragma;
|
||||
}
|
||||
|
||||
static inline void
|
||||
bcom_set_task_auto_start(int task, int next_task)
|
||||
{
|
||||
u16 __iomem *tcr = &bcom_eng->regs->tcr[task];
|
||||
out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task);
|
||||
}
|
||||
|
||||
static inline void
|
||||
bcom_set_tcr_initiator(int task, int initiator)
|
||||
{
|
||||
u16 __iomem *tcr = &bcom_eng->regs->tcr[task];
|
||||
out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8));
|
||||
}
|
||||
|
||||
|
||||
#endif /* __BESTCOMM_PRIV_H__ */
|
||||
|
|
@ -0,0 +1,177 @@
|
|||
/*
|
||||
* Simple memory allocator for on-board SRAM
|
||||
*
|
||||
*
|
||||
* Maintainer : Sylvain Munaut <tnt@246tNt.com>
|
||||
*
|
||||
* Copyright (C) 2005 Sylvain Munaut <tnt@246tNt.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mmu.h>
|
||||
|
||||
#include "sram.h"
|
||||
|
||||
|
||||
/* Struct keeping our 'state' */
|
||||
struct bcom_sram *bcom_sram = NULL;
|
||||
EXPORT_SYMBOL_GPL(bcom_sram); /* needed for inline functions */
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Public API */
|
||||
/* ======================================================================== */
|
||||
/* DO NOT USE in interrupts, if needed in irq handler, we should use the
|
||||
_irqsave version of the spin_locks */
|
||||
|
||||
int bcom_sram_init(struct device_node *sram_node, char *owner)
|
||||
{
|
||||
int rv;
|
||||
const u32 *regaddr_p;
|
||||
u64 regaddr64, size64;
|
||||
unsigned int psize;
|
||||
|
||||
/* Create our state struct */
|
||||
if (bcom_sram) {
|
||||
printk(KERN_ERR "%s: bcom_sram_init: "
|
||||
"Already initialized !\n", owner);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
bcom_sram = kmalloc(sizeof(struct bcom_sram), GFP_KERNEL);
|
||||
if (!bcom_sram) {
|
||||
printk(KERN_ERR "%s: bcom_sram_init: "
|
||||
"Couldn't allocate internal state !\n", owner);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Get address and size of the sram */
|
||||
regaddr_p = of_get_address(sram_node, 0, &size64, NULL);
|
||||
if (!regaddr_p) {
|
||||
printk(KERN_ERR "%s: bcom_sram_init: "
|
||||
"Invalid device node !\n", owner);
|
||||
rv = -EINVAL;
|
||||
goto error_free;
|
||||
}
|
||||
|
||||
regaddr64 = of_translate_address(sram_node, regaddr_p);
|
||||
|
||||
bcom_sram->base_phys = (phys_addr_t) regaddr64;
|
||||
bcom_sram->size = (unsigned int) size64;
|
||||
|
||||
/* Request region */
|
||||
if (!request_mem_region(bcom_sram->base_phys, bcom_sram->size, owner)) {
|
||||
printk(KERN_ERR "%s: bcom_sram_init: "
|
||||
"Couldn't request region !\n", owner);
|
||||
rv = -EBUSY;
|
||||
goto error_free;
|
||||
}
|
||||
|
||||
/* Map SRAM */
|
||||
/* sram is not really __iomem */
|
||||
bcom_sram->base_virt = (void*) ioremap(bcom_sram->base_phys, bcom_sram->size);
|
||||
|
||||
if (!bcom_sram->base_virt) {
|
||||
printk(KERN_ERR "%s: bcom_sram_init: "
|
||||
"Map error SRAM zone 0x%08lx (0x%0x)!\n",
|
||||
owner, bcom_sram->base_phys, bcom_sram->size );
|
||||
rv = -ENOMEM;
|
||||
goto error_release;
|
||||
}
|
||||
|
||||
/* Create an rheap (defaults to 32 bits word alignment) */
|
||||
bcom_sram->rh = rh_create(4);
|
||||
|
||||
/* Attach the free zones */
|
||||
#if 0
|
||||
/* Currently disabled ... for future use only */
|
||||
reg_addr_p = of_get_property(sram_node, "available", &psize);
|
||||
#else
|
||||
regaddr_p = NULL;
|
||||
psize = 0;
|
||||
#endif
|
||||
|
||||
if (!regaddr_p || !psize) {
|
||||
/* Attach the whole zone */
|
||||
rh_attach_region(bcom_sram->rh, 0, bcom_sram->size);
|
||||
} else {
|
||||
/* Attach each zone independently */
|
||||
while (psize >= 2 * sizeof(u32)) {
|
||||
phys_addr_t zbase = of_translate_address(sram_node, regaddr_p);
|
||||
rh_attach_region(bcom_sram->rh, zbase - bcom_sram->base_phys, regaddr_p[1]);
|
||||
regaddr_p += 2;
|
||||
psize -= 2 * sizeof(u32);
|
||||
}
|
||||
}
|
||||
|
||||
/* Init our spinlock */
|
||||
spin_lock_init(&bcom_sram->lock);
|
||||
|
||||
return 0;
|
||||
|
||||
error_release:
|
||||
release_mem_region(bcom_sram->base_phys, bcom_sram->size);
|
||||
error_free:
|
||||
kfree(bcom_sram);
|
||||
bcom_sram = NULL;
|
||||
|
||||
return rv;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcom_sram_init);
|
||||
|
||||
void bcom_sram_cleanup(void)
|
||||
{
|
||||
/* Free resources */
|
||||
if (bcom_sram) {
|
||||
rh_destroy(bcom_sram->rh);
|
||||
iounmap((void __iomem *)bcom_sram->base_virt);
|
||||
release_mem_region(bcom_sram->base_phys, bcom_sram->size);
|
||||
kfree(bcom_sram);
|
||||
bcom_sram = NULL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcom_sram_cleanup);
|
||||
|
||||
void* bcom_sram_alloc(int size, int align, phys_addr_t *phys)
|
||||
{
|
||||
unsigned long offset;
|
||||
|
||||
spin_lock(&bcom_sram->lock);
|
||||
offset = rh_alloc_align(bcom_sram->rh, size, align, NULL);
|
||||
spin_unlock(&bcom_sram->lock);
|
||||
|
||||
if (IS_ERR_VALUE(offset))
|
||||
return NULL;
|
||||
|
||||
*phys = bcom_sram->base_phys + offset;
|
||||
return bcom_sram->base_virt + offset;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcom_sram_alloc);
|
||||
|
||||
void bcom_sram_free(void *ptr)
|
||||
{
|
||||
unsigned long offset;
|
||||
|
||||
if (!ptr)
|
||||
return;
|
||||
|
||||
offset = ptr - bcom_sram->base_virt;
|
||||
|
||||
spin_lock(&bcom_sram->lock);
|
||||
rh_free(bcom_sram->rh, offset);
|
||||
spin_unlock(&bcom_sram->lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcom_sram_free);
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* Handling of a sram zone for bestcomm
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef __BESTCOMM_SRAM_H__
|
||||
#define __BESTCOMM_SRAM_H__
|
||||
|
||||
#include <asm/rheap.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
|
||||
/* Structure used internally */
|
||||
/* The internals are here for the inline functions
|
||||
* sake, certainly not for the user to mess with !
|
||||
*/
|
||||
struct bcom_sram {
|
||||
phys_addr_t base_phys;
|
||||
void *base_virt;
|
||||
unsigned int size;
|
||||
rh_info_t *rh;
|
||||
spinlock_t lock;
|
||||
};
|
||||
|
||||
extern struct bcom_sram *bcom_sram;
|
||||
|
||||
|
||||
/* Public API */
|
||||
extern int bcom_sram_init(struct device_node *sram_node, char *owner);
|
||||
extern void bcom_sram_cleanup(void);
|
||||
|
||||
extern void* bcom_sram_alloc(int size, int align, phys_addr_t *phys);
|
||||
extern void bcom_sram_free(void *ptr);
|
||||
|
||||
static inline phys_addr_t bcom_sram_va2pa(void *va) {
|
||||
return bcom_sram->base_phys +
|
||||
(unsigned long)(va - bcom_sram->base_virt);
|
||||
}
|
||||
|
||||
static inline void *bcom_sram_pa2va(phys_addr_t pa) {
|
||||
return bcom_sram->base_virt +
|
||||
(unsigned long)(pa - bcom_sram->base_phys);
|
||||
}
|
||||
|
||||
|
||||
#endif /* __BESTCOMM_SRAM_H__ */
|
||||
|
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