drm/nouveau/pwr/memx: fix command ordering around block/unblock
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Родитель
630a6a466b
Коммит
30da080697
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@ -242,13 +242,15 @@ memx_exec:
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mov b32 $r2 $r11
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memx_exec_next:
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// fetch the packet header, and locate opcode info
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// fetch the packet header
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ld b32 $r3 D[$r1]
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add b32 $r1 4
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shr b32 $r4 $r3 16
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mulu $r3 #memx_func_size
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extr $r4 $r3 16:31
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extr $r3 $r3 0:15
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// execute the opcode handler
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sub b32 $r3 1
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mulu $r3 #memx_func_size
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ld b32 $r5 D[$r3 + #memx_func_head + #memx_func]
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call $r5
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@ -46,8 +46,8 @@ uint32_t nv108_pwr_data[] = {
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0x00000000,
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0x00000000,
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0x584d454d,
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0x0000055c,
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0x0000054e,
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0x00000564,
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0x00000556,
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0x00000000,
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0x00000000,
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0x00000000,
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@ -68,8 +68,8 @@ uint32_t nv108_pwr_data[] = {
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0x00000000,
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0x00000000,
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0x46524550,
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0x00000560,
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0x0000055e,
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0x00000568,
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0x00000566,
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0x00000000,
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0x00000000,
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0x00000000,
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@ -90,8 +90,8 @@ uint32_t nv108_pwr_data[] = {
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0x00000000,
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0x00000000,
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0x5f433249,
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0x00000964,
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0x0000080b,
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0x0000096c,
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0x00000813,
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0x00000000,
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0x00000000,
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0x00000000,
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@ -112,8 +112,8 @@ uint32_t nv108_pwr_data[] = {
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0x00000000,
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0x00000000,
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0x54534554,
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0x00000985,
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0x00000966,
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0x0000098d,
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0x0000096e,
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0x00000000,
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0x00000000,
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0x00000000,
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@ -134,8 +134,8 @@ uint32_t nv108_pwr_data[] = {
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0x00000000,
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0x00000000,
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0x454c4449,
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0x00000990,
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0x0000098e,
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0x00000998,
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0x00000996,
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0x00000000,
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0x00000000,
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0x00000000,
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@ -227,23 +227,23 @@ uint32_t nv108_pwr_data[] = {
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0x00000000,
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0x00000000,
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/* 0x0370: memx_func_head */
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0x00000000,
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0x00000001,
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0x00000000,
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0x00000483,
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/* 0x037c: memx_func_next */
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0x00000001,
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0x00000002,
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0x00000000,
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0x000004a3,
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0x00000002,
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0x00000003,
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0x00000002,
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0x000004c8,
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0x00040003,
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0x00040004,
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0x00000000,
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0x000004e5,
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0x00010004,
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0x00010005,
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0x00000000,
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0x000004ff,
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0x00010005,
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0x00010006,
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0x00000000,
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0x000004c3,
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/* 0x03b8: memx_func_tail */
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@ -1230,113 +1230,115 @@ uint32_t nv108_pwr_code[] = {
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/* 0x0513: memx_exec_next */
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0x98b2b2c1,
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0x10b60013,
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0x10349504,
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0xf034e704,
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0xe033e701,
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0x0132b601,
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0x980c30f0,
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0x55f9de35,
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0x1ef412a6,
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0xee0b98ed,
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0xee0b98e5,
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0xbbef0c98,
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0xc44b02cb,
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0x00bbcf07,
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0xe0fcd0fc,
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0x0002c27e,
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/* 0x0542: memx_info */
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/* 0x054a: memx_info */
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0xc04c00f8,
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0x08004b03,
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0x0002c27e,
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/* 0x054e: memx_recv */
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/* 0x0556: memx_recv */
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0xd6b000f8,
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0xba0bf401,
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0xb20bf401,
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0xf400d6b0,
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0x00f8eb0b,
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/* 0x055c: memx_init */
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/* 0x055e: perf_recv */
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/* 0x0564: memx_init */
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/* 0x0566: perf_recv */
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0x00f800f8,
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/* 0x0560: perf_init */
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/* 0x0562: i2c_drive_scl */
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/* 0x0568: perf_init */
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/* 0x056a: i2c_drive_scl */
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0x36b000f8,
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0x0d0bf400,
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0xf607e040,
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0x04bd0001,
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/* 0x0572: i2c_drive_scl_lo */
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/* 0x057a: i2c_drive_scl_lo */
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0xe44000f8,
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0x0001f607,
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0x00f804bd,
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/* 0x057c: i2c_drive_sda */
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/* 0x0584: i2c_drive_sda */
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0xf40036b0,
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0xe0400d0b,
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0x0002f607,
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0x00f804bd,
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/* 0x058c: i2c_drive_sda_lo */
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/* 0x0594: i2c_drive_sda_lo */
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0xf607e440,
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0x04bd0002,
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/* 0x0596: i2c_sense_scl */
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/* 0x059e: i2c_sense_scl */
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0x32f400f8,
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0x07c44301,
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0xfd0033cf,
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0x0bf40431,
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0x0131f406,
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/* 0x05a8: i2c_sense_scl_done */
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/* 0x05aa: i2c_sense_sda */
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/* 0x05b0: i2c_sense_scl_done */
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/* 0x05b2: i2c_sense_sda */
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0x32f400f8,
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0x07c44301,
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0xfd0033cf,
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0x0bf40432,
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0x0131f406,
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/* 0x05bc: i2c_sense_sda_done */
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/* 0x05be: i2c_raise_scl */
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/* 0x05c4: i2c_sense_sda_done */
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/* 0x05c6: i2c_raise_scl */
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0x40f900f8,
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0x03089844,
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0x05627e01,
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/* 0x05c9: i2c_raise_scl_wait */
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0x056a7e01,
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/* 0x05d1: i2c_raise_scl_wait */
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0x03e84e00,
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0x00005d7e,
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0x0005967e,
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0x00059e7e,
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0xb60901f4,
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0x1bf40142,
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/* 0x05dd: i2c_raise_scl_done */
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/* 0x05e5: i2c_raise_scl_done */
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0xf840fcef,
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/* 0x05e1: i2c_start */
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0x05967e00,
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/* 0x05e9: i2c_start */
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0x059e7e00,
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0x0d11f400,
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0x0005aa7e,
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0x0005b27e,
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0xf40611f4,
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/* 0x05f2: i2c_start_rep */
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/* 0x05fa: i2c_start_rep */
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0x00032e0e,
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0x0005627e,
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0x7c7e0103,
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0x00056a7e,
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0x847e0103,
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0x76bb0005,
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0x0465b600,
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0x659450f9,
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0x0256bb04,
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0x75fd50bd,
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0x7e50fc04,
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0xb60005be,
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0xb60005c6,
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0x11f40464,
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/* 0x061d: i2c_start_send */
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/* 0x0625: i2c_start_send */
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0x7e00031d,
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0x4e00057c,
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0x4e000584,
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0x5d7e1388,
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0x00030000,
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0x0005627e,
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0x00056a7e,
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0x7e13884e,
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/* 0x0637: i2c_start_out */
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/* 0x063f: i2c_start_out */
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0xf800005d,
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/* 0x0639: i2c_stop */
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/* 0x0641: i2c_stop */
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0x7e000300,
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0x03000562,
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0x057c7e00,
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0x0300056a,
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0x05847e00,
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0x03e84e00,
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0x00005d7e,
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0x627e0103,
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0x6a7e0103,
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0x884e0005,
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0x005d7e13,
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0x7e010300,
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0x4e00057c,
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0x4e000584,
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0x5d7e1388,
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0x00f80000,
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/* 0x0668: i2c_bitw */
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0x00057c7e,
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/* 0x0670: i2c_bitw */
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0x0005847e,
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0x7e03e84e,
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0xbb00005d,
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0x65b60076,
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@ -1344,17 +1346,17 @@ uint32_t nv108_pwr_code[] = {
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0x56bb0465,
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0xfd50bd02,
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0x50fc0475,
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0x0005be7e,
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0x0005c67e,
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0xf40464b6,
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0x884e1711,
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0x005d7e13,
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0x7e000300,
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0x4e000562,
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0x4e00056a,
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0x5d7e1388,
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/* 0x06a6: i2c_bitw_out */
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/* 0x06ae: i2c_bitw_out */
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0x00f80000,
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/* 0x06a8: i2c_bitr */
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0x7c7e0103,
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/* 0x06b0: i2c_bitr */
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0x847e0103,
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0xe84e0005,
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0x005d7e03,
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0x0076bb00,
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@ -1362,26 +1364,26 @@ uint32_t nv108_pwr_code[] = {
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0x04659450,
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0xbd0256bb,
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0x0475fd50,
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0xbe7e50fc,
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0xc67e50fc,
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0x64b60005,
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0x1a11f404,
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0x0005aa7e,
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0x627e0003,
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0x0005b27e,
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0x6a7e0003,
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0x884e0005,
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0x005d7e13,
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0x013cf000,
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/* 0x06eb: i2c_bitr_done */
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/* 0x06f3: i2c_bitr_done */
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0xf80131f4,
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/* 0x06ed: i2c_get_byte */
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/* 0x06f5: i2c_get_byte */
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0x04000500,
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/* 0x06f1: i2c_get_byte_next */
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/* 0x06f9: i2c_get_byte_next */
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0x0154b608,
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0xb60076bb,
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0x50f90465,
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0xbb046594,
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0x50bd0256,
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0xfc0475fd,
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0x06a87e50,
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0x06b07e50,
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0x0464b600,
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0xfd2a11f4,
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0x42b60553,
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@ -1392,11 +1394,11 @@ uint32_t nv108_pwr_code[] = {
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0x0256bb04,
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0x75fd50bd,
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0x7e50fc04,
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0xb6000668,
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/* 0x073a: i2c_get_byte_done */
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0xb6000670,
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/* 0x0742: i2c_get_byte_done */
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0x00f80464,
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/* 0x073c: i2c_put_byte */
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/* 0x073e: i2c_put_byte_next */
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/* 0x0744: i2c_put_byte */
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/* 0x0746: i2c_put_byte_next */
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0x42b60804,
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0x3854ff01,
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0xb60076bb,
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@ -1404,7 +1406,7 @@ uint32_t nv108_pwr_code[] = {
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0xbb046594,
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0x50bd0256,
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0xfc0475fd,
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0x06687e50,
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0x06707e50,
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0x0464b600,
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0xb03411f4,
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0x1bf40046,
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@ -1413,21 +1415,21 @@ uint32_t nv108_pwr_code[] = {
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0x04659450,
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0xbd0256bb,
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0x0475fd50,
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0xa87e50fc,
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0xb07e50fc,
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0x64b60006,
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0x0f11f404,
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0xb00076bb,
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0x1bf40136,
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0x0132f406,
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/* 0x0794: i2c_put_byte_done */
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/* 0x0796: i2c_addr */
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/* 0x079c: i2c_put_byte_done */
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/* 0x079e: i2c_addr */
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0x76bb00f8,
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0x0465b600,
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0x659450f9,
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0x0256bb04,
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0x75fd50bd,
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0x7e50fc04,
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0xb60005e1,
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0xb60005e9,
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0x11f40464,
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0x2ec3e729,
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0x0134b601,
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@ -1437,24 +1439,24 @@ uint32_t nv108_pwr_code[] = {
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0x56bb0465,
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0xfd50bd02,
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0x50fc0475,
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0x00073c7e,
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/* 0x07db: i2c_addr_done */
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0x0007447e,
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/* 0x07e3: i2c_addr_done */
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0xf80464b6,
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/* 0x07dd: i2c_acquire_addr */
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/* 0x07e5: i2c_acquire_addr */
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0xf8cec700,
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0xb705e4b6,
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0xf8d014e0,
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/* 0x07e9: i2c_acquire */
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0x07dd7e00,
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/* 0x07f1: i2c_acquire */
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0x07e57e00,
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0x00047e00,
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0x03d9f000,
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0x00002e7e,
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/* 0x07fa: i2c_release */
|
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0xdd7e00f8,
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/* 0x0802: i2c_release */
|
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0xe57e00f8,
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0x047e0007,
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0xdaf00000,
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0x002e7e03,
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/* 0x080b: i2c_recv */
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/* 0x0813: i2c_recv */
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0xf400f800,
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0xc1c70132,
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0x0214b6f8,
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|
@ -1474,7 +1476,7 @@ uint32_t nv108_pwr_code[] = {
|
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0x56bb0465,
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0xfd50bd02,
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0x50fc0475,
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0x0007e97e,
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0x0007f17e,
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0xfc0464b6,
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0x00d6b0d0,
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0x00b01bf5,
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|
@ -1484,7 +1486,7 @@ uint32_t nv108_pwr_code[] = {
|
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0x0256bb04,
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0x75fd50bd,
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0x7e50fc04,
|
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0xb6000796,
|
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0xb600079e,
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0x11f50464,
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0xc5c700cc,
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0x0076bbe0,
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|
@ -1492,7 +1494,7 @@ uint32_t nv108_pwr_code[] = {
|
|||
0x04659450,
|
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0xbd0256bb,
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0x0475fd50,
|
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0x3c7e50fc,
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0x447e50fc,
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0x64b60007,
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0xa911f504,
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0xbb010500,
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|
@ -1501,7 +1503,7 @@ uint32_t nv108_pwr_code[] = {
|
|||
0x56bb0465,
|
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0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x0007967e,
|
||||
0x00079e7e,
|
||||
0xf50464b6,
|
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0xbb008711,
|
||||
0x65b60076,
|
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|
@ -1509,7 +1511,7 @@ uint32_t nv108_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
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0x50fc0475,
|
||||
0x0006ed7e,
|
||||
0x0006f57e,
|
||||
0xf40464b6,
|
||||
0x5bcb6711,
|
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0x0076bbe0,
|
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|
@ -1517,37 +1519,37 @@ uint32_t nv108_pwr_code[] = {
|
|||
0x04659450,
|
||||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x397e50fc,
|
||||
0x417e50fc,
|
||||
0x64b60006,
|
||||
0xbd5bb204,
|
||||
0x410ef474,
|
||||
/* 0x0910: i2c_recv_not_rd08 */
|
||||
/* 0x0918: i2c_recv_not_rd08 */
|
||||
0xf401d6b0,
|
||||
0x00053b1b,
|
||||
0x0007967e,
|
||||
0x00079e7e,
|
||||
0xc73211f4,
|
||||
0x3c7ee0c5,
|
||||
0x447ee0c5,
|
||||
0x11f40007,
|
||||
0x7e000528,
|
||||
0xf4000796,
|
||||
0xf400079e,
|
||||
0xb5c71f11,
|
||||
0x073c7ee0,
|
||||
0x07447ee0,
|
||||
0x1511f400,
|
||||
0x0006397e,
|
||||
0x0006417e,
|
||||
0xc5c774bd,
|
||||
0x091bf408,
|
||||
0xf40232f4,
|
||||
/* 0x094e: i2c_recv_not_wr08 */
|
||||
/* 0x094e: i2c_recv_done */
|
||||
/* 0x0956: i2c_recv_not_wr08 */
|
||||
/* 0x0956: i2c_recv_done */
|
||||
0xcec7030e,
|
||||
0x07fa7ef8,
|
||||
0x08027ef8,
|
||||
0xfce0fc00,
|
||||
0x0912f4d0,
|
||||
0xc27e7cb2,
|
||||
/* 0x0962: i2c_recv_exit */
|
||||
/* 0x096a: i2c_recv_exit */
|
||||
0x00f80002,
|
||||
/* 0x0964: i2c_init */
|
||||
/* 0x0966: test_recv */
|
||||
/* 0x096c: i2c_init */
|
||||
/* 0x096e: test_recv */
|
||||
0x584100f8,
|
||||
0x0011cf04,
|
||||
0x400110b6,
|
||||
|
@ -1556,27 +1558,27 @@ uint32_t nv108_pwr_code[] = {
|
|||
0xf1d900e7,
|
||||
0x7e134fe3,
|
||||
0xf8000201,
|
||||
/* 0x0985: test_init */
|
||||
/* 0x098d: test_init */
|
||||
0x08004e00,
|
||||
0x0002017e,
|
||||
/* 0x098e: idle_recv */
|
||||
/* 0x0996: idle_recv */
|
||||
0x00f800f8,
|
||||
/* 0x0990: idle */
|
||||
/* 0x0998: idle */
|
||||
0x410031f4,
|
||||
0x11cf0454,
|
||||
0x0110b600,
|
||||
0xf6045440,
|
||||
0x04bd0001,
|
||||
/* 0x09a4: idle_loop */
|
||||
/* 0x09ac: idle_loop */
|
||||
0x32f45801,
|
||||
/* 0x09a9: idle_proc */
|
||||
/* 0x09a9: idle_proc_exec */
|
||||
/* 0x09b1: idle_proc */
|
||||
/* 0x09b1: idle_proc_exec */
|
||||
0xb210f902,
|
||||
0x02cb7e1e,
|
||||
0xf410fc00,
|
||||
0x31f40911,
|
||||
0xf00ef402,
|
||||
/* 0x09bc: idle_proc_next */
|
||||
/* 0x09c4: idle_proc_next */
|
||||
0xa65810b6,
|
||||
0xe81bf41f,
|
||||
0xf4e002f4,
|
||||
|
@ -1592,6 +1594,4 @@ uint32_t nv108_pwr_code[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
|
|
@ -46,8 +46,8 @@ uint32_t nva3_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x584d454d,
|
||||
0x000006d8,
|
||||
0x000006ca,
|
||||
0x000006e0,
|
||||
0x000006d2,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -68,8 +68,8 @@ uint32_t nva3_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x46524550,
|
||||
0x000006dc,
|
||||
0x000006da,
|
||||
0x000006e4,
|
||||
0x000006e2,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -90,8 +90,8 @@ uint32_t nva3_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x5f433249,
|
||||
0x00000b0c,
|
||||
0x000009af,
|
||||
0x00000b14,
|
||||
0x000009b7,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -112,8 +112,8 @@ uint32_t nva3_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x54534554,
|
||||
0x00000b35,
|
||||
0x00000b0e,
|
||||
0x00000b3d,
|
||||
0x00000b16,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -134,8 +134,8 @@ uint32_t nva3_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x454c4449,
|
||||
0x00000b41,
|
||||
0x00000b3f,
|
||||
0x00000b49,
|
||||
0x00000b47,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -227,23 +227,23 @@ uint32_t nva3_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
/* 0x0370: memx_func_head */
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
0x00000000,
|
||||
0x00000551,
|
||||
/* 0x037c: memx_func_next */
|
||||
0x00000001,
|
||||
0x00000002,
|
||||
0x00000000,
|
||||
0x000005a8,
|
||||
0x00000002,
|
||||
0x00000003,
|
||||
0x00000002,
|
||||
0x0000063a,
|
||||
0x00040003,
|
||||
0x00040004,
|
||||
0x00000000,
|
||||
0x00000656,
|
||||
0x00010004,
|
||||
0x00010005,
|
||||
0x00000000,
|
||||
0x00000673,
|
||||
0x00010005,
|
||||
0x00010006,
|
||||
0x00000000,
|
||||
0x000005f8,
|
||||
/* 0x03b8: memx_func_tail */
|
||||
|
@ -1329,11 +1329,13 @@ uint32_t nva3_pwr_code[] = {
|
|||
0x02b2b902,
|
||||
/* 0x0688: memx_exec_next */
|
||||
0xb6001398,
|
||||
0x34950410,
|
||||
0x0c30f010,
|
||||
0x34e70410,
|
||||
0x33e701f0,
|
||||
0x32b601e0,
|
||||
0x0c30f001,
|
||||
0xf9de3598,
|
||||
0x0612b855,
|
||||
0x98ec1ef4,
|
||||
0x98e41ef4,
|
||||
0x0c98ee0b,
|
||||
0x02cbbbef,
|
||||
0x07c4b7f1,
|
||||
|
@ -1341,112 +1343,112 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xd0fc00bb,
|
||||
0x21f5e0fc,
|
||||
0x00f80342,
|
||||
/* 0x06bc: memx_info */
|
||||
/* 0x06c4: memx_info */
|
||||
0x03c0c7f1,
|
||||
0x0800b7f1,
|
||||
0x034221f5,
|
||||
/* 0x06ca: memx_recv */
|
||||
/* 0x06d2: memx_recv */
|
||||
0xd6b000f8,
|
||||
0xb10bf401,
|
||||
0xa90bf401,
|
||||
0xf400d6b0,
|
||||
0x00f8e90b,
|
||||
/* 0x06d8: memx_init */
|
||||
/* 0x06da: perf_recv */
|
||||
/* 0x06e0: memx_init */
|
||||
/* 0x06e2: perf_recv */
|
||||
0x00f800f8,
|
||||
/* 0x06dc: perf_init */
|
||||
/* 0x06de: i2c_drive_scl */
|
||||
/* 0x06e4: perf_init */
|
||||
/* 0x06e6: i2c_drive_scl */
|
||||
0x36b000f8,
|
||||
0x110bf400,
|
||||
0x07e007f1,
|
||||
0xd00604b6,
|
||||
0x04bd0001,
|
||||
/* 0x06f2: i2c_drive_scl_lo */
|
||||
/* 0x06fa: i2c_drive_scl_lo */
|
||||
0x07f100f8,
|
||||
0x04b607e4,
|
||||
0x0001d006,
|
||||
0x00f804bd,
|
||||
/* 0x0700: i2c_drive_sda */
|
||||
/* 0x0708: i2c_drive_sda */
|
||||
0xf40036b0,
|
||||
0x07f1110b,
|
||||
0x04b607e0,
|
||||
0x0002d006,
|
||||
0x00f804bd,
|
||||
/* 0x0714: i2c_drive_sda_lo */
|
||||
/* 0x071c: i2c_drive_sda_lo */
|
||||
0x07e407f1,
|
||||
0xd00604b6,
|
||||
0x04bd0002,
|
||||
/* 0x0722: i2c_sense_scl */
|
||||
/* 0x072a: i2c_sense_scl */
|
||||
0x32f400f8,
|
||||
0xc437f101,
|
||||
0x0634b607,
|
||||
0xfd0033cf,
|
||||
0x0bf40431,
|
||||
0x0131f406,
|
||||
/* 0x0738: i2c_sense_scl_done */
|
||||
/* 0x073a: i2c_sense_sda */
|
||||
/* 0x0740: i2c_sense_scl_done */
|
||||
/* 0x0742: i2c_sense_sda */
|
||||
0x32f400f8,
|
||||
0xc437f101,
|
||||
0x0634b607,
|
||||
0xfd0033cf,
|
||||
0x0bf40432,
|
||||
0x0131f406,
|
||||
/* 0x0750: i2c_sense_sda_done */
|
||||
/* 0x0752: i2c_raise_scl */
|
||||
/* 0x0758: i2c_sense_sda_done */
|
||||
/* 0x075a: i2c_raise_scl */
|
||||
0x40f900f8,
|
||||
0x089847f1,
|
||||
0xf50137f0,
|
||||
/* 0x075f: i2c_raise_scl_wait */
|
||||
0xf106de21,
|
||||
/* 0x0767: i2c_raise_scl_wait */
|
||||
0xf106e621,
|
||||
0xf403e8e7,
|
||||
0x21f57f21,
|
||||
0x01f40722,
|
||||
0x01f4072a,
|
||||
0x0142b609,
|
||||
/* 0x0773: i2c_raise_scl_done */
|
||||
/* 0x077b: i2c_raise_scl_done */
|
||||
0xfcef1bf4,
|
||||
/* 0x0777: i2c_start */
|
||||
/* 0x077f: i2c_start */
|
||||
0xf500f840,
|
||||
0xf4072221,
|
||||
0xf4072a21,
|
||||
0x21f50d11,
|
||||
0x11f4073a,
|
||||
0x11f40742,
|
||||
0x300ef406,
|
||||
/* 0x0788: i2c_start_rep */
|
||||
/* 0x0790: i2c_start_rep */
|
||||
0xf50037f0,
|
||||
0xf006de21,
|
||||
0xf006e621,
|
||||
0x21f50137,
|
||||
0x76bb0700,
|
||||
0x76bb0708,
|
||||
0x0465b600,
|
||||
0x659450f9,
|
||||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6075221,
|
||||
0xb6075a21,
|
||||
0x11f40464,
|
||||
/* 0x07b5: i2c_start_send */
|
||||
/* 0x07bd: i2c_start_send */
|
||||
0x0037f01f,
|
||||
0x070021f5,
|
||||
0x070821f5,
|
||||
0x1388e7f1,
|
||||
0xf07f21f4,
|
||||
0x21f50037,
|
||||
0xe7f106de,
|
||||
0xe7f106e6,
|
||||
0x21f41388,
|
||||
/* 0x07d1: i2c_start_out */
|
||||
/* 0x07d3: i2c_stop */
|
||||
/* 0x07d9: i2c_start_out */
|
||||
/* 0x07db: i2c_stop */
|
||||
0xf000f87f,
|
||||
0x21f50037,
|
||||
0x37f006de,
|
||||
0x0021f500,
|
||||
0x37f006e6,
|
||||
0x0821f500,
|
||||
0xe8e7f107,
|
||||
0x7f21f403,
|
||||
0xf50137f0,
|
||||
0xf106de21,
|
||||
0xf106e621,
|
||||
0xf41388e7,
|
||||
0x37f07f21,
|
||||
0x0021f501,
|
||||
0x0821f501,
|
||||
0x88e7f107,
|
||||
0x7f21f413,
|
||||
/* 0x0806: i2c_bitw */
|
||||
/* 0x080e: i2c_bitw */
|
||||
0x21f500f8,
|
||||
0xe7f10700,
|
||||
0xe7f10708,
|
||||
0x21f403e8,
|
||||
0x0076bb7f,
|
||||
0xf90465b6,
|
||||
|
@ -1454,18 +1456,18 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60752,
|
||||
0x64b6075a,
|
||||
0x1811f404,
|
||||
0x1388e7f1,
|
||||
0xf07f21f4,
|
||||
0x21f50037,
|
||||
0xe7f106de,
|
||||
0xe7f106e6,
|
||||
0x21f41388,
|
||||
/* 0x0845: i2c_bitw_out */
|
||||
/* 0x0847: i2c_bitr */
|
||||
/* 0x084d: i2c_bitw_out */
|
||||
/* 0x084f: i2c_bitr */
|
||||
0xf000f87f,
|
||||
0x21f50137,
|
||||
0xe7f10700,
|
||||
0xe7f10708,
|
||||
0x21f403e8,
|
||||
0x0076bb7f,
|
||||
0xf90465b6,
|
||||
|
@ -1473,26 +1475,26 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60752,
|
||||
0x64b6075a,
|
||||
0x1b11f404,
|
||||
0x073a21f5,
|
||||
0x074221f5,
|
||||
0xf50037f0,
|
||||
0xf106de21,
|
||||
0xf106e621,
|
||||
0xf41388e7,
|
||||
0x3cf07f21,
|
||||
0x0131f401,
|
||||
/* 0x088c: i2c_bitr_done */
|
||||
/* 0x088e: i2c_get_byte */
|
||||
/* 0x0894: i2c_bitr_done */
|
||||
/* 0x0896: i2c_get_byte */
|
||||
0x57f000f8,
|
||||
0x0847f000,
|
||||
/* 0x0894: i2c_get_byte_next */
|
||||
/* 0x089c: i2c_get_byte_next */
|
||||
0xbb0154b6,
|
||||
0x65b60076,
|
||||
0x9450f904,
|
||||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x084721f5,
|
||||
0x084f21f5,
|
||||
0xf40464b6,
|
||||
0x53fd2b11,
|
||||
0x0142b605,
|
||||
|
@ -1503,11 +1505,11 @@ uint32_t nva3_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6080621,
|
||||
/* 0x08de: i2c_get_byte_done */
|
||||
0xb6080e21,
|
||||
/* 0x08e6: i2c_get_byte_done */
|
||||
0x00f80464,
|
||||
/* 0x08e0: i2c_put_byte */
|
||||
/* 0x08e3: i2c_put_byte_next */
|
||||
/* 0x08e8: i2c_put_byte */
|
||||
/* 0x08eb: i2c_put_byte_next */
|
||||
0xb60847f0,
|
||||
0x54ff0142,
|
||||
0x0076bb38,
|
||||
|
@ -1516,7 +1518,7 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60806,
|
||||
0x64b6080e,
|
||||
0x3411f404,
|
||||
0xf40046b0,
|
||||
0x76bbd81b,
|
||||
|
@ -1525,20 +1527,20 @@ uint32_t nva3_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6084721,
|
||||
0xb6084f21,
|
||||
0x11f40464,
|
||||
0x0076bb0f,
|
||||
0xf40136b0,
|
||||
0x32f4061b,
|
||||
/* 0x0939: i2c_put_byte_done */
|
||||
/* 0x093b: i2c_addr */
|
||||
/* 0x0941: i2c_put_byte_done */
|
||||
/* 0x0943: i2c_addr */
|
||||
0xbb00f801,
|
||||
0x65b60076,
|
||||
0x9450f904,
|
||||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x077721f5,
|
||||
0x077f21f5,
|
||||
0xf40464b6,
|
||||
0xc3e72911,
|
||||
0x34b6012e,
|
||||
|
@ -1548,24 +1550,24 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0xe021f550,
|
||||
0xe821f550,
|
||||
0x0464b608,
|
||||
/* 0x0980: i2c_addr_done */
|
||||
/* 0x0982: i2c_acquire_addr */
|
||||
/* 0x0988: i2c_addr_done */
|
||||
/* 0x098a: i2c_acquire_addr */
|
||||
0xcec700f8,
|
||||
0x02e4b6f8,
|
||||
0x0c10e0b7,
|
||||
0xf800ee98,
|
||||
/* 0x0991: i2c_acquire */
|
||||
0x8221f500,
|
||||
/* 0x0999: i2c_acquire */
|
||||
0x8a21f500,
|
||||
0x0421f409,
|
||||
0xf403d9f0,
|
||||
0x00f83f21,
|
||||
/* 0x09a0: i2c_release */
|
||||
0x098221f5,
|
||||
/* 0x09a8: i2c_release */
|
||||
0x098a21f5,
|
||||
0xf00421f4,
|
||||
0x21f403da,
|
||||
/* 0x09af: i2c_recv */
|
||||
/* 0x09b7: i2c_recv */
|
||||
0xf400f83f,
|
||||
0xc1c70132,
|
||||
0x0214b6f8,
|
||||
|
@ -1585,7 +1587,7 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60991,
|
||||
0x64b60999,
|
||||
0xb0d0fc04,
|
||||
0x1bf500d6,
|
||||
0x57f000b3,
|
||||
|
@ -1595,7 +1597,7 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b6093b,
|
||||
0x64b60943,
|
||||
0xd011f504,
|
||||
0xe0c5c700,
|
||||
0xb60076bb,
|
||||
|
@ -1603,7 +1605,7 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0xe021f550,
|
||||
0xe821f550,
|
||||
0x0464b608,
|
||||
0x00ad11f5,
|
||||
0xbb0157f0,
|
||||
|
@ -1612,7 +1614,7 @@ uint32_t nva3_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x093b21f5,
|
||||
0x094321f5,
|
||||
0xf50464b6,
|
||||
0xbb008a11,
|
||||
0x65b60076,
|
||||
|
@ -1620,7 +1622,7 @@ uint32_t nva3_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x088e21f5,
|
||||
0x089621f5,
|
||||
0xf40464b6,
|
||||
0x5bcb6a11,
|
||||
0x0076bbe0,
|
||||
|
@ -1629,37 +1631,37 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b607d3,
|
||||
0x64b607db,
|
||||
0x025bb904,
|
||||
0x0ef474bd,
|
||||
/* 0x0ab5: i2c_recv_not_rd08 */
|
||||
/* 0x0abd: i2c_recv_not_rd08 */
|
||||
0x01d6b043,
|
||||
0xf03d1bf4,
|
||||
0x21f50057,
|
||||
0x11f4093b,
|
||||
0x11f40943,
|
||||
0xe0c5c733,
|
||||
0x08e021f5,
|
||||
0x08e821f5,
|
||||
0xf02911f4,
|
||||
0x21f50057,
|
||||
0x11f4093b,
|
||||
0x11f40943,
|
||||
0xe0b5c71f,
|
||||
0x08e021f5,
|
||||
0x08e821f5,
|
||||
0xf51511f4,
|
||||
0xbd07d321,
|
||||
0xbd07db21,
|
||||
0x08c5c774,
|
||||
0xf4091bf4,
|
||||
0x0ef40232,
|
||||
/* 0x0af5: i2c_recv_not_wr08 */
|
||||
/* 0x0af5: i2c_recv_done */
|
||||
/* 0x0afd: i2c_recv_not_wr08 */
|
||||
/* 0x0afd: i2c_recv_done */
|
||||
0xf8cec703,
|
||||
0x09a021f5,
|
||||
0x09a821f5,
|
||||
0xd0fce0fc,
|
||||
0xb90a12f4,
|
||||
0x21f5027c,
|
||||
/* 0x0b0a: i2c_recv_exit */
|
||||
/* 0x0b12: i2c_recv_exit */
|
||||
0x00f80342,
|
||||
/* 0x0b0c: i2c_init */
|
||||
/* 0x0b0e: test_recv */
|
||||
/* 0x0b14: i2c_init */
|
||||
/* 0x0b16: test_recv */
|
||||
0x17f100f8,
|
||||
0x14b605d8,
|
||||
0x0011cf06,
|
||||
|
@ -1670,12 +1672,12 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xf1d900e7,
|
||||
0xf5134fe3,
|
||||
0xf8026221,
|
||||
/* 0x0b35: test_init */
|
||||
/* 0x0b3d: test_init */
|
||||
0x00e7f100,
|
||||
0x6221f508,
|
||||
/* 0x0b3f: idle_recv */
|
||||
/* 0x0b47: idle_recv */
|
||||
0xf800f802,
|
||||
/* 0x0b41: idle */
|
||||
/* 0x0b49: idle */
|
||||
0x0031f400,
|
||||
0x05d417f1,
|
||||
0xcf0614b6,
|
||||
|
@ -1683,16 +1685,16 @@ uint32_t nva3_pwr_code[] = {
|
|||
0xd407f101,
|
||||
0x0604b605,
|
||||
0xbd0001d0,
|
||||
/* 0x0b5d: idle_loop */
|
||||
/* 0x0b65: idle_loop */
|
||||
0x5817f004,
|
||||
/* 0x0b63: idle_proc */
|
||||
/* 0x0b63: idle_proc_exec */
|
||||
/* 0x0b6b: idle_proc */
|
||||
/* 0x0b6b: idle_proc_exec */
|
||||
0xf90232f4,
|
||||
0x021eb910,
|
||||
0x034b21f5,
|
||||
0x11f410fc,
|
||||
0x0231f409,
|
||||
/* 0x0b77: idle_proc_next */
|
||||
/* 0x0b7f: idle_proc_next */
|
||||
0xb6ef0ef4,
|
||||
0x1fb85810,
|
||||
0xe61bf406,
|
||||
|
@ -1726,6 +1728,4 @@ uint32_t nva3_pwr_code[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
|
|
@ -46,8 +46,8 @@ uint32_t nvc0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x584d454d,
|
||||
0x0000068b,
|
||||
0x0000067d,
|
||||
0x00000693,
|
||||
0x00000685,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -68,8 +68,8 @@ uint32_t nvc0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x46524550,
|
||||
0x0000068f,
|
||||
0x0000068d,
|
||||
0x00000697,
|
||||
0x00000695,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -90,8 +90,8 @@ uint32_t nvc0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x5f433249,
|
||||
0x00000abf,
|
||||
0x00000962,
|
||||
0x00000ac7,
|
||||
0x0000096a,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -112,8 +112,8 @@ uint32_t nvc0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x54534554,
|
||||
0x00000ae8,
|
||||
0x00000ac1,
|
||||
0x00000af0,
|
||||
0x00000ac9,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -134,8 +134,8 @@ uint32_t nvc0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x454c4449,
|
||||
0x00000af4,
|
||||
0x00000af2,
|
||||
0x00000afc,
|
||||
0x00000afa,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -227,23 +227,23 @@ uint32_t nvc0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
/* 0x0370: memx_func_head */
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
0x00000000,
|
||||
0x00000551,
|
||||
/* 0x037c: memx_func_next */
|
||||
0x00000001,
|
||||
0x00000002,
|
||||
0x00000000,
|
||||
0x0000057e,
|
||||
0x00000002,
|
||||
0x00000003,
|
||||
0x00000002,
|
||||
0x000005ed,
|
||||
0x00040003,
|
||||
0x00040004,
|
||||
0x00000000,
|
||||
0x00000609,
|
||||
0x00010004,
|
||||
0x00010005,
|
||||
0x00000000,
|
||||
0x00000626,
|
||||
0x00010005,
|
||||
0x00010006,
|
||||
0x00000000,
|
||||
0x000005ab,
|
||||
/* 0x03b8: memx_func_tail */
|
||||
|
@ -1310,123 +1310,125 @@ uint32_t nvc0_pwr_code[] = {
|
|||
/* 0x063b: memx_exec_next */
|
||||
0x9802b2b9,
|
||||
0x10b60013,
|
||||
0x10349504,
|
||||
0xf034e704,
|
||||
0xe033e701,
|
||||
0x0132b601,
|
||||
0x980c30f0,
|
||||
0x55f9de35,
|
||||
0xf40612b8,
|
||||
0x0b98ec1e,
|
||||
0x0b98e41e,
|
||||
0xef0c98ee,
|
||||
0xf102cbbb,
|
||||
0xb607c4b7,
|
||||
0xbbcf06b4,
|
||||
0xfcd0fc00,
|
||||
0x4221f5e0,
|
||||
/* 0x066f: memx_info */
|
||||
/* 0x0677: memx_info */
|
||||
0xf100f803,
|
||||
0xf103c0c7,
|
||||
0xf50800b7,
|
||||
0xf8034221,
|
||||
/* 0x067d: memx_recv */
|
||||
/* 0x0685: memx_recv */
|
||||
0x01d6b000,
|
||||
0xb0b10bf4,
|
||||
0xb0a90bf4,
|
||||
0x0bf400d6,
|
||||
/* 0x068b: memx_init */
|
||||
/* 0x0693: memx_init */
|
||||
0xf800f8e9,
|
||||
/* 0x068d: perf_recv */
|
||||
/* 0x068f: perf_init */
|
||||
/* 0x0695: perf_recv */
|
||||
/* 0x0697: perf_init */
|
||||
0xf800f800,
|
||||
/* 0x0691: i2c_drive_scl */
|
||||
/* 0x0699: i2c_drive_scl */
|
||||
0x0036b000,
|
||||
0xf1110bf4,
|
||||
0xb607e007,
|
||||
0x01d00604,
|
||||
0xf804bd00,
|
||||
/* 0x06a5: i2c_drive_scl_lo */
|
||||
/* 0x06ad: i2c_drive_scl_lo */
|
||||
0xe407f100,
|
||||
0x0604b607,
|
||||
0xbd0001d0,
|
||||
/* 0x06b3: i2c_drive_sda */
|
||||
/* 0x06bb: i2c_drive_sda */
|
||||
0xb000f804,
|
||||
0x0bf40036,
|
||||
0xe007f111,
|
||||
0x0604b607,
|
||||
0xbd0002d0,
|
||||
/* 0x06c7: i2c_drive_sda_lo */
|
||||
/* 0x06cf: i2c_drive_sda_lo */
|
||||
0xf100f804,
|
||||
0xb607e407,
|
||||
0x02d00604,
|
||||
0xf804bd00,
|
||||
/* 0x06d5: i2c_sense_scl */
|
||||
/* 0x06dd: i2c_sense_scl */
|
||||
0x0132f400,
|
||||
0x07c437f1,
|
||||
0xcf0634b6,
|
||||
0x31fd0033,
|
||||
0x060bf404,
|
||||
/* 0x06eb: i2c_sense_scl_done */
|
||||
/* 0x06f3: i2c_sense_scl_done */
|
||||
0xf80131f4,
|
||||
/* 0x06ed: i2c_sense_sda */
|
||||
/* 0x06f5: i2c_sense_sda */
|
||||
0x0132f400,
|
||||
0x07c437f1,
|
||||
0xcf0634b6,
|
||||
0x32fd0033,
|
||||
0x060bf404,
|
||||
/* 0x0703: i2c_sense_sda_done */
|
||||
/* 0x070b: i2c_sense_sda_done */
|
||||
0xf80131f4,
|
||||
/* 0x0705: i2c_raise_scl */
|
||||
/* 0x070d: i2c_raise_scl */
|
||||
0xf140f900,
|
||||
0xf0089847,
|
||||
0x21f50137,
|
||||
/* 0x0712: i2c_raise_scl_wait */
|
||||
0xe7f10691,
|
||||
/* 0x071a: i2c_raise_scl_wait */
|
||||
0xe7f10699,
|
||||
0x21f403e8,
|
||||
0xd521f57f,
|
||||
0xdd21f57f,
|
||||
0x0901f406,
|
||||
0xf40142b6,
|
||||
/* 0x0726: i2c_raise_scl_done */
|
||||
/* 0x072e: i2c_raise_scl_done */
|
||||
0x40fcef1b,
|
||||
/* 0x072a: i2c_start */
|
||||
/* 0x0732: i2c_start */
|
||||
0x21f500f8,
|
||||
0x11f406d5,
|
||||
0xed21f50d,
|
||||
0x11f406dd,
|
||||
0xf521f50d,
|
||||
0x0611f406,
|
||||
/* 0x073b: i2c_start_rep */
|
||||
/* 0x0743: i2c_start_rep */
|
||||
0xf0300ef4,
|
||||
0x21f50037,
|
||||
0x37f00691,
|
||||
0xb321f501,
|
||||
0x37f00699,
|
||||
0xbb21f501,
|
||||
0x0076bb06,
|
||||
0xf90465b6,
|
||||
0x04659450,
|
||||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60705,
|
||||
0x64b6070d,
|
||||
0x1f11f404,
|
||||
/* 0x0768: i2c_start_send */
|
||||
/* 0x0770: i2c_start_send */
|
||||
0xf50037f0,
|
||||
0xf106b321,
|
||||
0xf106bb21,
|
||||
0xf41388e7,
|
||||
0x37f07f21,
|
||||
0x9121f500,
|
||||
0x9921f500,
|
||||
0x88e7f106,
|
||||
0x7f21f413,
|
||||
/* 0x0784: i2c_start_out */
|
||||
/* 0x0786: i2c_stop */
|
||||
/* 0x078c: i2c_start_out */
|
||||
/* 0x078e: i2c_stop */
|
||||
0x37f000f8,
|
||||
0x9121f500,
|
||||
0x9921f500,
|
||||
0x0037f006,
|
||||
0x06b321f5,
|
||||
0x06bb21f5,
|
||||
0x03e8e7f1,
|
||||
0xf07f21f4,
|
||||
0x21f50137,
|
||||
0xe7f10691,
|
||||
0xe7f10699,
|
||||
0x21f41388,
|
||||
0x0137f07f,
|
||||
0x06b321f5,
|
||||
0x06bb21f5,
|
||||
0x1388e7f1,
|
||||
0xf87f21f4,
|
||||
/* 0x07b9: i2c_bitw */
|
||||
0xb321f500,
|
||||
/* 0x07c1: i2c_bitw */
|
||||
0xbb21f500,
|
||||
0xe8e7f106,
|
||||
0x7f21f403,
|
||||
0xb60076bb,
|
||||
|
@ -1434,18 +1436,18 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x0521f550,
|
||||
0x0d21f550,
|
||||
0x0464b607,
|
||||
0xf11811f4,
|
||||
0xf41388e7,
|
||||
0x37f07f21,
|
||||
0x9121f500,
|
||||
0x9921f500,
|
||||
0x88e7f106,
|
||||
0x7f21f413,
|
||||
/* 0x07f8: i2c_bitw_out */
|
||||
/* 0x07fa: i2c_bitr */
|
||||
/* 0x0800: i2c_bitw_out */
|
||||
/* 0x0802: i2c_bitr */
|
||||
0x37f000f8,
|
||||
0xb321f501,
|
||||
0xbb21f501,
|
||||
0xe8e7f106,
|
||||
0x7f21f403,
|
||||
0xb60076bb,
|
||||
|
@ -1453,19 +1455,19 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x0521f550,
|
||||
0x0d21f550,
|
||||
0x0464b607,
|
||||
0xf51b11f4,
|
||||
0xf006ed21,
|
||||
0xf006f521,
|
||||
0x21f50037,
|
||||
0xe7f10691,
|
||||
0xe7f10699,
|
||||
0x21f41388,
|
||||
0x013cf07f,
|
||||
/* 0x083f: i2c_bitr_done */
|
||||
/* 0x0847: i2c_bitr_done */
|
||||
0xf80131f4,
|
||||
/* 0x0841: i2c_get_byte */
|
||||
/* 0x0849: i2c_get_byte */
|
||||
0x0057f000,
|
||||
/* 0x0847: i2c_get_byte_next */
|
||||
/* 0x084f: i2c_get_byte_next */
|
||||
0xb60847f0,
|
||||
0x76bb0154,
|
||||
0x0465b600,
|
||||
|
@ -1473,7 +1475,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb607fa21,
|
||||
0xb6080221,
|
||||
0x11f40464,
|
||||
0x0553fd2b,
|
||||
0xf40142b6,
|
||||
|
@ -1484,11 +1486,11 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b607b9,
|
||||
/* 0x0891: i2c_get_byte_done */
|
||||
/* 0x0893: i2c_put_byte */
|
||||
0x64b607c1,
|
||||
/* 0x0899: i2c_get_byte_done */
|
||||
/* 0x089b: i2c_put_byte */
|
||||
0xf000f804,
|
||||
/* 0x0896: i2c_put_byte_next */
|
||||
/* 0x089e: i2c_put_byte_next */
|
||||
0x42b60847,
|
||||
0x3854ff01,
|
||||
0xb60076bb,
|
||||
|
@ -1496,7 +1498,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0xb921f550,
|
||||
0xc121f550,
|
||||
0x0464b607,
|
||||
0xb03411f4,
|
||||
0x1bf40046,
|
||||
|
@ -1506,20 +1508,20 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b607fa,
|
||||
0x64b60802,
|
||||
0x0f11f404,
|
||||
0xb00076bb,
|
||||
0x1bf40136,
|
||||
0x0132f406,
|
||||
/* 0x08ec: i2c_put_byte_done */
|
||||
/* 0x08ee: i2c_addr */
|
||||
/* 0x08f4: i2c_put_byte_done */
|
||||
/* 0x08f6: i2c_addr */
|
||||
0x76bb00f8,
|
||||
0x0465b600,
|
||||
0x659450f9,
|
||||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6072a21,
|
||||
0xb6073221,
|
||||
0x11f40464,
|
||||
0x2ec3e729,
|
||||
0x0134b601,
|
||||
|
@ -1529,24 +1531,24 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x089321f5,
|
||||
/* 0x0933: i2c_addr_done */
|
||||
0x089b21f5,
|
||||
/* 0x093b: i2c_addr_done */
|
||||
0xf80464b6,
|
||||
/* 0x0935: i2c_acquire_addr */
|
||||
/* 0x093d: i2c_acquire_addr */
|
||||
0xf8cec700,
|
||||
0xb702e4b6,
|
||||
0x980c10e0,
|
||||
0x00f800ee,
|
||||
/* 0x0944: i2c_acquire */
|
||||
0x093521f5,
|
||||
/* 0x094c: i2c_acquire */
|
||||
0x093d21f5,
|
||||
0xf00421f4,
|
||||
0x21f403d9,
|
||||
/* 0x0953: i2c_release */
|
||||
/* 0x095b: i2c_release */
|
||||
0xf500f83f,
|
||||
0xf4093521,
|
||||
0xf4093d21,
|
||||
0xdaf00421,
|
||||
0x3f21f403,
|
||||
/* 0x0962: i2c_recv */
|
||||
/* 0x096a: i2c_recv */
|
||||
0x32f400f8,
|
||||
0xf8c1c701,
|
||||
0xb00214b6,
|
||||
|
@ -1565,7 +1567,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x4421f550,
|
||||
0x4c21f550,
|
||||
0x0464b609,
|
||||
0xd6b0d0fc,
|
||||
0xb31bf500,
|
||||
|
@ -1575,7 +1577,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0xee21f550,
|
||||
0xf621f550,
|
||||
0x0464b608,
|
||||
0x00d011f5,
|
||||
0xbbe0c5c7,
|
||||
|
@ -1584,7 +1586,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x089321f5,
|
||||
0x089b21f5,
|
||||
0xf50464b6,
|
||||
0xf000ad11,
|
||||
0x76bb0157,
|
||||
|
@ -1593,7 +1595,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb608ee21,
|
||||
0xb608f621,
|
||||
0x11f50464,
|
||||
0x76bb008a,
|
||||
0x0465b600,
|
||||
|
@ -1601,7 +1603,7 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6084121,
|
||||
0xb6084921,
|
||||
0x11f40464,
|
||||
0xe05bcb6a,
|
||||
0xb60076bb,
|
||||
|
@ -1609,38 +1611,38 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x8621f550,
|
||||
0x8e21f550,
|
||||
0x0464b607,
|
||||
0xbd025bb9,
|
||||
0x430ef474,
|
||||
/* 0x0a68: i2c_recv_not_rd08 */
|
||||
/* 0x0a70: i2c_recv_not_rd08 */
|
||||
0xf401d6b0,
|
||||
0x57f03d1b,
|
||||
0xee21f500,
|
||||
0xf621f500,
|
||||
0x3311f408,
|
||||
0xf5e0c5c7,
|
||||
0xf4089321,
|
||||
0xf4089b21,
|
||||
0x57f02911,
|
||||
0xee21f500,
|
||||
0xf621f500,
|
||||
0x1f11f408,
|
||||
0xf5e0b5c7,
|
||||
0xf4089321,
|
||||
0xf4089b21,
|
||||
0x21f51511,
|
||||
0x74bd0786,
|
||||
0x74bd078e,
|
||||
0xf408c5c7,
|
||||
0x32f4091b,
|
||||
0x030ef402,
|
||||
/* 0x0aa8: i2c_recv_not_wr08 */
|
||||
/* 0x0aa8: i2c_recv_done */
|
||||
/* 0x0ab0: i2c_recv_not_wr08 */
|
||||
/* 0x0ab0: i2c_recv_done */
|
||||
0xf5f8cec7,
|
||||
0xfc095321,
|
||||
0xfc095b21,
|
||||
0xf4d0fce0,
|
||||
0x7cb90a12,
|
||||
0x4221f502,
|
||||
/* 0x0abd: i2c_recv_exit */
|
||||
/* 0x0abf: i2c_init */
|
||||
/* 0x0ac5: i2c_recv_exit */
|
||||
/* 0x0ac7: i2c_init */
|
||||
0xf800f803,
|
||||
/* 0x0ac1: test_recv */
|
||||
/* 0x0ac9: test_recv */
|
||||
0xd817f100,
|
||||
0x0614b605,
|
||||
0xb60011cf,
|
||||
|
@ -1651,12 +1653,12 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0xe3f1d900,
|
||||
0x21f5134f,
|
||||
0x00f80262,
|
||||
/* 0x0ae8: test_init */
|
||||
/* 0x0af0: test_init */
|
||||
0x0800e7f1,
|
||||
0x026221f5,
|
||||
/* 0x0af2: idle_recv */
|
||||
/* 0x0afa: idle_recv */
|
||||
0x00f800f8,
|
||||
/* 0x0af4: idle */
|
||||
/* 0x0afc: idle */
|
||||
0xf10031f4,
|
||||
0xb605d417,
|
||||
0x11cf0614,
|
||||
|
@ -1664,16 +1666,16 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x05d407f1,
|
||||
0xd00604b6,
|
||||
0x04bd0001,
|
||||
/* 0x0b10: idle_loop */
|
||||
/* 0x0b18: idle_loop */
|
||||
0xf45817f0,
|
||||
/* 0x0b16: idle_proc */
|
||||
/* 0x0b16: idle_proc_exec */
|
||||
/* 0x0b1e: idle_proc */
|
||||
/* 0x0b1e: idle_proc_exec */
|
||||
0x10f90232,
|
||||
0xf5021eb9,
|
||||
0xfc034b21,
|
||||
0x0911f410,
|
||||
0xf40231f4,
|
||||
/* 0x0b2a: idle_proc_next */
|
||||
/* 0x0b32: idle_proc_next */
|
||||
0x10b6ef0e,
|
||||
0x061fb858,
|
||||
0xf4e61bf4,
|
||||
|
@ -1726,6 +1728,4 @@ uint32_t nvc0_pwr_code[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
|
|
@ -46,8 +46,8 @@ uint32_t nvd0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x584d454d,
|
||||
0x000005b8,
|
||||
0x000005aa,
|
||||
0x000005c0,
|
||||
0x000005b2,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -68,8 +68,8 @@ uint32_t nvd0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x46524550,
|
||||
0x000005bc,
|
||||
0x000005ba,
|
||||
0x000005c4,
|
||||
0x000005c2,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -90,8 +90,8 @@ uint32_t nvd0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x5f433249,
|
||||
0x000009d7,
|
||||
0x0000087a,
|
||||
0x000009df,
|
||||
0x00000882,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -112,8 +112,8 @@ uint32_t nvd0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x54534554,
|
||||
0x000009fa,
|
||||
0x000009d9,
|
||||
0x00000a02,
|
||||
0x000009e1,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -134,8 +134,8 @@ uint32_t nvd0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x454c4449,
|
||||
0x00000a06,
|
||||
0x00000a04,
|
||||
0x00000a0e,
|
||||
0x00000a0c,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
|
@ -227,23 +227,23 @@ uint32_t nvd0_pwr_data[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
/* 0x0370: memx_func_head */
|
||||
0x00000000,
|
||||
0x00000001,
|
||||
0x00000000,
|
||||
0x000004d3,
|
||||
/* 0x037c: memx_func_next */
|
||||
0x00000001,
|
||||
0x00000002,
|
||||
0x00000000,
|
||||
0x000004f7,
|
||||
0x00000002,
|
||||
0x00000003,
|
||||
0x00000002,
|
||||
0x00000520,
|
||||
0x00040003,
|
||||
0x00040004,
|
||||
0x00000000,
|
||||
0x0000053c,
|
||||
0x00010004,
|
||||
0x00010005,
|
||||
0x00000000,
|
||||
0x00000556,
|
||||
0x00010005,
|
||||
0x00010006,
|
||||
0x00000000,
|
||||
0x0000051b,
|
||||
/* 0x03b8: memx_func_tail */
|
||||
|
@ -1252,118 +1252,120 @@ uint32_t nvd0_pwr_code[] = {
|
|||
/* 0x056b: memx_exec_next */
|
||||
0x9802b2b9,
|
||||
0x10b60013,
|
||||
0x10349504,
|
||||
0xf034e704,
|
||||
0xe033e701,
|
||||
0x0132b601,
|
||||
0x980c30f0,
|
||||
0x55f9de35,
|
||||
0xf40612b8,
|
||||
0x0b98ec1e,
|
||||
0x0b98e41e,
|
||||
0xef0c98ee,
|
||||
0xf102cbbb,
|
||||
0xcf07c4b7,
|
||||
0xd0fc00bb,
|
||||
0x21f5e0fc,
|
||||
0x00f802f1,
|
||||
/* 0x059c: memx_info */
|
||||
/* 0x05a4: memx_info */
|
||||
0x03c0c7f1,
|
||||
0x0800b7f1,
|
||||
0x02f121f5,
|
||||
/* 0x05aa: memx_recv */
|
||||
/* 0x05b2: memx_recv */
|
||||
0xd6b000f8,
|
||||
0xb40bf401,
|
||||
0xac0bf401,
|
||||
0xf400d6b0,
|
||||
0x00f8e90b,
|
||||
/* 0x05b8: memx_init */
|
||||
/* 0x05ba: perf_recv */
|
||||
/* 0x05c0: memx_init */
|
||||
/* 0x05c2: perf_recv */
|
||||
0x00f800f8,
|
||||
/* 0x05bc: perf_init */
|
||||
/* 0x05be: i2c_drive_scl */
|
||||
/* 0x05c4: perf_init */
|
||||
/* 0x05c6: i2c_drive_scl */
|
||||
0x36b000f8,
|
||||
0x0e0bf400,
|
||||
0x07e007f1,
|
||||
0xbd0001d0,
|
||||
/* 0x05cf: i2c_drive_scl_lo */
|
||||
/* 0x05d7: i2c_drive_scl_lo */
|
||||
0xf100f804,
|
||||
0xd007e407,
|
||||
0x04bd0001,
|
||||
/* 0x05da: i2c_drive_sda */
|
||||
/* 0x05e2: i2c_drive_sda */
|
||||
0x36b000f8,
|
||||
0x0e0bf400,
|
||||
0x07e007f1,
|
||||
0xbd0002d0,
|
||||
/* 0x05eb: i2c_drive_sda_lo */
|
||||
/* 0x05f3: i2c_drive_sda_lo */
|
||||
0xf100f804,
|
||||
0xd007e407,
|
||||
0x04bd0002,
|
||||
/* 0x05f6: i2c_sense_scl */
|
||||
/* 0x05fe: i2c_sense_scl */
|
||||
0x32f400f8,
|
||||
0xc437f101,
|
||||
0x0033cf07,
|
||||
0xf40431fd,
|
||||
0x31f4060b,
|
||||
/* 0x0609: i2c_sense_scl_done */
|
||||
/* 0x060b: i2c_sense_sda */
|
||||
/* 0x0611: i2c_sense_scl_done */
|
||||
/* 0x0613: i2c_sense_sda */
|
||||
0xf400f801,
|
||||
0x37f10132,
|
||||
0x33cf07c4,
|
||||
0x0432fd00,
|
||||
0xf4060bf4,
|
||||
/* 0x061e: i2c_sense_sda_done */
|
||||
/* 0x0626: i2c_sense_sda_done */
|
||||
0x00f80131,
|
||||
/* 0x0620: i2c_raise_scl */
|
||||
/* 0x0628: i2c_raise_scl */
|
||||
0x47f140f9,
|
||||
0x37f00898,
|
||||
0xbe21f501,
|
||||
/* 0x062d: i2c_raise_scl_wait */
|
||||
0xc621f501,
|
||||
/* 0x0635: i2c_raise_scl_wait */
|
||||
0xe8e7f105,
|
||||
0x6721f403,
|
||||
0x05f621f5,
|
||||
0x05fe21f5,
|
||||
0xb60901f4,
|
||||
0x1bf40142,
|
||||
/* 0x0641: i2c_raise_scl_done */
|
||||
/* 0x0649: i2c_raise_scl_done */
|
||||
0xf840fcef,
|
||||
/* 0x0645: i2c_start */
|
||||
0xf621f500,
|
||||
/* 0x064d: i2c_start */
|
||||
0xfe21f500,
|
||||
0x0d11f405,
|
||||
0x060b21f5,
|
||||
0x061321f5,
|
||||
0xf40611f4,
|
||||
/* 0x0656: i2c_start_rep */
|
||||
/* 0x065e: i2c_start_rep */
|
||||
0x37f0300e,
|
||||
0xbe21f500,
|
||||
0xc621f500,
|
||||
0x0137f005,
|
||||
0x05da21f5,
|
||||
0x05e221f5,
|
||||
0xb60076bb,
|
||||
0x50f90465,
|
||||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x2021f550,
|
||||
0x2821f550,
|
||||
0x0464b606,
|
||||
/* 0x0683: i2c_start_send */
|
||||
/* 0x068b: i2c_start_send */
|
||||
0xf01f11f4,
|
||||
0x21f50037,
|
||||
0xe7f105da,
|
||||
0xe7f105e2,
|
||||
0x21f41388,
|
||||
0x0037f067,
|
||||
0x05be21f5,
|
||||
0x05c621f5,
|
||||
0x1388e7f1,
|
||||
/* 0x069f: i2c_start_out */
|
||||
/* 0x06a7: i2c_start_out */
|
||||
0xf86721f4,
|
||||
/* 0x06a1: i2c_stop */
|
||||
/* 0x06a9: i2c_stop */
|
||||
0x0037f000,
|
||||
0x05be21f5,
|
||||
0x05c621f5,
|
||||
0xf50037f0,
|
||||
0xf105da21,
|
||||
0xf105e221,
|
||||
0xf403e8e7,
|
||||
0x37f06721,
|
||||
0xbe21f501,
|
||||
0xc621f501,
|
||||
0x88e7f105,
|
||||
0x6721f413,
|
||||
0xf50137f0,
|
||||
0xf105da21,
|
||||
0xf105e221,
|
||||
0xf41388e7,
|
||||
0x00f86721,
|
||||
/* 0x06d4: i2c_bitw */
|
||||
0x05da21f5,
|
||||
/* 0x06dc: i2c_bitw */
|
||||
0x05e221f5,
|
||||
0x03e8e7f1,
|
||||
0xbb6721f4,
|
||||
0x65b60076,
|
||||
|
@ -1371,18 +1373,18 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x062021f5,
|
||||
0x062821f5,
|
||||
0xf40464b6,
|
||||
0xe7f11811,
|
||||
0x21f41388,
|
||||
0x0037f067,
|
||||
0x05be21f5,
|
||||
0x05c621f5,
|
||||
0x1388e7f1,
|
||||
/* 0x0713: i2c_bitw_out */
|
||||
/* 0x071b: i2c_bitw_out */
|
||||
0xf86721f4,
|
||||
/* 0x0715: i2c_bitr */
|
||||
/* 0x071d: i2c_bitr */
|
||||
0x0137f000,
|
||||
0x05da21f5,
|
||||
0x05e221f5,
|
||||
0x03e8e7f1,
|
||||
0xbb6721f4,
|
||||
0x65b60076,
|
||||
|
@ -1390,19 +1392,19 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x062021f5,
|
||||
0x062821f5,
|
||||
0xf40464b6,
|
||||
0x21f51b11,
|
||||
0x37f0060b,
|
||||
0xbe21f500,
|
||||
0x37f00613,
|
||||
0xc621f500,
|
||||
0x88e7f105,
|
||||
0x6721f413,
|
||||
0xf4013cf0,
|
||||
/* 0x075a: i2c_bitr_done */
|
||||
/* 0x0762: i2c_bitr_done */
|
||||
0x00f80131,
|
||||
/* 0x075c: i2c_get_byte */
|
||||
/* 0x0764: i2c_get_byte */
|
||||
0xf00057f0,
|
||||
/* 0x0762: i2c_get_byte_next */
|
||||
/* 0x076a: i2c_get_byte_next */
|
||||
0x54b60847,
|
||||
0x0076bb01,
|
||||
0xf90465b6,
|
||||
|
@ -1410,7 +1412,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60715,
|
||||
0x64b6071d,
|
||||
0x2b11f404,
|
||||
0xb60553fd,
|
||||
0x1bf40142,
|
||||
|
@ -1420,12 +1422,12 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0xd421f550,
|
||||
0xdc21f550,
|
||||
0x0464b606,
|
||||
/* 0x07ac: i2c_get_byte_done */
|
||||
/* 0x07ae: i2c_put_byte */
|
||||
/* 0x07b4: i2c_get_byte_done */
|
||||
/* 0x07b6: i2c_put_byte */
|
||||
0x47f000f8,
|
||||
/* 0x07b1: i2c_put_byte_next */
|
||||
/* 0x07b9: i2c_put_byte_next */
|
||||
0x0142b608,
|
||||
0xbb3854ff,
|
||||
0x65b60076,
|
||||
|
@ -1433,7 +1435,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x06d421f5,
|
||||
0x06dc21f5,
|
||||
0xf40464b6,
|
||||
0x46b03411,
|
||||
0xd81bf400,
|
||||
|
@ -1442,21 +1444,21 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x1521f550,
|
||||
0x1d21f550,
|
||||
0x0464b607,
|
||||
0xbb0f11f4,
|
||||
0x36b00076,
|
||||
0x061bf401,
|
||||
/* 0x0807: i2c_put_byte_done */
|
||||
/* 0x080f: i2c_put_byte_done */
|
||||
0xf80132f4,
|
||||
/* 0x0809: i2c_addr */
|
||||
/* 0x0811: i2c_addr */
|
||||
0x0076bb00,
|
||||
0xf90465b6,
|
||||
0x04659450,
|
||||
0xbd0256bb,
|
||||
0x0475fd50,
|
||||
0x21f550fc,
|
||||
0x64b60645,
|
||||
0x64b6064d,
|
||||
0x2911f404,
|
||||
0x012ec3e7,
|
||||
0xfd0134b6,
|
||||
|
@ -1466,23 +1468,23 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb607ae21,
|
||||
/* 0x084e: i2c_addr_done */
|
||||
0xb607b621,
|
||||
/* 0x0856: i2c_addr_done */
|
||||
0x00f80464,
|
||||
/* 0x0850: i2c_acquire_addr */
|
||||
/* 0x0858: i2c_acquire_addr */
|
||||
0xb6f8cec7,
|
||||
0xe0b705e4,
|
||||
0x00f8d014,
|
||||
/* 0x085c: i2c_acquire */
|
||||
0x085021f5,
|
||||
/* 0x0864: i2c_acquire */
|
||||
0x085821f5,
|
||||
0xf00421f4,
|
||||
0x21f403d9,
|
||||
/* 0x086b: i2c_release */
|
||||
/* 0x0873: i2c_release */
|
||||
0xf500f833,
|
||||
0xf4085021,
|
||||
0xf4085821,
|
||||
0xdaf00421,
|
||||
0x3321f403,
|
||||
/* 0x087a: i2c_recv */
|
||||
/* 0x0882: i2c_recv */
|
||||
0x32f400f8,
|
||||
0xf8c1c701,
|
||||
0xb00214b6,
|
||||
|
@ -1501,7 +1503,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x5c21f550,
|
||||
0x6421f550,
|
||||
0x0464b608,
|
||||
0xd6b0d0fc,
|
||||
0xb31bf500,
|
||||
|
@ -1511,7 +1513,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0x0921f550,
|
||||
0x1121f550,
|
||||
0x0464b608,
|
||||
0x00d011f5,
|
||||
0xbbe0c5c7,
|
||||
|
@ -1520,7 +1522,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x56bb0465,
|
||||
0xfd50bd02,
|
||||
0x50fc0475,
|
||||
0x07ae21f5,
|
||||
0x07b621f5,
|
||||
0xf50464b6,
|
||||
0xf000ad11,
|
||||
0x76bb0157,
|
||||
|
@ -1529,7 +1531,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6080921,
|
||||
0xb6081121,
|
||||
0x11f50464,
|
||||
0x76bb008a,
|
||||
0x0465b600,
|
||||
|
@ -1537,7 +1539,7 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x0256bb04,
|
||||
0x75fd50bd,
|
||||
0xf550fc04,
|
||||
0xb6075c21,
|
||||
0xb6076421,
|
||||
0x11f40464,
|
||||
0xe05bcb6a,
|
||||
0xb60076bb,
|
||||
|
@ -1545,38 +1547,38 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xbb046594,
|
||||
0x50bd0256,
|
||||
0xfc0475fd,
|
||||
0xa121f550,
|
||||
0xa921f550,
|
||||
0x0464b606,
|
||||
0xbd025bb9,
|
||||
0x430ef474,
|
||||
/* 0x0980: i2c_recv_not_rd08 */
|
||||
/* 0x0988: i2c_recv_not_rd08 */
|
||||
0xf401d6b0,
|
||||
0x57f03d1b,
|
||||
0x0921f500,
|
||||
0x1121f500,
|
||||
0x3311f408,
|
||||
0xf5e0c5c7,
|
||||
0xf407ae21,
|
||||
0xf407b621,
|
||||
0x57f02911,
|
||||
0x0921f500,
|
||||
0x1121f500,
|
||||
0x1f11f408,
|
||||
0xf5e0b5c7,
|
||||
0xf407ae21,
|
||||
0xf407b621,
|
||||
0x21f51511,
|
||||
0x74bd06a1,
|
||||
0x74bd06a9,
|
||||
0xf408c5c7,
|
||||
0x32f4091b,
|
||||
0x030ef402,
|
||||
/* 0x09c0: i2c_recv_not_wr08 */
|
||||
/* 0x09c0: i2c_recv_done */
|
||||
/* 0x09c8: i2c_recv_not_wr08 */
|
||||
/* 0x09c8: i2c_recv_done */
|
||||
0xf5f8cec7,
|
||||
0xfc086b21,
|
||||
0xfc087321,
|
||||
0xf4d0fce0,
|
||||
0x7cb90a12,
|
||||
0xf121f502,
|
||||
/* 0x09d5: i2c_recv_exit */
|
||||
/* 0x09d7: i2c_init */
|
||||
/* 0x09dd: i2c_recv_exit */
|
||||
/* 0x09df: i2c_init */
|
||||
0xf800f802,
|
||||
/* 0x09d9: test_recv */
|
||||
/* 0x09e1: test_recv */
|
||||
0xd817f100,
|
||||
0x0011cf05,
|
||||
0xf10110b6,
|
||||
|
@ -1585,28 +1587,28 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0xd900e7f1,
|
||||
0x134fe3f1,
|
||||
0x022321f5,
|
||||
/* 0x09fa: test_init */
|
||||
/* 0x0a02: test_init */
|
||||
0xe7f100f8,
|
||||
0x21f50800,
|
||||
0x00f80223,
|
||||
/* 0x0a04: idle_recv */
|
||||
/* 0x0a06: idle */
|
||||
/* 0x0a0c: idle_recv */
|
||||
/* 0x0a0e: idle */
|
||||
0x31f400f8,
|
||||
0xd417f100,
|
||||
0x0011cf05,
|
||||
0xf10110b6,
|
||||
0xd005d407,
|
||||
0x04bd0001,
|
||||
/* 0x0a1c: idle_loop */
|
||||
/* 0x0a24: idle_loop */
|
||||
0xf45817f0,
|
||||
/* 0x0a22: idle_proc */
|
||||
/* 0x0a22: idle_proc_exec */
|
||||
/* 0x0a2a: idle_proc */
|
||||
/* 0x0a2a: idle_proc_exec */
|
||||
0x10f90232,
|
||||
0xf5021eb9,
|
||||
0xfc02fa21,
|
||||
0x0911f410,
|
||||
0xf40231f4,
|
||||
/* 0x0a36: idle_proc_next */
|
||||
/* 0x0a3e: idle_proc_next */
|
||||
0x10b6ef0e,
|
||||
0x061fb858,
|
||||
0xf4e61bf4,
|
||||
|
@ -1656,6 +1658,4 @@ uint32_t nvd0_pwr_code[] = {
|
|||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
|
|
@ -19,12 +19,12 @@
|
|||
#define MEMX_MSG_EXEC 1
|
||||
|
||||
/* MEMX: script opcode definitions */
|
||||
#define MEMX_ENTER 0
|
||||
#define MEMX_LEAVE 1
|
||||
#define MEMX_WR32 2
|
||||
#define MEMX_WAIT 3
|
||||
#define MEMX_DELAY 4
|
||||
#define MEMX_VBLANK 5
|
||||
#define MEMX_ENTER 1
|
||||
#define MEMX_LEAVE 2
|
||||
#define MEMX_WR32 3
|
||||
#define MEMX_WAIT 4
|
||||
#define MEMX_DELAY 5
|
||||
#define MEMX_VBLANK 6
|
||||
|
||||
/* I2C_: message identifiers */
|
||||
#define I2C__MSG_RD08 0
|
||||
|
|
|
@ -20,10 +20,11 @@ memx_out(struct nouveau_memx *memx)
|
|||
struct nouveau_pwr *ppwr = memx->ppwr;
|
||||
int i;
|
||||
|
||||
if (memx->c.size) {
|
||||
if (memx->c.mthd) {
|
||||
nv_wr32(ppwr, 0x10a1c4, (memx->c.size << 16) | memx->c.mthd);
|
||||
for (i = 0; i < memx->c.size; i++)
|
||||
nv_wr32(ppwr, 0x10a1c4, memx->c.data[i]);
|
||||
memx->c.mthd = 0;
|
||||
memx->c.size = 0;
|
||||
}
|
||||
}
|
||||
|
@ -32,7 +33,7 @@ static void
|
|||
memx_cmd(struct nouveau_memx *memx, u32 mthd, u32 size, u32 data[])
|
||||
{
|
||||
if ((memx->c.size + size >= ARRAY_SIZE(memx->c.data)) ||
|
||||
(memx->c.size && memx->c.mthd != mthd))
|
||||
(memx->c.mthd && memx->c.mthd != mthd))
|
||||
memx_out(memx);
|
||||
memcpy(&memx->c.data[memx->c.size], data, size * sizeof(data[0]));
|
||||
memx->c.size += size;
|
||||
|
@ -153,19 +154,15 @@ nouveau_memx_wait_vblank(struct nouveau_memx *memx)
|
|||
void
|
||||
nouveau_memx_block(struct nouveau_memx *memx)
|
||||
{
|
||||
struct nouveau_pwr *ppwr = memx->ppwr;
|
||||
|
||||
nv_debug(memx->ppwr, " HOST BLOCKED\n");
|
||||
nv_wr32(ppwr, 0x10a1c4, MEMX_ENTER);
|
||||
memx_cmd(memx, MEMX_ENTER, 0, NULL);
|
||||
}
|
||||
|
||||
void
|
||||
nouveau_memx_unblock(struct nouveau_memx *memx)
|
||||
{
|
||||
struct nouveau_pwr *ppwr = memx->ppwr;
|
||||
|
||||
nv_debug(memx->ppwr, " HOST UNBLOCKED\n");
|
||||
nv_wr32(ppwr, 0x10a1c4, MEMX_LEAVE);
|
||||
memx_cmd(memx, MEMX_LEAVE, 0, NULL);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
Загрузка…
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