Merge branch 'pci/misc' into next
* pci/misc: PCI: Clean up quirk_io_region PCI: Use vma_pages() to replace (vm_end - vm_start) >> PAGE_SHIFT PCI: Use PCI_EXP_SLTCAP_PSN mask when extracting slot number PCI: Remove unnecessary dependencies between PME and ACPI [SCSI] mvumi: Use PCI_VENDOR_ID_MARVELL_EXT for 0x1b4b [SCSI] mvsas: Use PCI_VENDOR_ID_MARVELL_EXT for 0x1b4b ahci: Use PCI_VENDOR_ID_MARVELL_EXT for 0x1b4b PCI: Define macro for Marvell vendor ID PCI: Add MSI INTX_DISABLE quirks for AR8161/AR8162/AR8171/AR8172/E210X PCI: aer_inject: Fix return values when device not found
This commit is contained in:
Коммит
30e22b2337
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@ -413,17 +413,17 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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/* Marvell */
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{ PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv }, /* 6145 */
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{ PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv }, /* 6121 */
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{ PCI_DEVICE(0x1b4b, 0x9123),
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9123),
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.class = PCI_CLASS_STORAGE_SATA_AHCI,
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.class_mask = 0xffffff,
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.driver_data = board_ahci_yes_fbs }, /* 88se9128 */
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{ PCI_DEVICE(0x1b4b, 0x9125),
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9125),
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.driver_data = board_ahci_yes_fbs }, /* 88se9125 */
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{ PCI_DEVICE(0x1b4b, 0x917a),
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x917a),
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.driver_data = board_ahci_yes_fbs }, /* 88se9172 */
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{ PCI_DEVICE(0x1b4b, 0x9192),
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9192),
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.driver_data = board_ahci_yes_fbs }, /* 88se9172 on some Gigabyte */
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{ PCI_DEVICE(0x1b4b, 0x91a3),
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x91a3),
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.driver_data = board_ahci_yes_fbs },
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/* Promise */
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@ -90,7 +90,7 @@ static int __init dummy_probe(struct pcie_device *dev)
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slot = kzalloc(sizeof(*slot), GFP_KERNEL);
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if (!slot)
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return -ENOMEM;
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slot->number = slot_cap >> 19;
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slot->number = (slot_cap & PCI_EXP_SLTCAP_PSN) >> 19;
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list_for_each_entry(tmp, &dummy_slots, list) {
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if (tmp->number == slot->number)
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dup_slot_id++;
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@ -897,7 +897,7 @@ int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
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if (pci_resource_len(pdev, resno) == 0)
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return 0;
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nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
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nr = vma_pages(vma);
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start = vma->vm_pgoff;
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size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
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pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
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@ -82,4 +82,4 @@ endchoice
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config PCIE_PME
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def_bool y
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depends on PCIEPORTBUS && PM_RUNTIME && ACPI
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depends on PCIEPORTBUS && PM_RUNTIME
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@ -334,13 +334,13 @@ static int aer_inject(struct aer_error_inj *einj)
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return -ENODEV;
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rpdev = pcie_find_root_port(dev);
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if (!rpdev) {
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ret = -ENOTTY;
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ret = -ENODEV;
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goto out_put;
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}
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pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
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if (!pos_cap_err) {
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ret = -ENOTTY;
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ret = -EPERM;
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goto out_put;
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}
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pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
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@ -350,7 +350,7 @@ static int aer_inject(struct aer_error_inj *einj)
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rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
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if (!rp_pos_cap_err) {
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ret = -ENOTTY;
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ret = -EPERM;
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goto out_put;
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}
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@ -19,8 +19,6 @@
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/pcieport_if.h>
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#include <linux/acpi.h>
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#include <linux/pci-acpi.h>
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#include <linux/pm_runtime.h>
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#include "../pci.h"
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@ -324,28 +324,29 @@ static void quirk_cs5536_vsa(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
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static void quirk_io_region(struct pci_dev *dev, unsigned region,
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unsigned size, int nr, const char *name)
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static void quirk_io_region(struct pci_dev *dev, int port,
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unsigned size, int nr, const char *name)
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{
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region &= ~(size-1);
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if (region) {
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struct pci_bus_region bus_region;
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struct resource *res = dev->resource + nr;
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u16 region;
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struct pci_bus_region bus_region;
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struct resource *res = dev->resource + nr;
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res->name = pci_name(dev);
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res->start = region;
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res->end = region + size - 1;
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res->flags = IORESOURCE_IO;
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pci_read_config_word(dev, port, ®ion);
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region &= ~(size - 1);
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/* Convert from PCI bus to resource space. */
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bus_region.start = res->start;
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bus_region.end = res->end;
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pcibios_bus_to_resource(dev, res, &bus_region);
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if (!region)
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return;
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if (pci_claim_resource(dev, nr) == 0)
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dev_info(&dev->dev, "quirk: %pR claimed by %s\n",
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res, name);
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}
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res->name = pci_name(dev);
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res->flags = IORESOURCE_IO;
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/* Convert from PCI bus to resource space */
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bus_region.start = region;
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bus_region.end = region + size - 1;
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pcibios_bus_to_resource(dev, res, &bus_region);
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if (!pci_claim_resource(dev, nr))
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dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
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}
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/*
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@ -374,12 +375,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100, quirk_ati_
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*/
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static void quirk_ali7101_acpi(struct pci_dev *dev)
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{
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u16 region;
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pci_read_config_word(dev, 0xE0, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
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pci_read_config_word(dev, 0xE2, ®ion);
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quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
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quirk_io_region(dev, 0xE0, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
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quirk_io_region(dev, 0xE2, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi);
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@ -442,12 +439,10 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
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*/
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static void quirk_piix4_acpi(struct pci_dev *dev)
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{
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u32 region, res_a;
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u32 res_a;
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pci_read_config_dword(dev, 0x40, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
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pci_read_config_dword(dev, 0x90, ®ion);
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quirk_io_region(dev, region, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
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quirk_io_region(dev, 0x40, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
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quirk_io_region(dev, 0x90, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
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/* Device resource A has enables for some of the other ones */
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pci_read_config_dword(dev, 0x5c, &res_a);
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@ -491,7 +486,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3, qui
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*/
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static void quirk_ich4_lpc_acpi(struct pci_dev *dev)
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{
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u32 region;
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u8 enable;
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/*
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@ -503,22 +497,14 @@ static void quirk_ich4_lpc_acpi(struct pci_dev *dev)
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*/
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pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
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if (enable & ICH4_ACPI_EN) {
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pci_read_config_dword(dev, ICH_PMBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
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"ICH4 ACPI/GPIO/TCO");
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}
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if (enable & ICH4_ACPI_EN)
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quirk_io_region(dev, ICH_PMBASE, 128, PCI_BRIDGE_RESOURCES,
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"ICH4 ACPI/GPIO/TCO");
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pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable);
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if (enable & ICH4_GPIO_EN) {
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pci_read_config_dword(dev, ICH4_GPIOBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 64,
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PCI_BRIDGE_RESOURCES + 1, "ICH4 GPIO");
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}
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if (enable & ICH4_GPIO_EN)
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quirk_io_region(dev, ICH4_GPIOBASE, 64, PCI_BRIDGE_RESOURCES+1,
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"ICH4 GPIO");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi);
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@ -533,26 +519,17 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, qui
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static void ich6_lpc_acpi_gpio(struct pci_dev *dev)
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{
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u32 region;
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u8 enable;
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pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
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if (enable & ICH6_ACPI_EN) {
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pci_read_config_dword(dev, ICH_PMBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
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"ICH6 ACPI/GPIO/TCO");
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}
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if (enable & ICH6_ACPI_EN)
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quirk_io_region(dev, ICH_PMBASE, 128, PCI_BRIDGE_RESOURCES,
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"ICH6 ACPI/GPIO/TCO");
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pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
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if (enable & ICH6_GPIO_EN) {
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pci_read_config_dword(dev, ICH6_GPIOBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 64,
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PCI_BRIDGE_RESOURCES + 1, "ICH6 GPIO");
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}
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if (enable & ICH6_GPIO_EN)
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quirk_io_region(dev, ICH6_GPIOBASE, 64, PCI_BRIDGE_RESOURCES+1,
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"ICH6 GPIO");
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}
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static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const char *name, int dynsize)
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|
@ -650,13 +627,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_1, qui
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*/
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static void quirk_vt82c586_acpi(struct pci_dev *dev)
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{
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u32 region;
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if (dev->revision & 0x10) {
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pci_read_config_dword(dev, 0x48, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI");
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}
|
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if (dev->revision & 0x10)
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quirk_io_region(dev, 0x48, 256, PCI_BRIDGE_RESOURCES,
|
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"vt82c586 ACPI");
|
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}
|
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi);
|
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|
||||
|
@ -668,18 +641,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt
|
|||
*/
|
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static void quirk_vt82c686_acpi(struct pci_dev *dev)
|
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{
|
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u16 hm;
|
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u32 smb;
|
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|
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quirk_vt82c586_acpi(dev);
|
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|
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pci_read_config_word(dev, 0x70, &hm);
|
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hm &= PCI_BASE_ADDRESS_IO_MASK;
|
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quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1, "vt82c686 HW-mon");
|
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quirk_io_region(dev, 0x70, 128, PCI_BRIDGE_RESOURCES+1,
|
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"vt82c686 HW-mon");
|
||||
|
||||
pci_read_config_dword(dev, 0x90, &smb);
|
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smb &= PCI_BASE_ADDRESS_IO_MASK;
|
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2, "vt82c686 SMB");
|
||||
quirk_io_region(dev, 0x90, 16, PCI_BRIDGE_RESOURCES+2, "vt82c686 SMB");
|
||||
}
|
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi);
|
||||
|
||||
|
@ -690,15 +657,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt
|
|||
*/
|
||||
static void quirk_vt8235_acpi(struct pci_dev *dev)
|
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{
|
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u16 pm, smb;
|
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|
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pci_read_config_word(dev, 0x88, &pm);
|
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pm &= PCI_BASE_ADDRESS_IO_MASK;
|
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quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
|
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|
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pci_read_config_word(dev, 0xd0, &smb);
|
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smb &= PCI_BASE_ADDRESS_IO_MASK;
|
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1, "vt8235 SMB");
|
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quirk_io_region(dev, 0x88, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
|
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quirk_io_region(dev, 0xd0, 16, PCI_BRIDGE_RESOURCES+1, "vt8235 SMB");
|
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}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
|
||||
|
||||
|
@ -2594,6 +2554,14 @@ static void quirk_msi_intx_disable_ati_bug(struct pci_dev *dev)
|
|||
dev->dev_flags |= PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG;
|
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pci_dev_put(p);
|
||||
}
|
||||
static void quirk_msi_intx_disable_qca_bug(struct pci_dev *dev)
|
||||
{
|
||||
/* AR816X/AR817X/E210X MSI is fixed at HW level from revision 0x18 */
|
||||
if (dev->revision < 0x18) {
|
||||
dev_info(&dev->dev, "set MSI_INTX_DISABLE_BUG flag\n");
|
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dev->dev_flags |= PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG;
|
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}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
||||
PCI_DEVICE_ID_TIGON3_5780,
|
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quirk_msi_intx_disable_bug);
|
||||
|
@ -2643,6 +2611,16 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1073,
|
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quirk_msi_intx_disable_bug);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1083,
|
||||
quirk_msi_intx_disable_bug);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1090,
|
||||
quirk_msi_intx_disable_qca_bug);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1091,
|
||||
quirk_msi_intx_disable_qca_bug);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x10a0,
|
||||
quirk_msi_intx_disable_qca_bug);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x10a1,
|
||||
quirk_msi_intx_disable_qca_bug);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0xe091,
|
||||
quirk_msi_intx_disable_qca_bug);
|
||||
#endif /* CONFIG_PCI_MSI */
|
||||
|
||||
/* Allow manual resource allocation for PCI hotplug bridges
|
||||
|
|
|
@ -703,7 +703,7 @@ static struct pci_device_id mvs_pci_table[] = {
|
|||
{ PCI_VDEVICE(TTI, 0x2744), chip_9480 },
|
||||
{ PCI_VDEVICE(TTI, 0x2760), chip_9480 },
|
||||
{
|
||||
.vendor = 0x1b4b,
|
||||
.vendor = PCI_VENDOR_ID_MARVELL_EXT,
|
||||
.device = 0x9480,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = 0x9480,
|
||||
|
@ -712,7 +712,7 @@ static struct pci_device_id mvs_pci_table[] = {
|
|||
.driver_data = chip_9480,
|
||||
},
|
||||
{
|
||||
.vendor = 0x1b4b,
|
||||
.vendor = PCI_VENDOR_ID_MARVELL_EXT,
|
||||
.device = 0x9445,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = 0x9480,
|
||||
|
@ -721,7 +721,7 @@ static struct pci_device_id mvs_pci_table[] = {
|
|||
.driver_data = chip_9445,
|
||||
},
|
||||
{
|
||||
.vendor = 0x1b4b,
|
||||
.vendor = PCI_VENDOR_ID_MARVELL_EXT,
|
||||
.device = 0x9485,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = 0x9480,
|
||||
|
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@ -49,8 +49,8 @@ MODULE_AUTHOR("jyli@marvell.com");
|
|||
MODULE_DESCRIPTION("Marvell UMI Driver");
|
||||
|
||||
static DEFINE_PCI_DEVICE_TABLE(mvumi_pci_table) = {
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_2, PCI_DEVICE_ID_MARVELL_MV9143) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_2, PCI_DEVICE_ID_MARVELL_MV9580) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, PCI_DEVICE_ID_MARVELL_MV9143) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, PCI_DEVICE_ID_MARVELL_MV9580) },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
|
|
|
@ -32,7 +32,6 @@
|
|||
#define VER_BUILD 1500
|
||||
|
||||
#define MV_DRIVER_NAME "mvumi"
|
||||
#define PCI_VENDOR_ID_MARVELL_2 0x1b4b
|
||||
#define PCI_DEVICE_ID_MARVELL_MV9143 0x9143
|
||||
#define PCI_DEVICE_ID_MARVELL_MV9580 0x9580
|
||||
|
||||
|
|
|
@ -1604,6 +1604,7 @@
|
|||
#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
|
||||
|
||||
#define PCI_VENDOR_ID_MARVELL 0x11ab
|
||||
#define PCI_VENDOR_ID_MARVELL_EXT 0x1b4b
|
||||
#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
|
||||
#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
|
||||
#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
|
||||
|
|
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