bnxt_en: Do not read the PTP PHC during chip reset
During error recovery or hot firmware upgrade, the chip may be under reset and the PHC register read cycles may cause completion timeouts. Check that the chip is not under reset condition before proceeding to read the PHC by checking the flag BNXT_STATE_IN_FW_RESET. We also need to take the ptp_lock before we set this flag to prevent race conditions. We need this logic because the PHC now will stay registered after bnxt_close(). Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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a521c8a01d
Коммит
30e96f487f
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@ -11397,13 +11397,20 @@ static bool is_bnxt_fw_ok(struct bnxt *bp)
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static void bnxt_force_fw_reset(struct bnxt *bp)
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{
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struct bnxt_fw_health *fw_health = bp->fw_health;
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struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
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u32 wait_dsecs;
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if (!test_bit(BNXT_STATE_OPEN, &bp->state) ||
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test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))
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return;
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set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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if (ptp) {
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spin_lock_bh(&ptp->ptp_lock);
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set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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spin_unlock_bh(&ptp->ptp_lock);
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} else {
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set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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}
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bnxt_fw_reset_close(bp);
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wait_dsecs = fw_health->master_func_wait_dsecs;
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if (fw_health->master) {
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@ -11459,9 +11466,16 @@ void bnxt_fw_reset(struct bnxt *bp)
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bnxt_rtnl_lock_sp(bp);
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if (test_bit(BNXT_STATE_OPEN, &bp->state) &&
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!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {
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struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
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int n = 0, tmo;
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set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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if (ptp) {
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spin_lock_bh(&ptp->ptp_lock);
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set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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spin_unlock_bh(&ptp->ptp_lock);
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} else {
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set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
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}
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if (bp->pf.active_vfs &&
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!test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))
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n = bnxt_get_registered_vfs(bp);
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@ -55,16 +55,19 @@ static int bnxt_ptp_settime(struct ptp_clock_info *ptp_info,
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}
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/* Caller holds ptp_lock */
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static u64 bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts)
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static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,
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u64 *ns)
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{
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struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
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u64 ns;
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if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))
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return -EIO;
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ptp_read_system_prets(sts);
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ns = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
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*ns = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
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ptp_read_system_postts(sts);
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ns |= (u64)readl(bp->bar0 + ptp->refclk_mapped_regs[1]) << 32;
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return ns;
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*ns |= (u64)readl(bp->bar0 + ptp->refclk_mapped_regs[1]) << 32;
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return 0;
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}
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static void bnxt_ptp_get_current_time(struct bnxt *bp)
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@ -75,7 +78,7 @@ static void bnxt_ptp_get_current_time(struct bnxt *bp)
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return;
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spin_lock_bh(&ptp->ptp_lock);
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WRITE_ONCE(ptp->old_time, ptp->current_time);
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ptp->current_time = bnxt_refclk_read(bp, NULL);
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bnxt_refclk_read(bp, NULL, &ptp->current_time);
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spin_unlock_bh(&ptp->ptp_lock);
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}
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@ -108,9 +111,14 @@ static int bnxt_ptp_gettimex(struct ptp_clock_info *ptp_info,
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struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
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ptp_info);
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u64 ns, cycles;
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int rc;
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spin_lock_bh(&ptp->ptp_lock);
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cycles = bnxt_refclk_read(ptp->bp, sts);
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rc = bnxt_refclk_read(ptp->bp, sts, &cycles);
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if (rc) {
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spin_unlock_bh(&ptp->ptp_lock);
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return rc;
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}
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ns = timecounter_cyc2time(&ptp->tc, cycles);
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spin_unlock_bh(&ptp->ptp_lock);
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*ts = ns_to_timespec64(ns);
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@ -309,8 +317,10 @@ static void bnxt_unmap_ptp_regs(struct bnxt *bp)
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static u64 bnxt_cc_read(const struct cyclecounter *cc)
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{
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struct bnxt_ptp_cfg *ptp = container_of(cc, struct bnxt_ptp_cfg, cc);
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u64 ns = 0;
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return bnxt_refclk_read(ptp->bp, NULL);
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bnxt_refclk_read(ptp->bp, NULL, &ns);
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return ns;
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}
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static void bnxt_stamp_tx_skb(struct bnxt *bp, struct sk_buff *skb)
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@ -439,7 +449,7 @@ int bnxt_ptp_init(struct bnxt *bp)
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}
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if (bp->flags & BNXT_FLAG_CHIP_P5) {
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spin_lock_bh(&ptp->ptp_lock);
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ptp->current_time = bnxt_refclk_read(bp, NULL);
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bnxt_refclk_read(bp, NULL, &ptp->current_time);
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WRITE_ONCE(ptp->old_time, ptp->current_time);
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spin_unlock_bh(&ptp->ptp_lock);
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ptp_schedule_worker(ptp->ptp_clock, 0);
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