mmc: add DMA support to tmio_mmc driver, when used on SuperH
SDHI controllers on SuperH, served by the tmio_mmc driver, can use slave DMA for data transfer. This patch adds support for the dmaengine API to the tmio_mmc driver. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Ian Molton <ian@mnementh.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Guennadi Liakhovetski
Paul Mundt
Родитель
056676dabd
Коммит
311f3ac768
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@ -49,6 +49,7 @@ config MFD_SH_MOBILE_SDHI
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bool "Support for SuperH Mobile SDHI"
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depends on SUPERH || ARCH_SHMOBILE
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select MFD_CORE
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select TMIO_MMC_DMA
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---help---
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This driver supports the SDHI hardware block found in many
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SuperH Mobile SoCs.
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@ -162,6 +163,11 @@ config MFD_TMIO
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bool
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default n
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config TMIO_MMC_DMA
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bool
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select DMA_ENGINE
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select DMADEVICES
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config MFD_T7L66XB
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bool "Support Toshiba T7L66XB"
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depends on ARM && HAVE_CLK
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@ -29,6 +29,7 @@
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#include <linux/irq.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/dmaengine.h>
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#include <linux/mmc/host.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/tmio.h>
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@ -131,8 +132,8 @@ tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
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host->cmd = cmd;
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/* FIXME - this seems to be ok comented out but the spec suggest this bit should
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* be set when issuing app commands.
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/* FIXME - this seems to be ok commented out but the spec suggest this bit
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* should be set when issuing app commands.
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* if(cmd->flags & MMC_FLAG_ACMD)
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* c |= APP_CMD;
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*/
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@ -155,12 +156,12 @@ tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
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return 0;
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}
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/* This chip always returns (at least?) as much data as you ask for.
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/*
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* This chip always returns (at least?) as much data as you ask for.
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* I'm unsure what happens if you ask for less than a block. This should be
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* looked into to ensure that a funny length read doesnt hose the controller.
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*
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*/
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static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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{
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struct mmc_data *data = host->data;
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unsigned short *buf;
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@ -180,7 +181,7 @@ static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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count = data->blksz;
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pr_debug("count: %08x offset: %08x flags %08x\n",
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count, host->sg_off, data->flags);
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count, host->sg_off, data->flags);
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/* Transfer the data */
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if (data->flags & MMC_DATA_READ)
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@ -198,7 +199,7 @@ static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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return;
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}
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static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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static void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
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{
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struct mmc_data *data = host->data;
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struct mmc_command *stop;
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@ -206,7 +207,7 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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host->data = NULL;
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if (!data) {
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pr_debug("Spurious data end IRQ\n");
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dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
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return;
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}
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stop = data->stop;
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@ -219,7 +220,8 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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pr_debug("Completed data request\n");
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/*FIXME - other drivers allow an optional stop command of any given type
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/*
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* FIXME: other drivers allow an optional stop command of any given type
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* which we dont do, as the chip can auto generate them.
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* Perhaps we can be smarter about when to use auto CMD12 and
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* only issue the auto request when we know this is the desired
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@ -227,10 +229,17 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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* upper layers expect. For now, we do what works.
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*/
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if (data->flags & MMC_DATA_READ)
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disable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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if (data->flags & MMC_DATA_READ) {
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if (!host->chan_rx)
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disable_mmc_irqs(host, TMIO_MASK_READOP);
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dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
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host->mrq);
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} else {
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if (!host->chan_tx)
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disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
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host->mrq);
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}
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if (stop) {
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if (stop->opcode == 12 && !stop->arg)
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@ -242,7 +251,35 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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tmio_mmc_finish_request(host);
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}
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static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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{
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struct mmc_data *data = host->data;
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if (!data)
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return;
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if (host->chan_tx && (data->flags & MMC_DATA_WRITE)) {
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/*
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* Has all data been written out yet? Testing on SuperH showed,
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* that in most cases the first interrupt comes already with the
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* BUSY status bit clear, but on some operations, like mount or
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* in the beginning of a write / sync / umount, there is one
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* DATAEND interrupt with the BUSY bit set, in this cases
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* waiting for one more interrupt fixes the problem.
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*/
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if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
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disable_mmc_irqs(host, TMIO_STAT_DATAEND);
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tasklet_schedule(&host->dma_complete);
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}
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} else if (host->chan_rx && (data->flags & MMC_DATA_READ)) {
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disable_mmc_irqs(host, TMIO_STAT_DATAEND);
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tasklet_schedule(&host->dma_complete);
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} else {
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tmio_mmc_do_data_irq(host);
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}
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}
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static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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unsigned int stat)
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{
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struct mmc_command *cmd = host->cmd;
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@ -282,10 +319,16 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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* If theres no data or we encountered an error, finish now.
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*/
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if (host->data && !cmd->error) {
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if (host->data->flags & MMC_DATA_READ)
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enable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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if (host->data->flags & MMC_DATA_READ) {
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if (!host->chan_rx)
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enable_mmc_irqs(host, TMIO_MASK_READOP);
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} else {
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struct dma_chan *chan = host->chan_tx;
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if (!chan)
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enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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else
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tasklet_schedule(&host->dma_issue);
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}
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} else {
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tmio_mmc_finish_request(host);
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}
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@ -293,7 +336,6 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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return;
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}
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static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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{
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struct tmio_mmc_host *host = devid;
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@ -311,7 +353,7 @@ static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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if (!ireg) {
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disable_mmc_irqs(host, status & ~irq_mask);
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pr_debug("tmio_mmc: Spurious irq, disabling! "
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pr_warning("tmio_mmc: Spurious irq, disabling! "
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"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
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pr_debug_status(status);
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@ -363,16 +405,265 @@ out:
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_TMIO_MMC_DMA
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static void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
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{
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#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
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/* Switch DMA mode on or off - SuperH specific? */
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sd_ctrl_write16(host, 0xd8, enable ? 2 : 0);
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#endif
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}
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static void tmio_dma_complete(void *arg)
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{
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struct tmio_mmc_host *host = arg;
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dev_dbg(&host->pdev->dev, "Command completed\n");
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if (!host->data)
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dev_warn(&host->pdev->dev, "NULL data in DMA completion!\n");
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else
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enable_mmc_irqs(host, TMIO_STAT_DATAEND);
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}
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static int tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
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{
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struct scatterlist *sg = host->sg_ptr;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_chan *chan = host->chan_rx;
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int ret;
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ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_FROM_DEVICE);
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if (ret > 0) {
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host->dma_sglen = ret;
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desc = chan->device->device_prep_slave_sg(chan, sg, ret,
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DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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}
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if (desc) {
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host->desc = desc;
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desc->callback = tmio_dma_complete;
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desc->callback_param = host;
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host->cookie = desc->tx_submit(desc);
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if (host->cookie < 0) {
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host->desc = NULL;
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ret = host->cookie;
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} else {
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chan->device->device_issue_pending(chan);
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}
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}
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dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
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__func__, host->sg_len, ret, host->cookie, host->mrq);
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if (!host->desc) {
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/* DMA failed, fall back to PIO */
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if (ret >= 0)
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ret = -EIO;
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host->chan_rx = NULL;
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dma_release_channel(chan);
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/* Free the Tx channel too */
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chan = host->chan_tx;
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if (chan) {
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host->chan_tx = NULL;
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dma_release_channel(chan);
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}
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dev_warn(&host->pdev->dev,
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"DMA failed: %d, falling back to PIO\n", ret);
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tmio_mmc_enable_dma(host, false);
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reset(host);
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/* Fail this request, let above layers recover */
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host->mrq->cmd->error = ret;
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tmio_mmc_finish_request(host);
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}
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dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__,
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desc, host->cookie, host->sg_len);
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return ret > 0 ? 0 : ret;
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}
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static int tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
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{
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struct scatterlist *sg = host->sg_ptr;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_chan *chan = host->chan_tx;
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int ret;
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ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_TO_DEVICE);
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if (ret > 0) {
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host->dma_sglen = ret;
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desc = chan->device->device_prep_slave_sg(chan, sg, ret,
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DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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}
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if (desc) {
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host->desc = desc;
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desc->callback = tmio_dma_complete;
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desc->callback_param = host;
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host->cookie = desc->tx_submit(desc);
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if (host->cookie < 0) {
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host->desc = NULL;
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ret = host->cookie;
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}
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}
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dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
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__func__, host->sg_len, ret, host->cookie, host->mrq);
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if (!host->desc) {
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/* DMA failed, fall back to PIO */
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if (ret >= 0)
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ret = -EIO;
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host->chan_tx = NULL;
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dma_release_channel(chan);
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/* Free the Rx channel too */
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chan = host->chan_rx;
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if (chan) {
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host->chan_rx = NULL;
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dma_release_channel(chan);
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}
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dev_warn(&host->pdev->dev,
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"DMA failed: %d, falling back to PIO\n", ret);
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tmio_mmc_enable_dma(host, false);
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reset(host);
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/* Fail this request, let above layers recover */
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host->mrq->cmd->error = ret;
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tmio_mmc_finish_request(host);
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}
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dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d\n", __func__,
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desc, host->cookie);
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return ret > 0 ? 0 : ret;
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}
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static int tmio_mmc_start_dma(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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if (data->flags & MMC_DATA_READ) {
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if (host->chan_rx)
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return tmio_mmc_start_dma_rx(host);
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} else {
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if (host->chan_tx)
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return tmio_mmc_start_dma_tx(host);
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}
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return 0;
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}
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static void tmio_issue_tasklet_fn(unsigned long priv)
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{
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struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
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struct dma_chan *chan = host->chan_tx;
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chan->device->device_issue_pending(chan);
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}
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static void tmio_tasklet_fn(unsigned long arg)
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{
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struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
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if (host->data->flags & MMC_DATA_READ)
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dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen,
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DMA_FROM_DEVICE);
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else
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dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen,
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DMA_TO_DEVICE);
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tmio_mmc_do_data_irq(host);
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}
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/* It might be necessary to make filter MFD specific */
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static bool tmio_mmc_filter(struct dma_chan *chan, void *arg)
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{
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dev_dbg(chan->device->dev, "%s: slave data %p\n", __func__, arg);
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chan->private = arg;
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return true;
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}
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static void tmio_mmc_request_dma(struct tmio_mmc_host *host,
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struct tmio_mmc_data *pdata)
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{
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host->cookie = -EINVAL;
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host->desc = NULL;
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/* We can only either use DMA for both Tx and Rx or not use it at all */
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if (pdata->dma) {
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dma_cap_mask_t mask;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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host->chan_tx = dma_request_channel(mask, tmio_mmc_filter,
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pdata->dma->chan_priv_tx);
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dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
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host->chan_tx);
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if (!host->chan_tx)
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return;
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host->chan_rx = dma_request_channel(mask, tmio_mmc_filter,
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pdata->dma->chan_priv_rx);
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dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
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host->chan_rx);
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if (!host->chan_rx) {
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dma_release_channel(host->chan_tx);
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host->chan_tx = NULL;
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return;
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}
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tasklet_init(&host->dma_complete, tmio_tasklet_fn, (unsigned long)host);
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tasklet_init(&host->dma_issue, tmio_issue_tasklet_fn, (unsigned long)host);
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tmio_mmc_enable_dma(host, true);
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}
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}
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static void tmio_mmc_release_dma(struct tmio_mmc_host *host)
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{
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if (host->chan_tx) {
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struct dma_chan *chan = host->chan_tx;
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host->chan_tx = NULL;
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dma_release_channel(chan);
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}
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if (host->chan_rx) {
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struct dma_chan *chan = host->chan_rx;
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host->chan_rx = NULL;
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dma_release_channel(chan);
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}
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host->cookie = -EINVAL;
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host->desc = NULL;
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}
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#else
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static int tmio_mmc_start_dma(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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return 0;
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}
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static void tmio_mmc_request_dma(struct tmio_mmc_host *host,
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struct tmio_mmc_data *pdata)
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{
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host->chan_tx = NULL;
|
||||
host->chan_rx = NULL;
|
||||
}
|
||||
|
||||
static void tmio_mmc_release_dma(struct tmio_mmc_host *host)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static int tmio_mmc_start_data(struct tmio_mmc_host *host,
|
||||
struct mmc_data *data)
|
||||
{
|
||||
pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
|
||||
data->blksz, data->blocks);
|
||||
data->blksz, data->blocks);
|
||||
|
||||
/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
|
||||
if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
|
||||
printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
|
||||
mmc_hostname(host->mmc), data->blksz);
|
||||
pr_err("%s: %d byte block unsupported in 4 bit mode\n",
|
||||
mmc_hostname(host->mmc), data->blksz);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -383,7 +674,7 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host,
|
|||
sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
|
||||
sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
|
||||
|
||||
return 0;
|
||||
return tmio_mmc_start_dma(host, data);
|
||||
}
|
||||
|
||||
/* Process requests from the MMC layer */
|
||||
|
|
@ -404,7 +695,6 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
|
|||
}
|
||||
|
||||
ret = tmio_mmc_start_command(host, mrq->cmd);
|
||||
|
||||
if (!ret)
|
||||
return;
|
||||
|
||||
|
|
@ -459,10 +749,10 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc)
|
|||
{
|
||||
struct tmio_mmc_host *host = mmc_priv(mmc);
|
||||
|
||||
return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
|
||||
return (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
|
||||
}
|
||||
|
||||
static struct mmc_host_ops tmio_mmc_ops = {
|
||||
static const struct mmc_host_ops tmio_mmc_ops = {
|
||||
.request = tmio_mmc_request,
|
||||
.set_ios = tmio_mmc_set_ios,
|
||||
.get_ro = tmio_mmc_get_ro,
|
||||
|
|
@ -515,6 +805,7 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
|
|||
struct tmio_mmc_host *host;
|
||||
struct mmc_host *mmc;
|
||||
int ret = -EINVAL;
|
||||
u32 irq_mask = TMIO_MASK_CMD;
|
||||
|
||||
if (dev->num_resources != 2)
|
||||
goto out;
|
||||
|
|
@ -578,13 +869,20 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
|
|||
if (ret)
|
||||
goto cell_disable;
|
||||
|
||||
/* See if we also get DMA */
|
||||
tmio_mmc_request_dma(host, pdata);
|
||||
|
||||
mmc_add_host(mmc);
|
||||
|
||||
printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
|
||||
(unsigned long)host->ctl, host->irq);
|
||||
pr_info("%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
|
||||
(unsigned long)host->ctl, host->irq);
|
||||
|
||||
/* Unmask the IRQs we want to know about */
|
||||
enable_mmc_irqs(host, TMIO_MASK_IRQ);
|
||||
if (!host->chan_rx)
|
||||
irq_mask |= TMIO_MASK_READOP;
|
||||
if (!host->chan_tx)
|
||||
irq_mask |= TMIO_MASK_WRITEOP;
|
||||
enable_mmc_irqs(host, irq_mask);
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
@ -609,6 +907,7 @@ static int __devexit tmio_mmc_remove(struct platform_device *dev)
|
|||
if (mmc) {
|
||||
struct tmio_mmc_host *host = mmc_priv(mmc);
|
||||
mmc_remove_host(mmc);
|
||||
tmio_mmc_release_dma(host);
|
||||
free_irq(host->irq, host);
|
||||
if (cell->disable)
|
||||
cell->disable(dev);
|
||||
|
|
|
|||
|
|
@ -10,6 +10,8 @@
|
|||
*/
|
||||
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/dmaengine.h>
|
||||
|
||||
#define CTL_SD_CMD 0x00
|
||||
#define CTL_ARG_REG 0x04
|
||||
|
|
@ -106,6 +108,17 @@ struct tmio_mmc_host {
|
|||
unsigned int sg_off;
|
||||
|
||||
struct platform_device *pdev;
|
||||
|
||||
/* DMA support */
|
||||
struct dma_chan *chan_rx;
|
||||
struct dma_chan *chan_tx;
|
||||
struct tasklet_struct dma_complete;
|
||||
struct tasklet_struct dma_issue;
|
||||
#ifdef CONFIG_TMIO_MMC_DMA
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
unsigned int dma_sglen;
|
||||
dma_cookie_t cookie;
|
||||
#endif
|
||||
};
|
||||
|
||||
#include <linux/io.h>
|
||||
|
|
|
|||
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