soc: mediatek: add MT2712 scpsys support
add scpsys driver for MT2712 Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
weiyi.lu@mediatek.com
Matthias Brugger
Родитель
d1fb29fac8
Коммит
320f4ced45
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@ -21,6 +21,7 @@
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#include <linux/soc/mediatek/infracfg.h>
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#include <dt-bindings/power/mt2701-power.h>
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#include <dt-bindings/power/mt2712-power.h>
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#include <dt-bindings/power/mt6797-power.h>
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#include <dt-bindings/power/mt7622-power.h>
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#include <dt-bindings/power/mt8173-power.h>
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@ -32,7 +33,7 @@
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#define SPM_DIS_PWR_CON 0x023c
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#define SPM_CONN_PWR_CON 0x0280
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#define SPM_VEN2_PWR_CON 0x0298
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#define SPM_AUDIO_PWR_CON 0x029c /* MT8173 */
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#define SPM_AUDIO_PWR_CON 0x029c /* MT8173, MT2712 */
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#define SPM_BDP_PWR_CON 0x029c /* MT2701 */
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#define SPM_ETH_PWR_CON 0x02a0
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#define SPM_HIF_PWR_CON 0x02a4
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@ -40,12 +41,12 @@
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#define SPM_MFG_2D_PWR_CON 0x02c0
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#define SPM_MFG_ASYNC_PWR_CON 0x02c4
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#define SPM_USB_PWR_CON 0x02cc
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#define SPM_USB2_PWR_CON 0x02d4 /* MT2712 */
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#define SPM_ETHSYS_PWR_CON 0x02e0 /* MT7622 */
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#define SPM_HIF0_PWR_CON 0x02e4 /* MT7622 */
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#define SPM_HIF1_PWR_CON 0x02e8 /* MT7622 */
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#define SPM_WB_PWR_CON 0x02ec /* MT7622 */
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#define SPM_PWR_STATUS 0x060c
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#define SPM_PWR_STATUS_2ND 0x0610
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@ -64,12 +65,13 @@
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#define PWR_STATUS_ETH BIT(15)
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#define PWR_STATUS_HIF BIT(16)
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#define PWR_STATUS_IFR_MSC BIT(17)
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#define PWR_STATUS_USB2 BIT(19) /* MT2712 */
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#define PWR_STATUS_VENC_LT BIT(20)
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#define PWR_STATUS_VENC BIT(21)
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#define PWR_STATUS_MFG_2D BIT(22)
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#define PWR_STATUS_MFG_ASYNC BIT(23)
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#define PWR_STATUS_AUDIO BIT(24)
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#define PWR_STATUS_USB BIT(25)
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#define PWR_STATUS_MFG_2D BIT(22) /* MT8173 */
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#define PWR_STATUS_MFG_ASYNC BIT(23) /* MT8173 */
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#define PWR_STATUS_AUDIO BIT(24) /* MT8173, MT2712 */
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#define PWR_STATUS_USB BIT(25) /* MT8173, MT2712 */
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#define PWR_STATUS_ETHSYS BIT(24) /* MT7622 */
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#define PWR_STATUS_HIF0 BIT(25) /* MT7622 */
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#define PWR_STATUS_HIF1 BIT(26) /* MT7622 */
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@ -591,6 +593,85 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = {
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},
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};
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/*
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* MT2712 power domain support
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*/
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static const struct scp_domain_data scp_domain_data_mt2712[] = {
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[MT2712_POWER_DOMAIN_MM] = {
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.name = "mm",
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.sta_mask = PWR_STATUS_DISP,
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.ctl_offs = SPM_DIS_PWR_CON,
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.sram_pdn_bits = GENMASK(8, 8),
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.sram_pdn_ack_bits = GENMASK(12, 12),
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.clk_id = {CLK_MM},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_VDEC] = {
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.name = "vdec",
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.sta_mask = PWR_STATUS_VDEC,
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.ctl_offs = SPM_VDE_PWR_CON,
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.sram_pdn_bits = GENMASK(8, 8),
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.sram_pdn_ack_bits = GENMASK(12, 12),
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.clk_id = {CLK_MM, CLK_VDEC},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_VENC] = {
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.name = "venc",
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.sta_mask = PWR_STATUS_VENC,
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.ctl_offs = SPM_VEN_PWR_CON,
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.sram_pdn_bits = GENMASK(11, 8),
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.sram_pdn_ack_bits = GENMASK(15, 12),
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.clk_id = {CLK_MM, CLK_VENC, CLK_JPGDEC},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_ISP] = {
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.name = "isp",
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.sta_mask = PWR_STATUS_ISP,
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.ctl_offs = SPM_ISP_PWR_CON,
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.sram_pdn_bits = GENMASK(11, 8),
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.sram_pdn_ack_bits = GENMASK(13, 12),
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.clk_id = {CLK_MM},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_AUDIO] = {
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.name = "audio",
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.sta_mask = PWR_STATUS_AUDIO,
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.ctl_offs = SPM_AUDIO_PWR_CON,
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.sram_pdn_bits = GENMASK(11, 8),
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.sram_pdn_ack_bits = GENMASK(15, 12),
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.clk_id = {CLK_AUDIO},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_USB] = {
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.name = "usb",
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.sta_mask = PWR_STATUS_USB,
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.ctl_offs = SPM_USB_PWR_CON,
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.sram_pdn_bits = GENMASK(10, 8),
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.sram_pdn_ack_bits = GENMASK(14, 12),
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.clk_id = {CLK_NONE},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_USB2] = {
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.name = "usb2",
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.sta_mask = PWR_STATUS_USB2,
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.ctl_offs = SPM_USB2_PWR_CON,
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.sram_pdn_bits = GENMASK(10, 8),
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.sram_pdn_ack_bits = GENMASK(14, 12),
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.clk_id = {CLK_NONE},
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.active_wakeup = true,
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},
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[MT2712_POWER_DOMAIN_MFG] = {
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.name = "mfg",
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.sta_mask = PWR_STATUS_MFG,
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.ctl_offs = SPM_MFG_PWR_CON,
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.sram_pdn_bits = GENMASK(11, 8),
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.sram_pdn_ack_bits = GENMASK(19, 16),
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.clk_id = {CLK_MFG},
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.bus_prot_mask = BIT(14) | BIT(21) | BIT(23),
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.active_wakeup = true,
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},
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};
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/*
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* MT6797 power domain support
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*/
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@ -821,6 +902,16 @@ static const struct scp_soc_data mt2701_data = {
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.bus_prot_reg_update = true,
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};
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static const struct scp_soc_data mt2712_data = {
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.domains = scp_domain_data_mt2712,
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.num_domains = ARRAY_SIZE(scp_domain_data_mt2712),
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.regs = {
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.pwr_sta_offs = SPM_PWR_STATUS,
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.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
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},
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.bus_prot_reg_update = false,
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};
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static const struct scp_soc_data mt6797_data = {
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.domains = scp_domain_data_mt6797,
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.num_domains = ARRAY_SIZE(scp_domain_data_mt6797),
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@ -863,6 +954,9 @@ static const struct of_device_id of_scpsys_match_tbl[] = {
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{
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.compatible = "mediatek,mt2701-scpsys",
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.data = &mt2701_data,
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}, {
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.compatible = "mediatek,mt2712-scpsys",
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.data = &mt2712_data,
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}, {
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.compatible = "mediatek,mt6797-scpsys",
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.data = &mt6797_data,
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