MIPS: Netlogic: XLP9XX USB support
XLP9XX has a USB 3.0 controller on-chip with 2 xHCI ports. The USB block is similar to the one on XLP2XX, so update usb-init-xlp2.c to handle XLP9XX as well. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6285/
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@ -188,6 +188,9 @@
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#define PCI_DEVICE_ID_NLM_MMC 0x1018
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#define PCI_DEVICE_ID_NLM_XHCI 0x101d
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#define PCI_DEVICE_ID_XLP9XX_SATA 0x901A
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#define PCI_DEVICE_ID_XLP9XX_XHCI 0x901D
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#ifndef __ASSEMBLY__
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#define nlm_read_pci_reg(b, r) nlm_read_reg(b, r)
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@ -50,6 +50,8 @@
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#define PIC_2XX_XHCI_0_IRQ 23
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#define PIC_2XX_XHCI_1_IRQ 24
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#define PIC_2XX_XHCI_2_IRQ 25
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#define PIC_9XX_XHCI_0_IRQ 23
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#define PIC_9XX_XHCI_1_IRQ 24
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#define PIC_MMC_IRQ 29
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#define PIC_I2C_0_IRQ 30
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@ -72,6 +72,10 @@ int nlm_irq_to_irt(int irq)
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/* bypass for 9xx */
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if (cpu_is_xlp9xx()) {
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switch (irq) {
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case PIC_9XX_XHCI_0_IRQ:
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return 114;
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case PIC_9XX_XHCI_1_IRQ:
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return 115;
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case PIC_UART_0_IRQ:
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return 133;
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case PIC_UART_1_IRQ:
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@ -37,6 +37,7 @@
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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@ -83,12 +84,14 @@
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#define nlm_read_usb_reg(b, r) nlm_read_reg(b, r)
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#define nlm_write_usb_reg(b, r, v) nlm_write_reg(b, r, v)
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#define nlm_xlpii_get_usb_pcibase(node, inst) \
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nlm_pcicfg_base(XLP2XX_IO_USB_OFFSET(node, inst))
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#define nlm_xlpii_get_usb_pcibase(node, inst) \
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nlm_pcicfg_base(cpu_is_xlp9xx() ? \
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XLP9XX_IO_USB_OFFSET(node, inst) : \
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XLP2XX_IO_USB_OFFSET(node, inst))
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#define nlm_xlpii_get_usb_regbase(node, inst) \
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(nlm_xlpii_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ)
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static void xlpii_usb_ack(struct irq_data *data)
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static void xlp2xx_usb_ack(struct irq_data *data)
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{
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u64 port_addr;
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@ -109,6 +112,29 @@ static void xlpii_usb_ack(struct irq_data *data)
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nlm_write_usb_reg(port_addr, XLPII_USB3_INT_REG, 0xffffffff);
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}
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static void xlp9xx_usb_ack(struct irq_data *data)
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{
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u64 port_addr;
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int node, irq;
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/* Find the node and irq on the node */
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irq = data->irq % NLM_IRQS_PER_NODE;
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node = data->irq / NLM_IRQS_PER_NODE;
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switch (irq) {
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case PIC_9XX_XHCI_0_IRQ:
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port_addr = nlm_xlpii_get_usb_regbase(node, 1);
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break;
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case PIC_9XX_XHCI_1_IRQ:
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port_addr = nlm_xlpii_get_usb_regbase(node, 2);
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break;
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default:
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pr_err("No matching USB irq %d node %d!\n", irq, node);
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return;
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}
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nlm_write_usb_reg(port_addr, XLPII_USB3_INT_REG, 0xffffffff);
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}
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static void nlm_xlpii_usb_hw_reset(int node, int port)
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{
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u64 port_addr, xhci_base, pci_base;
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@ -178,17 +204,33 @@ static void nlm_xlpii_usb_hw_reset(int node, int port)
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static int __init nlm_platform_xlpii_usb_init(void)
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{
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int node;
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if (!cpu_is_xlpii())
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return 0;
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pr_info("Initializing 2XX USB Interface\n");
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nlm_xlpii_usb_hw_reset(0, 1);
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nlm_xlpii_usb_hw_reset(0, 2);
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nlm_xlpii_usb_hw_reset(0, 3);
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nlm_set_pic_extra_ack(0, PIC_2XX_XHCI_0_IRQ, xlpii_usb_ack);
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nlm_set_pic_extra_ack(0, PIC_2XX_XHCI_1_IRQ, xlpii_usb_ack);
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nlm_set_pic_extra_ack(0, PIC_2XX_XHCI_2_IRQ, xlpii_usb_ack);
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if (!cpu_is_xlp9xx()) {
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/* XLP 2XX single node */
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pr_info("Initializing 2XX USB Interface\n");
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nlm_xlpii_usb_hw_reset(0, 1);
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nlm_xlpii_usb_hw_reset(0, 2);
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nlm_xlpii_usb_hw_reset(0, 3);
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nlm_set_pic_extra_ack(0, PIC_2XX_XHCI_0_IRQ, xlp2xx_usb_ack);
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nlm_set_pic_extra_ack(0, PIC_2XX_XHCI_1_IRQ, xlp2xx_usb_ack);
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nlm_set_pic_extra_ack(0, PIC_2XX_XHCI_2_IRQ, xlp2xx_usb_ack);
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return 0;
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}
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/* XLP 9XX, multi-node */
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pr_info("Initializing 9XX USB Interface\n");
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for (node = 0; node < NLM_NR_NODES; node++) {
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if (!nlm_node_present(node))
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continue;
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nlm_xlpii_usb_hw_reset(node, 1);
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nlm_xlpii_usb_hw_reset(node, 2);
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nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_0_IRQ, xlp9xx_usb_ack);
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nlm_set_pic_extra_ack(node, PIC_9XX_XHCI_1_IRQ, xlp9xx_usb_ack);
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}
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return 0;
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}
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@ -196,8 +238,26 @@ arch_initcall(nlm_platform_xlpii_usb_init);
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static u64 xlp_usb_dmamask = ~(u32)0;
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/* Fixup IRQ for USB devices on XLP the SoC PCIe bus */
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static void nlm_usb_fixup_final(struct pci_dev *dev)
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/* Fixup the IRQ for USB devices which is exist on XLP9XX SOC PCIE bus */
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static void nlm_xlp9xx_usb_fixup_final(struct pci_dev *dev)
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{
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int node;
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node = xlp_socdev_to_node(dev);
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dev->dev.dma_mask = &xlp_usb_dmamask;
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dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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switch (dev->devfn) {
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case 0x21:
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dev->irq = nlm_irq_to_xirq(node, PIC_9XX_XHCI_0_IRQ);
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break;
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case 0x22:
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dev->irq = nlm_irq_to_xirq(node, PIC_9XX_XHCI_1_IRQ);
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break;
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}
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}
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/* Fixup the IRQ for USB devices which is exist on XLP2XX SOC PCIE bus */
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static void nlm_xlp2xx_usb_fixup_final(struct pci_dev *dev)
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{
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dev->dev.dma_mask = &xlp_usb_dmamask;
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dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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@ -214,5 +274,7 @@ static void nlm_usb_fixup_final(struct pci_dev *dev)
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_XLP9XX_XHCI,
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nlm_xlp9xx_usb_fixup_final);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_NETLOGIC, PCI_DEVICE_ID_NLM_XHCI,
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nlm_usb_fixup_final);
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nlm_xlp2xx_usb_fixup_final);
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