mach-ux500: update the DB8500 register file
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
Родитель
98b98d3163
Коммит
326474067f
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@ -15,8 +15,13 @@
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#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE)
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#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE)
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#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE)
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/* Use bank 4 for DMA LCPA */
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#define U8500_DMA_LCPA_BASE U8500_ESRAM_BANK4
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/*
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* on V1 DMA uses 4KB for logical parameters position is right after the 64KB
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* reserved for security
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*/
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#define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000
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#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET)
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#define U8500_DMA_LCPA_BASE_ED (U8500_ESRAM_BANK4 + 0x4000)
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#define U8500_PER3_BASE 0x80000000
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@ -27,9 +32,12 @@
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#define U8500_B2R2_BASE 0x80130000
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#define U8500_HSEM_BASE 0x80140000
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#define U8500_PER4_BASE 0x80150000
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#define U8500_TPIU_BASE 0x80190000
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#define U8500_ICN_BASE 0x81000000
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#define U8500_BOOT_ROM_BASE 0x90000000
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/* ASIC ID is at 0xbf4 offset within this region */
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#define U8500_ASIC_ID_BASE 0x9001D000
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#define U8500_PER6_BASE 0xa03c0000
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#define U8500_PER5_BASE 0xa03e0000
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@ -70,13 +78,15 @@
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/* per6 base addresses */
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#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
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#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
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#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
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#define U8500_HASH0_BASE (U8500_PER6_BASE + 0x1000)
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#define U8500_HASH1_BASE (U8500_PER6_BASE + 0x2000)
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#define U8500_PKA_BASE (U8500_PER6_BASE + 0x4000)
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#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x5100)
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#define U8500_MTU0_BASE (U8500_PER6_BASE + 0x6000) /* v1 */
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#define U8500_MTU1_BASE (U8500_PER6_BASE + 0x7000) /* v1 */
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#define U8500_CR_BASE (U8500_PER6_BASE + 0x8000) /* v1 */
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#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
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#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
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#define U8500_CRYP0_BASE (U8500_PER6_BASE + 0xa000)
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#define U8500_CRYP1_BASE (U8500_PER6_BASE + 0xb000)
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#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
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/* per5 base addresses */
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@ -93,7 +103,8 @@
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#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
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#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
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#define U8500_PRCMU_TCDM_BASE_V1 (U8500_PER4_BASE + 0x0f000)
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#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
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#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
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#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000)
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/* per3 base addresses */
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#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
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@ -124,6 +135,7 @@
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#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000)
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#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000)
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#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000)
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#define U8500_MSP3_BASE (U8500_PER1_BASE + 0x5000)
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#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000)
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#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000)
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#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
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@ -143,4 +155,15 @@
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#define U8500_GPIOBANK7_BASE (U8500_GPIO2_BASE + 0x80)
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#define U8500_GPIOBANK8_BASE U8500_GPIO3_BASE
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#define U8500_MCDE_SIZE 0x1000
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#define U8500_DSI_LINK_SIZE 0x1000
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#define U8500_DSI_LINK1_BASE (U8500_MCDE_BASE + U8500_MCDE_SIZE)
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#define U8500_DSI_LINK2_BASE (U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE)
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#define U8500_DSI_LINK3_BASE (U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE)
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#define U8500_DSI_LINK_COUNT 0x3
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/* Modem and APE physical addresses */
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#define U8500_MODEM_BASE 0xe000000
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#define U8500_APE_BASE 0x6000000
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#endif
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