PCI: allow assignment of memory resources with a specified alignment
This patch allows memory resources to be assigned with a specified alignment at boot-time or run-time. The patch is useful when we use PCI pass-through, because page-aligned memory resources are required to securely share PCI resources with guest drivers. If you want to assign the resource at boot time, please set "pci=resource_alignment=" boot parameter. This is format of "pci=resource_alignment=" boot parameter: [<order of align>@][<domain>:]<bus>:<slot>.<func>[; ...] Specifies alignment and device to reassign aligned memory resources. If <order of align> is not specified, PAGE_SIZE is used as alignment. PCI-PCI bridge can be specified, if resource windows need to be expanded. This is example: pci=resource_alignment=20@07:00.0;18@0f:00.0;00:1d.7 If you want to assign the resource at run-time, please set "/sys/bus/pci/resource_alignment" file, and hot-remove the device and hot-add the device. For this purpose, fakephp or PCI hotplug interfaces can be used. The format of "/sys/bus/pci/resource_alignment" file is the same with boot parameter. You can use "," instead of ";". For example: # cd /sys/bus/pci # echo -n 20@12:00.0 > resource_alignment # echo 1 > devices/0000:12:00.0/remove # echo 1 > rescan Reviewed-by: Alex Chiang <achiang@hp.com> Reviewed-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Yuji Shimada <shimada-yxb@necst.nec.co.jp> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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Коммит
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@ -1760,6 +1760,15 @@ and is between 256 and 4096 characters. It is defined in the file
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cbmemsize=nn[KMG] The fixed amount of bus space which is
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reserved for the CardBus bridge's memory
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window. The default value is 64 megabytes.
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resource_alignment=
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Format:
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[<order of align>@][<domain>:]<bus>:<slot>.<func>[; ...]
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Specifies alignment and device to reassign
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aligned memory resources.
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If <order of align> is not specified,
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PAGE_SIZE is used as alignment.
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PCI-PCI bridge can be specified, if resource
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windows need to be expanded.
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pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power
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Management.
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@ -20,6 +20,8 @@
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#include <linux/pm_wakeup.h>
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#include <linux/interrupt.h>
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#include <asm/dma.h> /* isa_dma_bridge_buggy */
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#include <linux/device.h>
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#include <asm/setup.h>
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#include "pci.h"
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unsigned int pci_pm_d3_delay = PCI_PM_D3_WAIT;
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@ -2370,6 +2372,121 @@ int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)
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return 0;
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}
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#define RESOURCE_ALIGNMENT_PARAM_SIZE COMMAND_LINE_SIZE
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static char resource_alignment_param[RESOURCE_ALIGNMENT_PARAM_SIZE] = {0};
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spinlock_t resource_alignment_lock = SPIN_LOCK_UNLOCKED;
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/**
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* pci_specified_resource_alignment - get resource alignment specified by user.
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* @dev: the PCI device to get
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*
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* RETURNS: Resource alignment if it is specified.
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* Zero if it is not specified.
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*/
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resource_size_t pci_specified_resource_alignment(struct pci_dev *dev)
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{
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int seg, bus, slot, func, align_order, count;
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resource_size_t align = 0;
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char *p;
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spin_lock(&resource_alignment_lock);
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p = resource_alignment_param;
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while (*p) {
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count = 0;
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if (sscanf(p, "%d%n", &align_order, &count) == 1 &&
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p[count] == '@') {
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p += count + 1;
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} else {
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align_order = -1;
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}
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if (sscanf(p, "%x:%x:%x.%x%n",
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&seg, &bus, &slot, &func, &count) != 4) {
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seg = 0;
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if (sscanf(p, "%x:%x.%x%n",
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&bus, &slot, &func, &count) != 3) {
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/* Invalid format */
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printk(KERN_ERR "PCI: Can't parse resource_alignment parameter: %s\n",
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p);
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break;
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}
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}
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p += count;
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if (seg == pci_domain_nr(dev->bus) &&
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bus == dev->bus->number &&
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slot == PCI_SLOT(dev->devfn) &&
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func == PCI_FUNC(dev->devfn)) {
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if (align_order == -1) {
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align = PAGE_SIZE;
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} else {
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align = 1 << align_order;
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}
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/* Found */
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break;
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}
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if (*p != ';' && *p != ',') {
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/* End of param or invalid format */
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break;
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}
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p++;
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}
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spin_unlock(&resource_alignment_lock);
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return align;
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}
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/**
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* pci_is_reassigndev - check if specified PCI is target device to reassign
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* @dev: the PCI device to check
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*
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* RETURNS: non-zero for PCI device is a target device to reassign,
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* or zero is not.
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*/
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int pci_is_reassigndev(struct pci_dev *dev)
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{
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return (pci_specified_resource_alignment(dev) != 0);
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}
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ssize_t pci_set_resource_alignment_param(const char *buf, size_t count)
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{
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if (count > RESOURCE_ALIGNMENT_PARAM_SIZE - 1)
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count = RESOURCE_ALIGNMENT_PARAM_SIZE - 1;
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spin_lock(&resource_alignment_lock);
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strncpy(resource_alignment_param, buf, count);
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resource_alignment_param[count] = '\0';
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spin_unlock(&resource_alignment_lock);
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return count;
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}
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ssize_t pci_get_resource_alignment_param(char *buf, size_t size)
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{
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size_t count;
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spin_lock(&resource_alignment_lock);
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count = snprintf(buf, size, "%s", resource_alignment_param);
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spin_unlock(&resource_alignment_lock);
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return count;
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}
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static ssize_t pci_resource_alignment_show(struct bus_type *bus, char *buf)
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{
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return pci_get_resource_alignment_param(buf, PAGE_SIZE);
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}
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static ssize_t pci_resource_alignment_store(struct bus_type *bus,
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const char *buf, size_t count)
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{
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return pci_set_resource_alignment_param(buf, count);
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}
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BUS_ATTR(resource_alignment, 0644, pci_resource_alignment_show,
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pci_resource_alignment_store);
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static int __init pci_resource_alignment_sysfs_init(void)
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{
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return bus_create_file(&pci_bus_type,
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&bus_attr_resource_alignment);
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}
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late_initcall(pci_resource_alignment_sysfs_init);
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static void __devinit pci_no_domains(void)
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{
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#ifdef CONFIG_PCI_DOMAINS
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@ -2418,6 +2535,9 @@ static int __init pci_setup(char *str)
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pci_cardbus_io_size = memparse(str + 9, &str);
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} else if (!strncmp(str, "cbmemsize=", 10)) {
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pci_cardbus_mem_size = memparse(str + 10, &str);
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} else if (!strncmp(str, "resource_alignment=", 19)) {
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pci_set_resource_alignment_param(str + 19,
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strlen(str + 19));
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} else {
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printk(KERN_ERR "PCI: Unknown option `%s'\n",
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str);
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@ -195,4 +195,10 @@ static inline int pci_ari_enabled(struct pci_bus *bus)
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return bus->self && bus->self->ari_enabled;
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}
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#ifdef CONFIG_PCI_QUIRKS
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extern int pci_is_reassigndev(struct pci_dev *dev);
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resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
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extern void pci_disable_bridge_window(struct pci_dev *dev);
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#endif
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#endif /* DRIVERS_PCI_H */
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@ -24,6 +24,7 @@
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#include <linux/kallsyms.h>
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#include <linux/dmi.h>
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#include <linux/pci-aspm.h>
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#include <linux/ioport.h>
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#include "pci.h"
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int isa_dma_bridge_buggy;
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@ -34,6 +35,65 @@ int pcie_mch_quirk;
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EXPORT_SYMBOL(pcie_mch_quirk);
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#ifdef CONFIG_PCI_QUIRKS
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/*
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* This quirk function disables the device and releases resources
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* which is specified by kernel's boot parameter 'pci=resource_alignment='.
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* It also rounds up size to specified alignment.
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* Later on, the kernel will assign page-aligned memory resource back
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* to that device.
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*/
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static void __devinit quirk_resource_alignment(struct pci_dev *dev)
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{
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int i;
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struct resource *r;
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resource_size_t align, size;
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if (!pci_is_reassigndev(dev))
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return;
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if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL &&
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(dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) {
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dev_warn(&dev->dev,
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"Can't reassign resources to host bridge.\n");
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return;
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}
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dev_info(&dev->dev, "Disabling device and release resources.\n");
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pci_disable_device(dev);
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align = pci_specified_resource_alignment(dev);
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for (i=0; i < PCI_BRIDGE_RESOURCES; i++) {
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r = &dev->resource[i];
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if (!(r->flags & IORESOURCE_MEM))
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continue;
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size = resource_size(r);
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if (size < align) {
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size = align;
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dev_info(&dev->dev,
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"Rounding up size of resource #%d to %#llx.\n",
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i, (unsigned long long)size);
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}
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r->end = size - 1;
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r->start = 0;
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}
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/* Need to disable bridge's resource window,
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* to enable the kernel to reassign new resource
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* window later on.
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*/
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if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
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(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
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for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
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r = &dev->resource[i];
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if (!(r->flags & IORESOURCE_MEM))
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continue;
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r->end = resource_size(r) - 1;
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r->start = 0;
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}
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pci_disable_bridge_window(dev);
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_resource_alignment);
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/* The Mellanox Tavor device gives false positive parity errors
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* Mark this device with a broken_parity_status, to allow
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* PCI scanning code to "skip" this now blacklisted device.
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@ -120,6 +120,21 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
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return err;
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}
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#ifdef CONFIG_PCI_QUIRKS
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void pci_disable_bridge_window(struct pci_dev *dev)
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{
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dev_dbg(&dev->dev, "Disabling bridge window.\n");
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/* MMIO Base/Limit */
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pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
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/* Prefetchable MMIO Base/Limit */
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pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
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pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
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pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
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}
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#endif /* CONFIG_PCI_QUIRKS */
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int pci_assign_resource(struct pci_dev *dev, int resno)
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{
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struct pci_bus *bus = dev->bus;
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