dmaengine: sprd: Optimize the sprd_dma_prep_dma_memcpy()
This is one preparation patch, we can use default DMA configuration to implement the device_prep_dma_memcpy() interface instead of issuing sprd_dma_config(). We will implement one new sprd_dma_config() function with introducing device_prep_slave_sg() interface in following patch. So we can remove the obsolete sprd_dma_config() firstly. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Eric Long
Vinod Koul
Родитель
fd8d26adc9
Коммит
32fa20139e
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@ -552,147 +552,58 @@ static void sprd_dma_issue_pending(struct dma_chan *chan)
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spin_unlock_irqrestore(&schan->vc.lock, flags);
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}
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static int sprd_dma_config(struct dma_chan *chan, struct sprd_dma_desc *sdesc,
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dma_addr_t dest, dma_addr_t src, size_t len)
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{
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struct sprd_dma_dev *sdev = to_sprd_dma_dev(chan);
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struct sprd_dma_chn_hw *hw = &sdesc->chn_hw;
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u32 datawidth, src_step, des_step, fragment_len;
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u32 block_len, req_mode, irq_mode, transcation_len;
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u32 fix_mode = 0, fix_en = 0;
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if (IS_ALIGNED(len, 4)) {
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datawidth = SPRD_DMA_DATAWIDTH_4_BYTES;
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src_step = SPRD_DMA_WORD_STEP;
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des_step = SPRD_DMA_WORD_STEP;
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} else if (IS_ALIGNED(len, 2)) {
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datawidth = SPRD_DMA_DATAWIDTH_2_BYTES;
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src_step = SPRD_DMA_SHORT_STEP;
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des_step = SPRD_DMA_SHORT_STEP;
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} else {
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datawidth = SPRD_DMA_DATAWIDTH_1_BYTE;
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src_step = SPRD_DMA_BYTE_STEP;
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des_step = SPRD_DMA_BYTE_STEP;
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}
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fragment_len = SPRD_DMA_MEMCPY_MIN_SIZE;
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if (len <= SPRD_DMA_BLK_LEN_MASK) {
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block_len = len;
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transcation_len = 0;
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req_mode = SPRD_DMA_BLK_REQ;
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irq_mode = SPRD_DMA_BLK_INT;
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} else {
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block_len = SPRD_DMA_MEMCPY_MIN_SIZE;
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transcation_len = len;
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req_mode = SPRD_DMA_TRANS_REQ;
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irq_mode = SPRD_DMA_TRANS_INT;
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}
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hw->cfg = SPRD_DMA_DONOT_WAIT_BDONE << SPRD_DMA_WAIT_BDONE_OFFSET;
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hw->wrap_ptr = (u32)((src >> SPRD_DMA_HIGH_ADDR_OFFSET) &
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SPRD_DMA_HIGH_ADDR_MASK);
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hw->wrap_to = (u32)((dest >> SPRD_DMA_HIGH_ADDR_OFFSET) &
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SPRD_DMA_HIGH_ADDR_MASK);
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hw->src_addr = (u32)(src & SPRD_DMA_LOW_ADDR_MASK);
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hw->des_addr = (u32)(dest & SPRD_DMA_LOW_ADDR_MASK);
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if ((src_step != 0 && des_step != 0) || (src_step | des_step) == 0) {
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fix_en = 0;
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} else {
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fix_en = 1;
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if (src_step)
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fix_mode = 1;
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else
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fix_mode = 0;
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}
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hw->frg_len = datawidth << SPRD_DMA_SRC_DATAWIDTH_OFFSET |
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datawidth << SPRD_DMA_DES_DATAWIDTH_OFFSET |
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req_mode << SPRD_DMA_REQ_MODE_OFFSET |
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fix_mode << SPRD_DMA_FIX_SEL_OFFSET |
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fix_en << SPRD_DMA_FIX_EN_OFFSET |
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(fragment_len & SPRD_DMA_FRG_LEN_MASK);
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hw->blk_len = block_len & SPRD_DMA_BLK_LEN_MASK;
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hw->intc = SPRD_DMA_CFG_ERR_INT_EN;
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switch (irq_mode) {
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case SPRD_DMA_NO_INT:
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break;
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case SPRD_DMA_FRAG_INT:
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hw->intc |= SPRD_DMA_FRAG_INT_EN;
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break;
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case SPRD_DMA_BLK_INT:
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hw->intc |= SPRD_DMA_BLK_INT_EN;
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break;
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case SPRD_DMA_BLK_FRAG_INT:
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hw->intc |= SPRD_DMA_BLK_INT_EN | SPRD_DMA_FRAG_INT_EN;
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break;
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case SPRD_DMA_TRANS_INT:
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hw->intc |= SPRD_DMA_TRANS_INT_EN;
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break;
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case SPRD_DMA_TRANS_FRAG_INT:
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hw->intc |= SPRD_DMA_TRANS_INT_EN | SPRD_DMA_FRAG_INT_EN;
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break;
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case SPRD_DMA_TRANS_BLK_INT:
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hw->intc |= SPRD_DMA_TRANS_INT_EN | SPRD_DMA_BLK_INT_EN;
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break;
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case SPRD_DMA_LIST_INT:
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hw->intc |= SPRD_DMA_LIST_INT_EN;
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break;
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case SPRD_DMA_CFGERR_INT:
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hw->intc |= SPRD_DMA_CFG_ERR_INT_EN;
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break;
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default:
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dev_err(sdev->dma_dev.dev, "invalid irq mode\n");
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return -EINVAL;
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}
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if (transcation_len == 0)
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hw->trsc_len = block_len & SPRD_DMA_TRSC_LEN_MASK;
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else
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hw->trsc_len = transcation_len & SPRD_DMA_TRSC_LEN_MASK;
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hw->trsf_step = (des_step & SPRD_DMA_TRSF_STEP_MASK) <<
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SPRD_DMA_DEST_TRSF_STEP_OFFSET |
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(src_step & SPRD_DMA_TRSF_STEP_MASK) <<
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SPRD_DMA_SRC_TRSF_STEP_OFFSET;
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hw->frg_step = 0;
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hw->src_blk_step = 0;
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hw->des_blk_step = 0;
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hw->src_blk_step = 0;
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return 0;
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}
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static struct dma_async_tx_descriptor *
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sprd_dma_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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size_t len, unsigned long flags)
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{
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struct sprd_dma_chn *schan = to_sprd_dma_chan(chan);
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struct sprd_dma_desc *sdesc;
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int ret;
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struct sprd_dma_chn_hw *hw;
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enum sprd_dma_datawidth datawidth;
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u32 step, temp;
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sdesc = kzalloc(sizeof(*sdesc), GFP_NOWAIT);
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if (!sdesc)
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return NULL;
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ret = sprd_dma_config(chan, sdesc, dest, src, len);
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if (ret) {
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kfree(sdesc);
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return NULL;
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hw = &sdesc->chn_hw;
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hw->cfg = SPRD_DMA_DONOT_WAIT_BDONE << SPRD_DMA_WAIT_BDONE_OFFSET;
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hw->intc = SPRD_DMA_TRANS_INT | SPRD_DMA_CFG_ERR_INT_EN;
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hw->src_addr = src & SPRD_DMA_LOW_ADDR_MASK;
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hw->des_addr = dest & SPRD_DMA_LOW_ADDR_MASK;
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hw->wrap_ptr = (src >> SPRD_DMA_HIGH_ADDR_OFFSET) &
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SPRD_DMA_HIGH_ADDR_MASK;
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hw->wrap_to = (dest >> SPRD_DMA_HIGH_ADDR_OFFSET) &
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SPRD_DMA_HIGH_ADDR_MASK;
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if (IS_ALIGNED(len, 8)) {
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datawidth = SPRD_DMA_DATAWIDTH_8_BYTES;
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step = SPRD_DMA_DWORD_STEP;
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} else if (IS_ALIGNED(len, 4)) {
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datawidth = SPRD_DMA_DATAWIDTH_4_BYTES;
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step = SPRD_DMA_WORD_STEP;
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} else if (IS_ALIGNED(len, 2)) {
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datawidth = SPRD_DMA_DATAWIDTH_2_BYTES;
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step = SPRD_DMA_SHORT_STEP;
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} else {
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datawidth = SPRD_DMA_DATAWIDTH_1_BYTE;
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step = SPRD_DMA_BYTE_STEP;
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}
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temp = datawidth << SPRD_DMA_SRC_DATAWIDTH_OFFSET;
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temp |= datawidth << SPRD_DMA_DES_DATAWIDTH_OFFSET;
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temp |= SPRD_DMA_TRANS_REQ << SPRD_DMA_REQ_MODE_OFFSET;
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temp |= len & SPRD_DMA_FRG_LEN_MASK;
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hw->frg_len = temp;
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hw->blk_len = len & SPRD_DMA_BLK_LEN_MASK;
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hw->trsc_len = len & SPRD_DMA_TRSC_LEN_MASK;
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temp = (step & SPRD_DMA_TRSF_STEP_MASK) << SPRD_DMA_DEST_TRSF_STEP_OFFSET;
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temp |= (step & SPRD_DMA_TRSF_STEP_MASK) << SPRD_DMA_SRC_TRSF_STEP_OFFSET;
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hw->trsf_step = temp;
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return vchan_tx_prep(&schan->vc, &sdesc->vd, flags);
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}
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