net: atlantic: add A2 RPF hw_ops
This patch adds RPF-related hw_ops, which are needed for basic functionality. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Igor Russkikh
David S. Miller
Родитель
57fe8fd225
Коммит
3417368494
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@ -360,6 +360,8 @@ struct aq_rx_filter_vlan {
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u8 queue;
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};
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#define HW_ATL_VLAN_MAX_FILTERS 16U
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struct aq_rx_filter_l2 {
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s8 queue;
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u8 location;
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@ -4,9 +4,17 @@
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*/
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#include "aq_hw.h"
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#include "aq_hw_utils.h"
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#include "aq_nic.h"
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#include "hw_atl/hw_atl_utils.h"
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#include "hw_atl/hw_atl_llh.h"
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#include "hw_atl2_utils.h"
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#include "hw_atl2_llh.h"
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#include "hw_atl2_internal.h"
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static int hw_atl2_act_rslvr_table_set(struct aq_hw_s *self, u8 location,
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u32 tag, u32 mask, u32 action);
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#define DEFAULT_BOARD_BASIC_CAPABILITIES \
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.is_64_dma = true, \
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.msix_irqs = 8U, \
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@ -55,6 +63,11 @@ const struct aq_hw_caps_s hw_atl2_caps_aqc113 = {
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AQ_NIC_RATE_10M,
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};
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static u32 hw_atl2_sem_act_rslvr_get(struct aq_hw_s *self)
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{
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return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL2_FW_SM_ACT_RSLVR);
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}
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static int hw_atl2_hw_reset(struct aq_hw_s *self)
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{
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return -EOPNOTSUPP;
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@ -78,6 +91,60 @@ static int hw_atl2_hw_offload_set(struct aq_hw_s *self,
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return -EOPNOTSUPP;
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}
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static void hw_atl2_hw_new_rx_filter_vlan_promisc(struct aq_hw_s *self,
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bool promisc)
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{
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u16 off_action = (!promisc &&
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!hw_atl_rpfl2promiscuous_mode_en_get(self)) ?
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HW_ATL2_ACTION_DROP : HW_ATL2_ACTION_DISABLE;
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struct hw_atl2_priv *priv = (struct hw_atl2_priv *)self->priv;
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u8 index;
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index = priv->art_base_index + HW_ATL2_RPF_VLAN_PROMISC_OFF_INDEX;
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hw_atl2_act_rslvr_table_set(self, index, 0,
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HW_ATL2_RPF_TAG_VLAN_MASK |
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HW_ATL2_RPF_TAG_UNTAG_MASK, off_action);
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}
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static void hw_atl2_hw_new_rx_filter_promisc(struct aq_hw_s *self, bool promisc)
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{
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u16 off_action = promisc ? HW_ATL2_ACTION_DISABLE : HW_ATL2_ACTION_DROP;
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struct hw_atl2_priv *priv = (struct hw_atl2_priv *)self->priv;
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bool vlan_promisc_enable;
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u8 index;
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index = priv->art_base_index + HW_ATL2_RPF_L2_PROMISC_OFF_INDEX;
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hw_atl2_act_rslvr_table_set(self, index, 0,
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HW_ATL2_RPF_TAG_UC_MASK |
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HW_ATL2_RPF_TAG_ALLMC_MASK,
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off_action);
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/* turn VLAN promisc mode too */
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vlan_promisc_enable = hw_atl_rpf_vlan_prom_mode_en_get(self);
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hw_atl2_hw_new_rx_filter_vlan_promisc(self, promisc |
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vlan_promisc_enable);
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}
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static int hw_atl2_act_rslvr_table_set(struct aq_hw_s *self, u8 location,
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u32 tag, u32 mask, u32 action)
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{
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u32 val;
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int err;
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err = readx_poll_timeout_atomic(hw_atl2_sem_act_rslvr_get,
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self, val, val == 1,
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1, 10000U);
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if (err)
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return err;
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hw_atl2_rpf_act_rslvr_record_set(self, location, tag, mask,
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action);
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hw_atl_reg_glb_cpu_sem_set(self, 1, HW_ATL2_FW_SM_ACT_RSLVR);
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return err;
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}
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static int hw_atl2_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr)
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{
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return -EOPNOTSUPP;
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@ -170,6 +237,88 @@ static int hw_atl2_hw_irq_read(struct aq_hw_s *self, u64 *mask)
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return -EOPNOTSUPP;
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}
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#define IS_FILTER_ENABLED(_F_) ((packet_filter & (_F_)) ? 1U : 0U)
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static int hw_atl2_hw_packet_filter_set(struct aq_hw_s *self,
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unsigned int packet_filter)
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{
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struct aq_nic_cfg_s *cfg = self->aq_nic_cfg;
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u32 vlan_promisc;
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u32 l2_promisc;
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unsigned int i;
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l2_promisc = IS_FILTER_ENABLED(IFF_PROMISC) ||
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!!(cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET));
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vlan_promisc = l2_promisc || cfg->is_vlan_force_promisc;
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hw_atl_rpfl2promiscuous_mode_en_set(self, l2_promisc);
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hw_atl_rpf_vlan_prom_mode_en_set(self, vlan_promisc);
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hw_atl2_hw_new_rx_filter_promisc(self, IS_FILTER_ENABLED(IFF_PROMISC));
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hw_atl_rpfl2multicast_flr_en_set(self,
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IS_FILTER_ENABLED(IFF_ALLMULTI) &&
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IS_FILTER_ENABLED(IFF_MULTICAST), 0);
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hw_atl_rpfl2_accept_all_mc_packets_set(self,
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IS_FILTER_ENABLED(IFF_ALLMULTI) &&
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IS_FILTER_ENABLED(IFF_MULTICAST));
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hw_atl_rpfl2broadcast_en_set(self, IS_FILTER_ENABLED(IFF_BROADCAST));
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for (i = HW_ATL2_MAC_MIN; i < HW_ATL2_MAC_MAX; ++i)
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hw_atl_rpfl2_uc_flr_en_set(self,
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(cfg->is_mc_list_enabled &&
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(i <= cfg->mc_list_count)) ?
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1U : 0U, i);
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return aq_hw_err_from_flags(self);
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}
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#undef IS_FILTER_ENABLED
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static int hw_atl2_hw_multicast_list_set(struct aq_hw_s *self,
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u8 ar_mac
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[AQ_HW_MULTICAST_ADDRESS_MAX]
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[ETH_ALEN],
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u32 count)
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{
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struct aq_nic_cfg_s *cfg = self->aq_nic_cfg;
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int err = 0;
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if (count > (HW_ATL2_MAC_MAX - HW_ATL2_MAC_MIN)) {
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err = -EBADRQC;
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goto err_exit;
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}
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for (cfg->mc_list_count = 0U;
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cfg->mc_list_count < count;
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++cfg->mc_list_count) {
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u32 i = cfg->mc_list_count;
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u32 h = (ar_mac[i][0] << 8) | (ar_mac[i][1]);
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u32 l = (ar_mac[i][2] << 24) | (ar_mac[i][3] << 16) |
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(ar_mac[i][4] << 8) | ar_mac[i][5];
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hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL2_MAC_MIN + i);
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hw_atl_rpfl2unicast_dest_addresslsw_set(self, l,
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HW_ATL2_MAC_MIN + i);
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hw_atl_rpfl2unicast_dest_addressmsw_set(self, h,
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HW_ATL2_MAC_MIN + i);
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hw_atl2_rpfl2_uc_flr_tag_set(self, 1, HW_ATL2_MAC_MIN + i);
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hw_atl_rpfl2_uc_flr_en_set(self, (cfg->is_mc_list_enabled),
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HW_ATL2_MAC_MIN + i);
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}
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err = aq_hw_err_from_flags(self);
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err_exit:
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return err;
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}
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static int hw_atl2_hw_interrupt_moderation_set(struct aq_hw_s *self)
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{
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return -EOPNOTSUPP;
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@ -195,6 +344,61 @@ static struct aq_stats_s *hw_atl2_utils_get_hw_stats(struct aq_hw_s *self)
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return &self->curr_stats;
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}
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static int hw_atl2_hw_vlan_set(struct aq_hw_s *self,
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struct aq_rx_filter_vlan *aq_vlans)
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{
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struct hw_atl2_priv *priv = (struct hw_atl2_priv *)self->priv;
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u32 queue;
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u8 index;
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int i;
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hw_atl_rpf_vlan_prom_mode_en_set(self, 1U);
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for (i = 0; i < HW_ATL_VLAN_MAX_FILTERS; i++) {
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queue = HW_ATL2_ACTION_ASSIGN_QUEUE(aq_vlans[i].queue);
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hw_atl_rpf_vlan_flr_en_set(self, 0U, i);
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hw_atl_rpf_vlan_rxq_en_flr_set(self, 0U, i);
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index = priv->art_base_index + HW_ATL2_RPF_VLAN_USER_INDEX + i;
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hw_atl2_act_rslvr_table_set(self, index, 0, 0,
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HW_ATL2_ACTION_DISABLE);
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if (aq_vlans[i].enable) {
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hw_atl_rpf_vlan_id_flr_set(self,
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aq_vlans[i].vlan_id, i);
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hw_atl_rpf_vlan_flr_act_set(self, 1U, i);
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hw_atl_rpf_vlan_flr_en_set(self, 1U, i);
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if (aq_vlans[i].queue != 0xFF) {
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hw_atl_rpf_vlan_rxq_flr_set(self,
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aq_vlans[i].queue,
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i);
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hw_atl_rpf_vlan_rxq_en_flr_set(self, 1U, i);
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hw_atl2_rpf_vlan_flr_tag_set(self, i + 2, i);
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index = priv->art_base_index +
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HW_ATL2_RPF_VLAN_USER_INDEX + i;
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hw_atl2_act_rslvr_table_set(self, index,
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(i + 2) << HW_ATL2_RPF_TAG_VLAN_OFFSET,
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HW_ATL2_RPF_TAG_VLAN_MASK, queue);
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} else {
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hw_atl2_rpf_vlan_flr_tag_set(self, 1, i);
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}
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}
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}
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return aq_hw_err_from_flags(self);
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}
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static int hw_atl2_hw_vlan_ctrl(struct aq_hw_s *self, bool enable)
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{
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/* set promisc in case of disabing the vlan filter */
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hw_atl_rpf_vlan_prom_mode_en_set(self, !enable);
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hw_atl2_hw_new_rx_filter_vlan_promisc(self, !enable);
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return aq_hw_err_from_flags(self);
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}
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const struct aq_hw_ops hw_atl2_ops = {
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.hw_set_mac_address = hw_atl2_hw_mac_addr_set,
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.hw_init = hw_atl2_hw_init,
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@ -218,6 +422,10 @@ const struct aq_hw_ops hw_atl2_ops = {
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.hw_ring_rx_init = hw_atl2_hw_ring_rx_init,
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.hw_ring_tx_init = hw_atl2_hw_ring_tx_init,
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.hw_packet_filter_set = hw_atl2_hw_packet_filter_set,
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.hw_filter_vlan_set = hw_atl2_hw_vlan_set,
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.hw_filter_vlan_ctrl = hw_atl2_hw_vlan_ctrl,
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.hw_multicast_list_set = hw_atl2_hw_multicast_list_set,
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.hw_interrupt_moderation_set = hw_atl2_hw_interrupt_moderation_set,
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.hw_rss_set = hw_atl2_hw_rss_set,
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.hw_rss_hash_set = hw_atl2_hw_rss_hash_set,
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@ -18,6 +18,10 @@
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#define HW_ATL2_TXD_SIZE (16U)
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#define HW_ATL2_RXD_SIZE (16U)
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#define HW_ATL2_MAC_UC 0U
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#define HW_ATL2_MAC_MIN 1U
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#define HW_ATL2_MAC_MAX 38U
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#define HW_ATL2_TC_MAX 1U
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#define HW_ATL2_RSS_MAX 8U
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@ -29,6 +33,51 @@
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#define HW_ATL2_MAX_RXD 8184U
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#define HW_ATL2_MAX_TXD 8184U
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#define HW_ATL2_FW_SM_ACT_RSLVR 0x3U
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#define HW_ATL2_RPF_TAG_UC_OFFSET 0x0
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#define HW_ATL2_RPF_TAG_ALLMC_OFFSET 0x6
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#define HW_ATL2_RPF_TAG_ET_OFFSET 0x7
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#define HW_ATL2_RPF_TAG_VLAN_OFFSET 0xA
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#define HW_ATL2_RPF_TAG_UNTAG_OFFSET 0xE
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#define HW_ATL2_RPF_TAG_L3_V4_OFFSET 0xF
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#define HW_ATL2_RPF_TAG_L3_V6_OFFSET 0x12
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#define HW_ATL2_RPF_TAG_L4_OFFSET 0x15
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#define HW_ATL2_RPF_TAG_L4_FLEX_OFFSET 0x18
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#define HW_ATL2_RPF_TAG_FLEX_OFFSET 0x1B
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#define HW_ATL2_RPF_TAG_PCP_OFFSET 0x1D
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#define HW_ATL2_RPF_TAG_UC_MASK (0x0000003F << HW_ATL2_RPF_TAG_UC_OFFSET)
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#define HW_ATL2_RPF_TAG_ALLMC_MASK (0x00000001 << HW_ATL2_RPF_TAG_ALLMC_OFFSET)
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#define HW_ATL2_RPF_TAG_UNTAG_MASK (0x00000001 << HW_ATL2_RPF_TAG_UNTAG_OFFSET)
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#define HW_ATL2_RPF_TAG_VLAN_MASK (0x0000000F << HW_ATL2_RPF_TAG_VLAN_OFFSET)
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#define HW_ATL2_RPF_TAG_ET_MASK (0x00000007 << HW_ATL2_RPF_TAG_ET_OFFSET)
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#define HW_ATL2_RPF_TAG_L3_V4_MASK (0x00000007 << HW_ATL2_RPF_TAG_L3_V4_OFFSET)
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#define HW_ATL2_RPF_TAG_L3_V6_MASK (0x00000007 << HW_ATL2_RPF_TAG_L3_V6_OFFSET)
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#define HW_ATL2_RPF_TAG_L4_MASK (0x00000007 << HW_ATL2_RPF_TAG_L4_OFFSET)
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#define HW_ATL2_RPF_TAG_PCP_MASK (0x00000007 << HW_ATL2_RPF_TAG_PCP_OFFSET)
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enum HW_ATL2_RPF_ART_INDEX {
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HW_ATL2_RPF_L2_PROMISC_OFF_INDEX,
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HW_ATL2_RPF_VLAN_PROMISC_OFF_INDEX,
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HW_ATL2_RPF_L3L4_USER_INDEX = 8,
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HW_ATL2_RPF_ET_PCP_USER_INDEX = HW_ATL2_RPF_L3L4_USER_INDEX + 16,
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HW_ATL2_RPF_VLAN_USER_INDEX = HW_ATL2_RPF_ET_PCP_USER_INDEX + 16,
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HW_ATL2_RPF_PCP_TO_TC_INDEX = HW_ATL2_RPF_VLAN_USER_INDEX +
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HW_ATL_VLAN_MAX_FILTERS,
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};
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#define HW_ATL2_ACTION(ACTION, RSS, INDEX, VALID) \
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((((ACTION) & 0x3U) << 8) | \
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(((RSS) & 0x1U) << 7) | \
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(((INDEX) & 0x3FU) << 2) | \
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(((VALID) & 0x1U) << 0))
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#define HW_ATL2_ACTION_DROP HW_ATL2_ACTION(0, 0, 0, 1)
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#define HW_ATL2_ACTION_DISABLE HW_ATL2_ACTION(0, 0, 0, 0)
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#define HW_ATL2_ACTION_ASSIGN_QUEUE(QUEUE) HW_ATL2_ACTION(1, 0, (QUEUE), 1)
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#define HW_ATL2_ACTION_ASSIGN_TC(TC) HW_ATL2_ACTION(1, 1, (TC), 1)
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struct hw_atl2_priv {
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struct statistics_s last_stats;
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unsigned int art_base_index;
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