x86/oprofile: add IBS support for AMD CPUs, IBS buffer handling routines
This patchset supports the new profiling hardware available in the latest AMD CPUs in the oProfile driver. Signed-off-by: Barry Kasindorf <barry.kasindorf@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: oprofile-list <oprofile-list@lists.sourceforge.net> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -5,6 +5,7 @@
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* @remark Read the file COPYING
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*
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* @author John Levon <levon@movementarian.org>
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* @author Barry Kasindorf
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*
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* This is the core of the buffer management. Each
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* CPU buffer is processed and entered into the
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@ -272,7 +273,7 @@ static void increment_tail(struct oprofile_cpu_buffer *b)
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{
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unsigned long new_tail = b->tail_pos + 1;
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rmb();
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rmb(); /* be sure fifo pointers are synchromized */
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if (new_tail < b->buffer_size)
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b->tail_pos = new_tail;
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@ -327,6 +328,67 @@ static void add_trace_begin(void)
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add_event_entry(TRACE_BEGIN_CODE);
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}
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#define IBS_FETCH_CODE_SIZE 2
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#define IBS_OP_CODE_SIZE 5
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#define IBS_EIP(offset) \
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(((struct op_sample *)&cpu_buf->buffer[(offset)])->eip)
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#define IBS_EVENT(offset) \
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(((struct op_sample *)&cpu_buf->buffer[(offset)])->event)
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/*
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* Add IBS fetch and op entries to event buffer
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*/
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static void add_ibs_begin(struct oprofile_cpu_buffer *cpu_buf, int code,
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int in_kernel, struct mm_struct *mm)
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{
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unsigned long rip;
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int i, count;
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unsigned long ibs_cookie = 0;
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off_t offset;
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increment_tail(cpu_buf); /* move to RIP entry */
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rip = IBS_EIP(cpu_buf->tail_pos);
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#ifdef __LP64__
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rip += IBS_EVENT(cpu_buf->tail_pos) << 32;
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#endif
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if (mm) {
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ibs_cookie = lookup_dcookie(mm, rip, &offset);
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if (ibs_cookie == NO_COOKIE)
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offset = rip;
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if (ibs_cookie == INVALID_COOKIE) {
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atomic_inc(&oprofile_stats.sample_lost_no_mapping);
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offset = rip;
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}
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if (ibs_cookie != last_cookie) {
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add_cookie_switch(ibs_cookie);
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last_cookie = ibs_cookie;
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}
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} else
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offset = rip;
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add_event_entry(ESCAPE_CODE);
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add_event_entry(code);
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add_event_entry(offset); /* Offset from Dcookie */
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/* we send the Dcookie offset, but send the raw Linear Add also*/
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add_event_entry(IBS_EIP(cpu_buf->tail_pos));
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add_event_entry(IBS_EVENT(cpu_buf->tail_pos));
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if (code == IBS_FETCH_CODE)
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count = IBS_FETCH_CODE_SIZE; /*IBS FETCH is 2 int64s*/
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else
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count = IBS_OP_CODE_SIZE; /*IBS OP is 5 int64s*/
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for (i = 0; i < count; i++) {
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increment_tail(cpu_buf);
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add_event_entry(IBS_EIP(cpu_buf->tail_pos));
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add_event_entry(IBS_EVENT(cpu_buf->tail_pos));
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}
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}
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static void add_sample_entry(unsigned long offset, unsigned long event)
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{
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@ -524,6 +586,14 @@ void sync_buffer(int cpu)
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} else if (s->event == CPU_TRACE_BEGIN) {
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state = sb_bt_start;
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add_trace_begin();
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} else if (s->event == IBS_FETCH_BEGIN) {
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state = sb_bt_start;
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add_ibs_begin(cpu_buf,
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IBS_FETCH_CODE, in_kernel, mm);
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} else if (s->event == IBS_OP_BEGIN) {
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state = sb_bt_start;
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add_ibs_begin(cpu_buf,
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IBS_OP_CODE, in_kernel, mm);
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} else {
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struct mm_struct *oldmm = mm;
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@ -5,6 +5,7 @@
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* @remark Read the file COPYING
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*
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* @author John Levon <levon@movementarian.org>
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* @author Barry Kasindorf <barry.kasindorf@amd.com>
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*
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* Each CPU has a local buffer that stores PC value/event
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* pairs. We also log context switches when we notice them.
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@ -207,7 +208,7 @@ static int log_sample(struct oprofile_cpu_buffer * cpu_buf, unsigned long pc,
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return 1;
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}
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static int oprofile_begin_trace(struct oprofile_cpu_buffer * cpu_buf)
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static int oprofile_begin_trace(struct oprofile_cpu_buffer *cpu_buf)
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{
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if (nr_available_slots(cpu_buf) < 4) {
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cpu_buf->sample_lost_overflow++;
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@ -252,6 +253,71 @@ void oprofile_add_sample(struct pt_regs * const regs, unsigned long event)
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oprofile_add_ext_sample(pc, regs, event, is_kernel);
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}
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#define MAX_IBS_SAMPLE_SIZE 14
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static int log_ibs_sample(struct oprofile_cpu_buffer *cpu_buf,
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unsigned long pc, int is_kernel, unsigned int *ibs, int ibs_code)
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{
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struct task_struct *task;
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cpu_buf->sample_received++;
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if (nr_available_slots(cpu_buf) < MAX_IBS_SAMPLE_SIZE) {
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cpu_buf->sample_lost_overflow++;
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return 0;
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}
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is_kernel = !!is_kernel;
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/* notice a switch from user->kernel or vice versa */
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if (cpu_buf->last_is_kernel != is_kernel) {
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cpu_buf->last_is_kernel = is_kernel;
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add_code(cpu_buf, is_kernel);
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}
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/* notice a task switch */
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if (!is_kernel) {
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task = current;
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if (cpu_buf->last_task != task) {
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cpu_buf->last_task = task;
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add_code(cpu_buf, (unsigned long)task);
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}
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}
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add_code(cpu_buf, ibs_code);
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add_sample(cpu_buf, ibs[0], ibs[1]);
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add_sample(cpu_buf, ibs[2], ibs[3]);
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add_sample(cpu_buf, ibs[4], ibs[5]);
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if (ibs_code == IBS_OP_BEGIN) {
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add_sample(cpu_buf, ibs[6], ibs[7]);
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add_sample(cpu_buf, ibs[8], ibs[9]);
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add_sample(cpu_buf, ibs[10], ibs[11]);
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}
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return 1;
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}
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void oprofile_add_ibs_sample(struct pt_regs *const regs,
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unsigned int * const ibs_sample, u8 code)
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{
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int is_kernel = !user_mode(regs);
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unsigned long pc = profile_pc(regs);
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struct oprofile_cpu_buffer *cpu_buf =
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&per_cpu(cpu_buffer, smp_processor_id());
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if (!backtrace_depth) {
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log_ibs_sample(cpu_buf, pc, is_kernel, ibs_sample, code);
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return;
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}
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/* if log_sample() fails we can't backtrace since we lost the source
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* of this event */
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if (log_ibs_sample(cpu_buf, pc, is_kernel, ibs_sample, code))
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oprofile_ops.backtrace(regs, backtrace_depth);
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}
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void oprofile_add_pc(unsigned long pc, int is_kernel, unsigned long event)
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{
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struct oprofile_cpu_buffer *cpu_buf = &__get_cpu_var(cpu_buffer);
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@ -55,5 +55,7 @@ void cpu_buffer_reset(struct oprofile_cpu_buffer * cpu_buf);
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/* transient events for the CPU buffer -> event buffer */
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#define CPU_IS_KERNEL 1
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#define CPU_TRACE_BEGIN 2
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#define IBS_FETCH_BEGIN 3
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#define IBS_OP_BEGIN 4
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#endif /* OPROFILE_CPU_BUFFER_H */
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