Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: omap: DMA: clear interrupt status correctly OMAP3: Devkit8000: Fix tps65930 pullup/pulldown configuration arm: omap3: cm-t3517: minor comment fix arm: omap3: cm-t3517: rtc fix omap1: Fix sched_clock implementation when both MPU timer and 32K timer are used omap1: Fix booting for 15xx and 730 with omap1_defconfig omap1: Fix sched_clock for the MPU timer OMAP: PRCM: remove duplicated headers OMAP4: clockdomain: bypass unimplemented wake-up dependency functions on OMAP4 OMAP: counter_32k: init clocksource as part of machine timer init
This commit is contained in:
Коммит
34686fe689
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@ -9,6 +9,7 @@ config ARCH_OMAP730
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depends on ARCH_OMAP1
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bool "OMAP730 Based System"
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select CPU_ARM926T
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select OMAP_MPU_TIMER
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select ARCH_OMAP_OTG
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config ARCH_OMAP850
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@ -22,6 +23,7 @@ config ARCH_OMAP15XX
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default y
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bool "OMAP15xx Based System"
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select CPU_ARM925T
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select OMAP_MPU_TIMER
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config ARCH_OMAP16XX
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depends on ARCH_OMAP1
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@ -3,12 +3,11 @@
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#
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# Common support
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obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
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obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
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obj-y += clock.o clock_data.o opp_data.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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obj-$(CONFIG_OMAP_MPU_TIMER) += time.o
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obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
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# Power Management
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@ -44,16 +44,21 @@
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <linux/sched.h>
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#include <asm/system.h>
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#include <mach/hardware.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/sched_clock.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include <plat/common.h>
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#ifdef CONFIG_OMAP_MPU_TIMER
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#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
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#define OMAP_MPU_TIMER_OFFSET 0x100
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@ -67,7 +72,7 @@ typedef struct {
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((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
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(n)*OMAP_MPU_TIMER_OFFSET))
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static inline unsigned long omap_mpu_timer_read(int nr)
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static inline unsigned long notrace omap_mpu_timer_read(int nr)
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{
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volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
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return timer->read_tim;
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@ -212,6 +217,32 @@ static struct clocksource clocksource_mpu = {
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static DEFINE_CLOCK_DATA(cd);
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static inline unsigned long long notrace _omap_mpu_sched_clock(void)
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{
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u32 cyc = mpu_read(&clocksource_mpu);
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return cyc_to_sched_clock(&cd, cyc, (u32)~0);
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}
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#ifndef CONFIG_OMAP_32K_TIMER
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unsigned long long notrace sched_clock(void)
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{
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return _omap_mpu_sched_clock();
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}
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#else
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static unsigned long long notrace omap_mpu_sched_clock(void)
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{
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return _omap_mpu_sched_clock();
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}
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#endif
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static void notrace mpu_update_sched_clock(void)
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{
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u32 cyc = mpu_read(&clocksource_mpu);
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update_sched_clock(&cd, cyc, (u32)~0);
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}
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static void __init omap_init_clocksource(unsigned long rate)
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{
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static char err[] __initdata = KERN_ERR
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@ -219,17 +250,13 @@ static void __init omap_init_clocksource(unsigned long rate)
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setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
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omap_mpu_timer_start(1, ~0, 1);
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init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
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if (clocksource_register_hz(&clocksource_mpu, rate))
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printk(err, clocksource_mpu.name);
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}
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/*
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* ---------------------------------------------------------------------------
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* Timer initialization
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* ---------------------------------------------------------------------------
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*/
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static void __init omap_timer_init(void)
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static void __init omap_mpu_timer_init(void)
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{
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struct clk *ck_ref = clk_get(NULL, "ck_ref");
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unsigned long rate;
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@ -246,6 +273,66 @@ static void __init omap_timer_init(void)
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omap_init_clocksource(rate);
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}
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#else
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static inline void omap_mpu_timer_init(void)
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{
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pr_err("Bogus timer, should not happen\n");
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}
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#endif /* CONFIG_OMAP_MPU_TIMER */
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#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
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static unsigned long long (*preferred_sched_clock)(void);
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unsigned long long notrace sched_clock(void)
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{
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if (!preferred_sched_clock)
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return 0;
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return preferred_sched_clock();
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}
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static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
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{
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if (use_32k_sched_clock)
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preferred_sched_clock = omap_32k_sched_clock;
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else
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preferred_sched_clock = omap_mpu_sched_clock;
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}
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#else
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static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
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{
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}
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#endif
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static inline int omap_32k_timer_usable(void)
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{
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int res = false;
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if (cpu_is_omap730() || cpu_is_omap15xx())
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return res;
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#ifdef CONFIG_OMAP_32K_TIMER
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res = omap_32k_timer_init();
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#endif
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return res;
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}
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/*
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* ---------------------------------------------------------------------------
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* Timer initialization
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* ---------------------------------------------------------------------------
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*/
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static void __init omap_timer_init(void)
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{
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if (omap_32k_timer_usable()) {
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preferred_sched_clock_init(1);
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} else {
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omap_mpu_timer_init();
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preferred_sched_clock_init(0);
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}
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}
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struct sys_timer omap_timer = {
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.init = omap_timer_init,
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};
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@ -52,10 +52,9 @@
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include <plat/common.h>
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#include <plat/dmtimer.h>
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struct sys_timer omap_timer;
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/*
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* ---------------------------------------------------------------------------
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* 32KHz OS timer
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@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
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* Timer initialization
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* ---------------------------------------------------------------------------
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*/
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static void __init omap_timer_init(void)
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bool __init omap_32k_timer_init(void)
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{
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omap_init_clocksource_32k();
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#ifdef CONFIG_OMAP_DM_TIMER
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omap_dm_timer_init();
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#endif
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omap_init_32k_timer();
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}
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struct sys_timer omap_timer = {
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.init = omap_timer_init,
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};
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return true;
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}
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@ -124,8 +124,9 @@ static inline void cm_t3517_init_hecc(void) {}
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#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
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#define RTC_IO_GPIO (153)
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#define RTC_WR_GPIO (154)
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#define RTC_RD_GPIO (160)
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#define RTC_RD_GPIO (53)
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#define RTC_CS_GPIO (163)
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#define RTC_CS_EN_GPIO (160)
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struct v3020_platform_data cm_t3517_v3020_pdata = {
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.use_gpio = 1,
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@ -145,6 +146,16 @@ static struct platform_device cm_t3517_rtc_device = {
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static void __init cm_t3517_init_rtc(void)
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{
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int err;
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err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en");
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if (err) {
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pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
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return;
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}
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gpio_direction_output(RTC_CS_EN_GPIO, 1);
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platform_device_register(&cm_t3517_rtc_device);
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}
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#else
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@ -214,12 +225,12 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
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},
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{
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.name = "linux",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
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.size = 32 * NAND_BLOCK_SIZE,
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
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.size = MTDPART_SIZ_FULL,
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},
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};
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@ -256,11 +267,19 @@ static void __init cm_t3517_init_irq(void)
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static struct omap_board_mux board_mux[] __initdata = {
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/* GPIO186 - Green LED */
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OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
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/* RTC GPIOs: IO, WR#, RD#, CS# */
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/* RTC GPIOs: */
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/* IO - GPIO153 */
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OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
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/* WR# - GPIO154 */
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OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
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OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
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/* RD# - GPIO53 */
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OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
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/* CS# - GPIO163 */
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OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
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/* CS EN - GPIO160 */
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OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
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/* HSUSB1 RESET */
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OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
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/* HSUSB2 RESET */
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@ -275,8 +275,7 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
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.irq_base = TWL4030_GPIO_IRQ_BASE,
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.irq_end = TWL4030_GPIO_IRQ_END,
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.use_leds = true,
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.pullups = BIT(1),
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.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
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.pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
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| BIT(15) | BIT(16) | BIT(17),
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.setup = devkit8000_twl_gpio_setup,
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};
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@ -34,7 +34,6 @@
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#include "cm2_44xx.h"
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#include "cm-regbits-44xx.h"
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#include "prm44xx.h"
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#include "prm44xx.h"
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#include "prm-regbits-44xx.h"
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#include "control.h"
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#include "scrm44xx.h"
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|
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@ -423,6 +423,12 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
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{
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struct clkdm_dep *cd;
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if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
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pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
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clkdm1->name, clkdm2->name, __func__);
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return -EINVAL;
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}
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if (!clkdm1 || !clkdm2)
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return -EINVAL;
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|
@ -458,6 +464,12 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
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{
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struct clkdm_dep *cd;
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if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
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pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
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clkdm1->name, clkdm2->name, __func__);
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return -EINVAL;
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}
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if (!clkdm1 || !clkdm2)
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return -EINVAL;
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|
@ -500,6 +512,12 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
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if (!clkdm1 || !clkdm2)
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return -EINVAL;
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|
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if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
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pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
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clkdm1->name, clkdm2->name, __func__);
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return -EINVAL;
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}
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cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
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if (IS_ERR(cd)) {
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pr_debug("clockdomain: hardware cannot set/clear wake up of "
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|
@ -527,6 +545,12 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
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struct clkdm_dep *cd;
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u32 mask = 0;
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if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
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pr_err("clockdomain: %s: %s: not yet implemented\n",
|
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clkdm->name, __func__);
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return -EINVAL;
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}
|
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|
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if (!clkdm)
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return -EINVAL;
|
||||
|
||||
|
@ -830,8 +854,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
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* dependency code and data for OMAP4.
|
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*/
|
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if (cpu_is_omap44xx()) {
|
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WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency "
|
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"support is not yet implemented\n");
|
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pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
|
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} else {
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if (atomic_read(&clkdm->usecount) > 0)
|
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_clkdm_add_autodeps(clkdm);
|
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|
@ -872,8 +895,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
|
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* dependency code and data for OMAP4.
|
||||
*/
|
||||
if (cpu_is_omap44xx()) {
|
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WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency "
|
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"support is not yet implemented\n");
|
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pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
|
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} else {
|
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if (atomic_read(&clkdm->usecount) > 0)
|
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_clkdm_del_autodeps(clkdm);
|
||||
|
|
|
@ -30,8 +30,6 @@
|
|||
#include "cm1_44xx.h"
|
||||
#include "cm2_44xx.h"
|
||||
|
||||
#include "cm1_44xx.h"
|
||||
#include "cm2_44xx.h"
|
||||
#include "cm-regbits-44xx.h"
|
||||
#include "prm44xx.h"
|
||||
#include "prcm44xx.h"
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
#include <plat/prcm.h>
|
||||
|
||||
#include "powerdomain.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
#include "prm.h"
|
||||
#include "prm-regbits-24xx.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
|
|
|
@ -42,6 +42,8 @@
|
|||
|
||||
#include "timer-gp.h"
|
||||
|
||||
#include <plat/common.h>
|
||||
|
||||
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
|
||||
#define MAX_GPTIMER_ID 12
|
||||
|
||||
|
@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
|
|||
/*
|
||||
* When 32k-timer is enabled, don't use GPTimer for clocksource
|
||||
* instead, just leave default clocksource which uses the 32k
|
||||
* sync counter. See clocksource setup in see plat-omap/common.c.
|
||||
* sync counter. See clocksource setup in plat-omap/counter_32k.c
|
||||
*/
|
||||
|
||||
static inline void __init omap2_gp_clocksource_init(void) {}
|
||||
static void __init omap2_gp_clocksource_init(void)
|
||||
{
|
||||
omap_init_clocksource_32k();
|
||||
}
|
||||
|
||||
#else
|
||||
/*
|
||||
* clocksource
|
||||
|
|
|
@ -144,12 +144,9 @@ config OMAP_IOMMU_DEBUG
|
|||
config OMAP_IOMMU_IVA2
|
||||
bool
|
||||
|
||||
choice
|
||||
prompt "System timer"
|
||||
default OMAP_32K_TIMER if !ARCH_OMAP15XX
|
||||
|
||||
config OMAP_MPU_TIMER
|
||||
bool "Use mpu timer"
|
||||
depends on ARCH_OMAP1
|
||||
help
|
||||
Select this option if you want to use the OMAP mpu timer. This
|
||||
timer provides more intra-tick resolution than the 32KHz timer,
|
||||
|
@ -158,6 +155,7 @@ config OMAP_MPU_TIMER
|
|||
config OMAP_32K_TIMER
|
||||
bool "Use 32KHz timer"
|
||||
depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
|
||||
default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
|
||||
help
|
||||
Select this option if you want to enable the OMAP 32KHz timer.
|
||||
This timer saves power compared to the OMAP_MPU_TIMER, and has
|
||||
|
@ -165,8 +163,6 @@ config OMAP_32K_TIMER
|
|||
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
|
||||
currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
|
||||
|
||||
endchoice
|
||||
|
||||
config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
|
||||
bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
|
||||
depends on ARCH_OMAP3 && PM
|
||||
|
|
|
@ -36,8 +36,6 @@
|
|||
|
||||
#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
|
||||
|
||||
#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
|
||||
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
/*
|
||||
|
@ -122,12 +120,24 @@ static DEFINE_CLOCK_DATA(cd);
|
|||
#define SC_MULT 4000000000u
|
||||
#define SC_SHIFT 17
|
||||
|
||||
unsigned long long notrace sched_clock(void)
|
||||
static inline unsigned long long notrace _omap_32k_sched_clock(void)
|
||||
{
|
||||
u32 cyc = clocksource_32k.read(&clocksource_32k);
|
||||
return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_OMAP_MPU_TIMER
|
||||
unsigned long long notrace sched_clock(void)
|
||||
{
|
||||
return _omap_32k_sched_clock();
|
||||
}
|
||||
#else
|
||||
unsigned long long notrace omap_32k_sched_clock(void)
|
||||
{
|
||||
return _omap_32k_sched_clock();
|
||||
}
|
||||
#endif
|
||||
|
||||
static void notrace omap_update_sched_clock(void)
|
||||
{
|
||||
u32 cyc = clocksource_32k.read(&clocksource_32k);
|
||||
|
@ -160,7 +170,7 @@ void read_persistent_clock(struct timespec *ts)
|
|||
*ts = *tsp;
|
||||
}
|
||||
|
||||
static int __init omap_init_clocksource_32k(void)
|
||||
int __init omap_init_clocksource_32k(void)
|
||||
{
|
||||
static char err[] __initdata = KERN_ERR
|
||||
"%s: can't register clocksource!\n";
|
||||
|
@ -195,7 +205,3 @@ static int __init omap_init_clocksource_32k(void)
|
|||
}
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(omap_init_clocksource_32k);
|
||||
|
||||
#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
|
||||
|
||||
|
|
|
@ -53,7 +53,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
|
|||
#endif
|
||||
|
||||
#define OMAP_DMA_ACTIVE 0x01
|
||||
#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe
|
||||
#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff
|
||||
|
||||
#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
|
||||
|
||||
|
@ -1873,7 +1873,7 @@ static int omap2_dma_handle_ch(int ch)
|
|||
printk(KERN_INFO "DMA misaligned error with device %d\n",
|
||||
dma_chan[ch].dev_id);
|
||||
|
||||
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, ch);
|
||||
p->dma_write(status, CSR, ch);
|
||||
p->dma_write(1 << ch, IRQSTATUS_L0, ch);
|
||||
/* read back the register to flush the write */
|
||||
p->dma_read(IRQSTATUS_L0, ch);
|
||||
|
@ -1893,10 +1893,9 @@ static int omap2_dma_handle_ch(int ch)
|
|||
OMAP_DMA_CHAIN_INCQHEAD(chain_id);
|
||||
|
||||
status = p->dma_read(CSR, ch);
|
||||
p->dma_write(status, CSR, ch);
|
||||
}
|
||||
|
||||
p->dma_write(status, CSR, ch);
|
||||
|
||||
if (likely(dma_chan[ch].callback != NULL))
|
||||
dma_chan[ch].callback(ch, status, dma_chan[ch].data);
|
||||
|
||||
|
|
|
@ -35,6 +35,9 @@ struct sys_timer;
|
|||
|
||||
extern void omap_map_common_io(void);
|
||||
extern struct sys_timer omap_timer;
|
||||
extern bool omap_32k_timer_init(void);
|
||||
extern int __init omap_init_clocksource_32k(void);
|
||||
extern unsigned long long notrace omap_32k_sched_clock(void);
|
||||
|
||||
extern void omap_reserve(void);
|
||||
|
||||
|
|
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