PCI: Fix kernel-doc formatting
Fix kernel-doc formatting throughout drivers/pci and related include files. No change to functionality intended. Check for warnings: $ find include drivers/pci -type f -path "*pci*.[ch]" | xargs scripts/kernel-doc -none [bhelgaas: squashed to one commit] Link: https://lore.kernel.org/r/20210509030237.368540-1-kw@linux.com Link: https://lore.kernel.org/r/20210703151306.1922450-1-kw@linux.com Link: https://lore.kernel.org/r/20210703151306.1922450-2-kw@linux.com Link: https://lore.kernel.org/r/20210703151306.1922450-3-kw@linux.com Link: https://lore.kernel.org/r/20210703151306.1922450-4-kw@linux.com Link: https://lore.kernel.org/r/20210703151306.1922450-5-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -263,9 +263,12 @@ struct cdns_pcie_ops {
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* struct cdns_pcie - private data for Cadence PCIe controller drivers
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* @reg_base: IO mapped register base
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* @mem_res: start/end offsets in the physical system memory to map PCI accesses
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* @dev: PCIe controller
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* @is_rc: tell whether the PCIe controller mode is Root Complex or Endpoint.
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* @bus: In Root Complex mode, the bus number
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* @ops: Platform specific ops to control various inputs from Cadence PCIe
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* @phy_count: number of supported PHY devices
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* @phy: list of pointers to specific PHY control blocks
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* @link: list of pointers to corresponding device link representations
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* @ops: Platform-specific ops to control various inputs from Cadence PCIe
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* wrapper
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*/
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struct cdns_pcie {
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0+
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/**
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/*
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* APM X-Gene PCIe Driver
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*
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* Copyright (c) 2014 Applied Micro Circuits Corporation.
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@ -49,7 +49,7 @@ enum iproc_msi_reg {
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struct iproc_msi;
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/**
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* iProc MSI group
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* struct iproc_msi_grp - iProc MSI group
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*
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* One MSI group is allocated per GIC interrupt, serviced by one iProc MSI
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* event queue.
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@ -65,7 +65,7 @@ struct iproc_msi_grp {
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};
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/**
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* iProc event queue based MSI
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* struct iproc_msi - iProc event queue based MSI
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*
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* Only meant to be used on platforms without MSI support integrated into the
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* GIC.
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@ -89,8 +89,8 @@
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#define IPROC_PCIE_REG_INVALID 0xffff
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/**
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* iProc PCIe outbound mapping controller specific parameters
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*
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* struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
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* parameters
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* @window_sizes: list of supported outbound mapping window sizes in MB
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* @nr_sizes: number of supported outbound mapping window sizes
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*/
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@ -136,22 +136,20 @@ static const struct iproc_pcie_ob_map paxb_v2_ob_map[] = {
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};
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/**
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* iProc PCIe inbound mapping type
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* enum iproc_pcie_ib_map_type - iProc PCIe inbound mapping type
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* @IPROC_PCIE_IB_MAP_MEM: DDR memory
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* @IPROC_PCIE_IB_MAP_IO: device I/O memory
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* @IPROC_PCIE_IB_MAP_INVALID: invalid or unused
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*/
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enum iproc_pcie_ib_map_type {
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/* for DDR memory */
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IPROC_PCIE_IB_MAP_MEM = 0,
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/* for device I/O memory */
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IPROC_PCIE_IB_MAP_IO,
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/* invalid or unused */
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IPROC_PCIE_IB_MAP_INVALID
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};
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/**
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* iProc PCIe inbound mapping controller specific parameters
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*
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* struct iproc_pcie_ib_map - iProc PCIe inbound mapping controller-specific
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* parameters
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* @type: inbound mapping region type
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* @size_unit: inbound mapping region size unit, could be SZ_1K, SZ_1M, or
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* SZ_1G
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@ -437,7 +435,7 @@ static inline void iproc_pcie_write_reg(struct iproc_pcie *pcie,
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writel(val, pcie->base + offset);
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}
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/**
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/*
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* APB error forwarding can be disabled during access of configuration
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* registers of the endpoint device, to prevent unsupported requests
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* (typically seen during enumeration with multi-function devices) from
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@ -619,7 +617,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
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return PCIBIOS_SUCCESSFUL;
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}
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/**
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/*
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* Note access to the configuration registers are protected at the higher layer
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* by 'pci_lock' in drivers/pci/access.c
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*/
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@ -897,7 +895,7 @@ static inline int iproc_pcie_ob_write(struct iproc_pcie *pcie, int window_idx,
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return 0;
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}
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/**
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/*
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* Some iProc SoCs require the SW to configure the outbound address mapping
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*
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* Outbound address translation:
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@ -7,7 +7,13 @@
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#define _PCIE_IPROC_H
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/**
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* iProc PCIe interface type
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* enum iproc_pcie_type - iProc PCIe interface type
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* @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
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* @IPROC_PCIE_PAXB: PAXB-based host controllers for
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* NS, NSP, Cygnus, NS2, and Pegasus SOCs
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* @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
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* @IPROC_PCIE_PAXC: PAXC-based host controllers
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* @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
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*
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* PAXB is the wrapper used in root complex that can be connected to an
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* external endpoint device.
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@ -24,7 +30,7 @@ enum iproc_pcie_type {
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};
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/**
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* iProc PCIe outbound mapping
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* struct iproc_pcie_ob - iProc PCIe outbound mapping
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* @axi_offset: offset from the AXI address to the internal address used by
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* the iProc PCIe core
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* @nr_windows: total number of supported outbound mapping windows
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@ -35,7 +41,7 @@ struct iproc_pcie_ob {
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};
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/**
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* iProc PCIe inbound mapping
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* struct iproc_pcie_ib - iProc PCIe inbound mapping
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* @nr_regions: total number of supported inbound mapping regions
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*/
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struct iproc_pcie_ib {
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@ -47,13 +53,13 @@ struct iproc_pcie_ib_map;
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struct iproc_msi;
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/**
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* iProc PCIe device
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*
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* struct iproc_pcie - iProc PCIe device
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* @dev: pointer to device data structure
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* @type: iProc PCIe interface type
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* @reg_offsets: register offsets
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* @base: PCIe host controller I/O register base
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* @base_addr: PCIe host controller register base physical address
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* @mem: host bridge memory window resource
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* @phy: optional PHY device that controls the Serdes
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* @map_irq: function callback to map interrupts
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* @ep_is_internal: indicates an internal emulated endpoint device is connected
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@ -296,9 +296,10 @@ static int ctrl_slot_cleanup(struct controller *ctrl)
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*
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* Won't work for more than one PCI-PCI bridge in a slot.
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*
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* @bus_num - bus number of PCI device
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* @dev_num - device number of PCI device
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* @slot - Pointer to u8 where slot number will be returned
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* @bus: pointer to the PCI bus structure
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* @bus_num: bus number of PCI device
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* @dev_num: device number of PCI device
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* @slot: Pointer to u8 where slot number will be returned
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*
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* Output: SUCCESS or FAILURE
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*/
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@ -1877,7 +1877,7 @@ static void interrupt_event_handler(struct controller *ctrl)
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/**
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* cpqhp_pushbutton_thread - handle pushbutton events
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* @slot: target slot (struct)
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* @t: pointer to struct timer_list which holds all timer-related callbacks
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*
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* Scheduled procedure to handle blocking stuff for the pushbuttons.
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* Handles all pending events and exits.
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@ -47,6 +47,9 @@ extern int pciehp_poll_time;
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* struct controller - PCIe hotplug controller
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* @pcie: pointer to the controller's PCIe port service device
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* @slot_cap: cached copy of the Slot Capabilities register
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* @inband_presence_disabled: In-Band Presence Detect Disable supported by
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* controller and disabled per spec recommendation (PCIe r5.0, appendix I
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* implementation note)
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* @slot_ctrl: cached copy of the Slot Control register
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* @ctrl_lock: serializes writes to the Slot Control register
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* @cmd_started: jiffies when the Slot Control register was last written;
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@ -324,8 +324,8 @@ struct pci_sriov {
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/**
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* pci_dev_set_io_state - Set the new error state if possible.
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*
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* @dev - pci device to set new error_state
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* @new - the state we want dev to be in
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* @dev: PCI device to set new error_state
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* @new: the state we want dev to be in
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*
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* Must be called with device_lock held.
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*
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@ -1,5 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/**
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/*
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* PCI Endpoint ConfigFS header file
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*
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* Copyright (C) 2017 Texas Instruments
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@ -1,5 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/**
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/*
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* PCI Endpoint *Controller* (EPC) header file
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*
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* Copyright (C) 2017 Texas Instruments
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@ -58,6 +58,7 @@ pci_epc_interface_string(enum pci_epc_interface_type type)
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* @map_msi_irq: ops to map physical address to MSI address and return MSI data
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* @start: ops to start the PCI link
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* @stop: ops to stop the PCI link
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* @get_features: ops to get the features supported by the EPC
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* @owner: the module owner containing the ops
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*/
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struct pci_epc_ops {
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@ -150,6 +151,8 @@ struct pci_epc {
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/**
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* struct pci_epc_features - features supported by a EPC device per function
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* @linkup_notifier: indicate if the EPC device can notify EPF driver on link up
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* @core_init_notifier: indicate cores that can notify about their availability
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* for initialization
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* @msi_capable: indicate if the endpoint function has MSI capability
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* @msix_capable: indicate if the endpoint function has MSI-X capability
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* @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
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@ -1,5 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/**
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/*
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* PCI Endpoint *Function* (EPF) header file
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*
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* Copyright (C) 2017 Texas Instruments
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@ -102,6 +102,8 @@ struct pci_epf_driver {
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* @phys_addr: physical address that should be mapped to the BAR
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* @addr: virtual address corresponding to the @phys_addr
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* @size: the size of the address space present in BAR
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* @barno: BAR number
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* @flags: flags that are set for the BAR
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*/
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struct pci_epf_bar {
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dma_addr_t phys_addr;
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* @header: represents standard configuration header
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* @bar: represents the BAR of EPF device
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* @msi_interrupts: number of MSI interrupts required by this function
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* @msix_interrupts: number of MSI-X interrupts required by this function
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* @func_no: unique function number within this endpoint device
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* @epc: the EPC device to which this EPF device is bound
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* @driver: the EPF driver to which this EPF device is bound
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@ -50,6 +50,8 @@ struct hotplug_slot_ops {
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/**
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* struct hotplug_slot - used to register a physical slot with the hotplug pci core
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* @ops: pointer to the &struct hotplug_slot_ops to be used for this slot
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* @slot_list: internal list used to track hotplug PCI slots
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* @pci_slot: represents a physical slot
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* @owner: The module owner of this structure
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* @mod_name: The module name (KBUILD_MODNAME) of this structure
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*/
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@ -1,5 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/**
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/*
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* pcitest.h - PCI test uapi defines
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*
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* Copyright (C) 2017 Texas Instruments
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