EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodes
Update documentation for the APM X-Gene SoC EDAC DTS binding for L3/SoC subnodes. Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: jcm@redhat.com Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: mchehab@osg.samsung.com Cc: patches@apm.com Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/1443055261-8613-2-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -5,6 +5,8 @@ The follow error types are supported:
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memory controller - Memory controller
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PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
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L3 - L3 cache controller
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SoC - SoC IP's such as Ethernet, SATA, and etc
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The following section describes the EDAC DT node binding.
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@ -30,6 +32,17 @@ Required properties for PMD subnode:
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- reg : First resource shall be the PMD resource.
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- pmd-controller : Instance number of the PMD controller.
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Required properties for L3 subnode:
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- compatible : Shall be "apm,xgene-edac-l3" or
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"apm,xgene-edac-l3-v2".
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- reg : First resource shall be the L3 EDAC resource.
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Required properties for SoC subnode:
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- compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or
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"apm,xgene-edac-l3-soc" for general value reporting
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only.
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- reg : First resource shall be the SoC EDAC resource.
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Example:
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csw: csw@7e200000 {
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compatible = "apm,xgene-csw", "syscon";
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@ -76,4 +89,14 @@ Example:
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reg = <0x0 0x7c000000 0x0 0x200000>;
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pmd-controller = <0>;
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};
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edacl3@7e600000 {
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compatible = "apm,xgene-edac-l3";
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reg = <0x0 0x7e600000 0x0 0x1000>;
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};
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edacsoc@7e930000 {
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compatible = "apm,xgene-edac-soc-v1";
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reg = <0x0 0x7e930000 0x0 0x1000>;
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};
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};
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